Datasheet ADM6315 Datasheet (Analog Devices)

Open-Drain Microprocessor

V

REF

DEBOUNCE

RESET

CIRCUITRY

ADM6315

V

CC

MR

GND

RESET

Supervisory Circuit in 4-Lead SOT-143

ADM6315

FEATURES
Specified over Temperature
Low Power Consumption (5 ␮A Typ)
Precision Voltage Monitor of Voltages from 2.5 V to 5 V

at 100 mV Increments

Reset Assertion Down to V

CC

> 1 V

Reset Timeout Periods: 1 ms, 20 ms, 140 ms,

or 1120 ms (Min)
Built-In Manual Reset
Pin Compatible with the ADM811
Available in SOT-143 Package

APPLICATIONS
Microprocessor Systems
Controllers
Intelligent Instruments
Automotive Systems
Safety Systems
Portable Instruments

GENERAL DESCRIPTION

The ADM6315 is a reliable voltage monitoring device that is
suitable for use in most voltage monitoring applications.

The ADM6315 is designed to monitor as little as a 1.8% degra­dation of a power supply voltage. Voltages that can be monitored
by the ADM6315 are all voltages (at 100 mV increments) from

2.5 V to 5 V.
Included in this circuit is a debounced manual reset input. RESET

can be activated using an ordinary switch (pulling MR low), a low
input from another digital device, or a degradation of the supply
voltage. The manual reset function is very useful, especially if the
circuit in which the ADM6315 is operating enters into a state that
can be detected only by the user. Allowing the user to manually
reset a system can reduce the damage or danger that could other­wise be caused by an out-of-control or locked-up system.

The ADM6315 comes in a cost and space efficient SOT-143
package.

FUNCTIONAL BLOCK DIAGRAM

V

CC

10k⍀

MR

ADM6315

RESET

GND

SYSTEM POWER

␮P

SYSTEM

RESET

GND

Figure 1. Typical Operating Circuit

REV. C

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2003 Analog Devices, Inc. All rights reserved.

ADM6315–SPECIFICATIONS

(VCC = Full Operating Range, TA = T
otherwise noted.)

MIN

to T

, VCC Typ = 5 V, unless

MAX

Parameter Min Typ Max Unit Test Conditions/Comments

SUPPLY

Operating Voltage 1 5.5 V TA = –40°C to +85°C

Supply Current 5 12 µAV

V

CC

15 µAV

410 µAV

12 µAV

RESET VOLTAGE V

THRESHOLD (V

)V

TH

– 1.8% V

TH

– 2.5% V

TH

V

– 3.5% V

TH

TH

V

+ 1.8% V TA = 25°C

TH

+ 2.5% V TA = –40°C to +85°C

TH

+ 3.5% V TA = –40°C to +125°C

TH

= 5.5 V, No Load, TA = –40°C to +85°C

CC

= 5.5 V, No Load, TA = –40°C to +125°C

CC

= 3.6 V, No Load, TA = –40°C to +85°C

CC

= 3.6 V, No Load, TA = –40°C to +125°C

CC

RESET THRESHOLD
TEMPERATURE COEFFICIENT 60 ppm/°C

VCC TO RESET DELAY 35 µsV

= Falling at 1 mV/µs

CC

RESET ACTIVE TIMEOUT PERIOD

ADM6315xxD1 1 1.4 2 ms T

0.8 2.4 ms T

ADM6315xxD2 20 28 40 ms T

= –40°C to +85°C

A

= –40°C to +125°C

A

= –40°C to +85°C

A

16 48 ms TA = –40°C to +125°C

ADM6315xxD3 140 200 280 ms T

112 336 ms T

ADM6315xxD4 1120 1570 2240 ms T

= –40°C to +85°C

A

= –40°C to +125°C

A

= –40°C to +85°C

A

896 2688 ms TA = –40°C to +125°C

MANUAL RESET

Input Threshold 0.8 V V

2.4 V V

0.3 V

CC

0.7 V

CC

VV
VV

> 4 V (VIL)

TH

> 4 V (VIH)

TH

< 4 V (VIL)

TH

< 4 V (VIH)

TH

Minimum Input Pulse 1 µs
Glitch Rejection 100 ns
To Reset Delay 500 ns
Pull-Up Resistance 32 63 100 kΩ

RESET OUTPUT

Output Voltage 0.4 V V

0.3 V V

0.3 V V

Output Leakage Current 1 µAV

Specifications subject to change without notice.

CC

CC

CC

CC

> 4.25 V, I
> 2.5 V, I
> 1 V, I
> VTH, RESET De-asserted

SINK

SINK

= 3.2 mA

SINK

= 1.2 mA

= 80 µA

REV. C–2–

ADM6315

ABSOLUTE MAXIMUM RATINGS*

(TA = 25°C, unless otherwise noted.)

Terminal Voltage (With Respect to Ground)

V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V

CC

All Other Inputs . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V

Input Current

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA

V

CC

Output Current

RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA

Power Dissipation (T

= 70°C)

A

RA-4, SOT-143

Derate by 4 mW/°C above 70°C . . . . . . . . . . . . . . 320 mW

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 330°C/W

␪

JA

Operating Temperature Range . . . . . . . . . . –40°C to +125°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +160°C

Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C

ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 kV

*Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum ratings
for extended periods may affect device reliability.

PIN CONFIGURATION

1

GND

ADM6315

TOP VIEW

(Not to Scale)

23

RESET

4

V

CC

MR

PIN FUNCTION DESCRIPTIONS

Pin Mnemonic Function

1GND 0 V. Ground reference for all signals.
2 RESET Active Low Logic Output. RESET remains

low while V

is below the reset threshold or

CC

when MR is low; RESET then remains low
for either 1 ms (min), 20 ms (min), 140 ms
(min), or 1120 ms (min) after V

CC

rises

above the reset threshold and MR is high.

3 MR Manual Reset. This active low debounced

input will ignore input pulses of 100 ns
(typical) and is guaranteed to accept input
pulses of greater than 1 µs. Leave floating
when not used.

4V

CC

Monitored Supply Voltage.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADM6315 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.

REV. C

–3–

ADM6315

ORDERING GUIDE

Temperature Package Trip Timeout

Min

Model Range Package Description Option Point (ms) Branding

ADM6315-46D1ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.63 1 MDV
ADM6315-46D1ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.63 1 MDV

ADM6315-45D1ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.50 1 MDU
ADM6315-45D1ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.50 1 MDU

ADM6315-44D1ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.39 1 MDT
ADM6315-44D1ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.39 1 MDT

ADM6315-31D1ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 3.08 1 MDG
ADM6315-31D1ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 3.08 1 MDG

ADM6315-29D1ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 2.93 1 MDC
ADM6315-29D1ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 2.93 1 MDC

ADM6315-26D1ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 2.63 1 MDB
ADM6315-26D1ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 2.63 1 MDB

ADM6315-46D2ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.63 20 MEV
ADM6315-46D2ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.63 20 MEV

ADM6315-45D2ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.50 20 MEU
ADM6315-45D2ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.50 20 MEU

ADM6315-44D2ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.39 20 MET
ADM6315-44D2ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.39 20 MET

ADM6315-31D2ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 3.08 20 MEG
ADM6315-31D2ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 3.08 20 MEG

ADM6315-29D2ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 2.93 20 MEC
ADM6315-29D2ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 2.93 20 MEC

ADM6315-26D2ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 2.63 20 MEB
ADM6315-26D2ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 2.63 20 MEB

ADM6315-46D3ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.63 140 MFV
ADM6315-46D3ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.63 140 MFV

ADM6315-45D3ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.50 140 MFU
ADM6315-45D3ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.50 140 MFU

ADM6315-44D3ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.39 140 MFT
ADM6315-44D3ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.39 140 MFT

ADM6315-31D3ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 3.08 140 MFG
ADM6315-31D3ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 3.08 140 MFG

ADM6315-29D3ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 2.93 140 MFC
ADM6315-29D3ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 2.93 140 MFC

ADM6315-26D3ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 2.63 140 MFB
ADM6315-26D3ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 2.63 140 MFB

ADM6315-46D4ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.63 1120 MGV
ADM6315-46D4ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.63 1120 MGV

ADM6315-45D4ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.50 1120 MGU
ADM6315-45D4ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.50 1120 MGU

ADM6315-44D4ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.39 1120 MGT
ADM6315-44D4ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 4.39 1120 MGT

ADM6315-31D4ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 3.08 1120 MGG
ADM6315-31D4ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 3.08 1120 MGG

ADM6315-29D4ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 2.93 1120 MGC
ADM6315-29D4ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 2.93 1120 MGC

ADM6315-26D4ART-RL7 –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 2.63 1120 MGB
ADM6315-26D4ART-RL –40°C to +125°C Small Outline Transistor (SOT-143) RA-4 2.63 1120 MGB

–4–

REV. C

Typical Performance Characteristics–ADM6315

TEMPERATURE – ⴗC

0.995

–40

NORMALIZED RESET THRESHOLD – V

–20 0 20 40 60 80 100 125

1.000

1.005

0.990

SUPPLY VOLTAGE – V

0

05

SUPPLY CURRENT – ␮A

1234

2

12

4

6

8

10

–40ⴗC

+25ⴗC

+85ⴗC

10

8

VCC = 5.5

6

– ␮A

DD

I

4

2

0

–40

–20 0 20 40 60 80 100 125

VCC = 3

VCC = 1

TEMPERATURE – ⴗC

TPC 1. Supply Current vs. Temperature

450

400

350

300

250

200

150

100

POWER-DOWN RESET DELAY – ␮s

50

0

–40

–20 0 20 40 60 80 100 125

TEMPERATURE – ⴗC

VOD = 20mV

VOD = 125mV

VOD = 200mV

TPC 2. Power-Down Reset Delay vs. Temperature

800

700

600

500

400

300

200

100

MAXIMUM TRANSIENT DURATION – ␮s

0

–100

04

TPC 4. Maximum Transient Duration vs.

82060100 400

RESET COMPARATOR OVERDRIVE, (V

800 1200 1600

– VCC) – mV

TH

RESET

Comparator Overdrive

TPC 5. Normalized Reset Threshold vs. Temperature
(VCC Falling)

1.06

1.04

1.02

1.00

0.98

0.96

NORMALIZED RESET TIMEOUT PERIOD – ms

0.94
–40

–20 0 20 40 60 80 100 125

TEMPERATURE – ⴗC

TPC 3. Normalized Reset Timeout Period vs.
Temperature (VCC Rising)

REV. C

–5–

TPC 6. Supply Current vs. Supply Voltage

ADM6315

INTERFACING TO OTHER DEVICES’ OUTPUT

The ADM6315 series is designed to integrate with as many
devices as possible. One feature of the ADM6315 is the RESET
open-drain output, which can sink current from sources with a
voltage greater than the V

of the ADM6315 input, making it

CC

suitable for use in more diverse applications.

BENEFITS OF A VERY ACCURATE RESET THRESHOLD

Because the ADM6315 series can operate effectively even when
there are large degradations of the supply voltages (due to an
accurate internal voltage reference circuit), the possibility of a
malfunction during a power failure is greatly reduced.

V

CC

VCC TRIP POINT (MAX)

RESET

TRIP POINT

V

CC

V

TO RESET

CC

DELAY

VCC TRIP POINT (MIN)

VOL

Figure 2. VCC Power-Down/Brownout Timing Diagram

DETAILED DESCRIPTION

The ADM6315 is designed to protect the integrity of a system’s
operation by ensuring the proper operation of the system during
power-up, power-down, and brownout conditions.

When the ADM6315 is powered up (depending on the selected
reset active timeout), the RESET output of the ADM6315
remains low for a period typically equal to the reset active timeout
period. This is designed to give the system time to power up
correctly and for the power supply to stabilize before any devices
are brought out of reset and allowed to begin executing instruc­tions. Initializing a system in this way provides a more reliable
startup for microprocessor systems.

When a brownout condition occurs (assuming V

is falling at

CC

1 mV/µs), the ADM6315 produces a reset in typically 35 µs.
Producing a reset this fast means that the entire system can be
reset together before any part of the system’s voltage falls below
its recommended operating voltage. This can avoid dangerous
and/or erroneous operation of a microprocessor based system.

MANUAL RESET INPUT

The ADM6315 also provides an additional input, MR. This
input can be used either as a means for the system operator to
manually reset the system via a switch or for a digital circuit to
reset the system.

The MR input (typically) ignores negative going pulses faster
than 100 ns and is guaranteed to accept any negative going input
pulse of a duration greater than or equal to 1 µs. If MR is con-
nected to long cables or is used in a noisy environment, then placing
a 1 µF decoupling capacitor between the MR input and ground
further improves the glitch immunity of the ADM6315.

V

TRIP POINT (MAX)

CC

TRIP POINT

V

VCC TRIP POINT (MIN)

V

CC

RESET

CC

RESET ACTIVE TIMEOUT

Figure 3. VCC Power-Up Timing Diagram

TRANSIENT IMMUNITY

As well as being an accurate reset circuit, the ADM6315 has
good immunity to negative going transients (TPC 4). Because
of this characteristic, the ADM6315 is suitable for use in noisy
environments.

TPC 4 shows the reset comparator overdrive (the maximum mag­nitude of negative going pulses with respect to the typical reset
threshold) versus the pulse duration, without causing a reset.

–6–

REV. C

OUTLINE DIMENSIONS

4-Lead Small Outline Transistor Package [SOT-143]

(RA-4)

Dimensions shown in millimeters

1.92 BSC

ADM6315

1.40

1.20

PIN 1

0.15

0.05

SEATING

PLANE

4

1 2

0.20
BSC

COMPLIANT TO JEDEC STANDARDS TO-253D

3.04

2.80

0.89

0.76

3

2.64

2.10

1.22

0.80

0.20

0.08

0.50

0.30

0.60

0.40

8ⴗ
0ⴗ

REV. C

–7–

ADM6315

Revision History

Location Page

12/03—Data Sheet changed from REV. B to REV. C.

Edit to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Deleted Table I and Table II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Deleted Table III and Table IV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2/03—Data Sheet changed from REV. A to REV. B.

Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Edits to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Edits to Table I and Table II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Edits to Table III and Table IV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

10/01—Data Sheet changed from REV. 0 to REV. A.

Edits to Table III . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Edits to Table IV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

C00081–0–12/03(C)

–8–

REV. C