ANALOG DEVICES ADM560 Service Manual
Ultralow Power +3.3 V, RS-232
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Notebook PC Serial Port Drivers/Receivers
FEATURES
RS-232 compatible
Operates with 3 V or 5 V logic
Ultralow power CMOS: 1.3 mA operation
Low power shutdown: 0.2 μA
Suitable for serial port mice
116 kbps data rate
1 μF charge pump capacitors
Single +3 V to +3.6 V power supply
Two receivers active in shutdown (ADM560)
APPLICATIONS
Notebook computers
Peripherals
Modems
Printers
Battery-operated equipment
CMOS
INPUTS
CMOS
OUTPUTS
EN (ADM560)
EN (ADM561)
ADM560/ADM561
FUNCTIONAL BLOCK DIAGRAM
+3.3V INPUT
R1
R2
R3
R4
R5
1µF
10V
1µF
10V
12
C1+
14
C1–
15
C2+
16
C2–
7
6
20
21
8
5
26
22
19
24
+3.3V TO +6.6V
VOLTAGE
DOUBLER
+6.6V TO –6. 6V
VOLTAGE
INVERTER
T1
T2
T3
T4
R1
R2
R3
R4
R5
ADM560/
GND
ADM561
10
+
+
T1
IN
T2
IN
T3
IN
T4
IN
OUT
OUT
OUT
OUT
OUT
Figure 1.
11
V
CC
13
V+
17
V–
2
3
1
28
9
4
27
23
18
25
C3
+
1µF
6.3V
C4
+
1µF
10V
T1
T2
T3
T4
R1
R2
R3
R4
R5
SHDN (ADM560)
SHDN (ADM561)
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
0.1µF
EIA/TI A-232
OUTPUTS
EIA/TI A-232
INPUTS
05667-001
GENERAL DESCRIPTION
The ADM560/ADM561 are four driver/five receiver interface
devices designed to meet the EIA-232 standard and operate with
a single +3.3 V power supply. The devices feature an on-board
dc-to-dc converter, eliminating the need for dual ±5 V power
supplies. This dc-to-dc converter contains a voltage doubler
and voltage inverter, both of which internally generate ±6.6 V
from the input +3.3 V power supply.
The ADM560 and the ADM561 consume only 5 mW making
em ideally suited for battery and other power-sensitive appli-
th
cations. A shutdown facility is also provided to reduce the power
to 0.66 μW.
The ADM560 contains active low shutdown and an active high
r
eceiver enable signal. In shutdown mode, two receivers remain
active, thereby allowing monitoring of peripheral devices. This
feature allows the device to be shut down until a peripheral
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
device begins communication. The active receivers alert the
p
rocessor, and then take the ADM560 out of shutdown mode.
The ADM561 features active high shutdown and an active
lo
w receiver enable. In this device, all receivers are disabled
in shutdown.
The ADM560/ADM561 are fabricated using CMOS technology
or minimal power consumption. They feature a high level of
f
over-voltage protection and latch-up immunity. The receiver
inputs can withstand up to ±25 V levels. The transmitter inputs
can be driven from either 3 V or 5 V logic levels. This allows
operation in mixed 3 V/5 V power supply systems.
The ADM560/ADM561 are packaged in a 28-lead SOIC and
a 28-lead SSO
P package.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.
ADM560/ADM561
www.BDTIC.com/ADI
TABLE OF CONTENTS
Features.............................................................................................. 1
Pin Configuration and Function Descriptions..............................5
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
REVISION HISTORY
9/06—Rev. A to Rev. B
Updated Format..................................................................Universal
Changes to Specifications................................................................ 3
10/05—Rev. 0 to Rev. A
U
pdated Format..................................................................Universal
Changes to Specifications................................................................ 3
Update to Outline Dimensions....................................................... 9
Changes to Ordering Guide.......................................................... 10
Typical Performance Characteristics..............................................6
Theory of Operation .........................................................................8
Circuit Description .......................................................................8
Enable and Shutdown...................................................................8
Outline Dimensions..........................................................................9
Ordering Guide .......................................................................... 10
7/94—Revision 0: Initial Version
Rev. B | Page 2 of 12
ADM560/ADM561
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SPECIFICATIONS
VCC = +3.3 V ± 10%, C1 to C4 = 1 μF, all specifications T
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
Output Voltage Swing ±5.0 ±5.5 V VCC = 3.3 V, three transmitter outputs loaded with 3 kΩ to ground
±4 ±4.5 V VCC = 3.0 V, all transmitter outputs, loaded with 3 kΩ to ground
VCC Power Supply Current 3.5 5 mA No load, TIN = VCC
3.5 5 mA No load, TIN = GND
Shutdown Supply Current 0.2 5 μA
Input Logic Threshold Low, V
Input Logic Threshold High, V
Logic Pull-Up Current 3 20 μA TIN = GND
EIA-232 Input Voltage Range –25 +25 V
EIA-232 Input Threshold Low 0.4 0.8 V
EIA-232 Input Threshold High 1.1 2.4 V
EIA-232 Input Hysteresis 0.3 V
EIA-232 Input Resistance 3 5 7 kΩ
CMOS Output Voltage Low, VOL 0.4 V I
CMOS Output Voltage High, VOH 2.8 V I
CMOS Output Leakage Current +0.05 ±5 μA
Output Enable Time 100 ns
Output Disable Time 50 ns
Receiver Propagation Delay
TPHL 0.1 1 μs
TPLH 0.5 2 μs
Transition Region Slew Rate 4.5 V/μs
Transmitter Output Resistance 300 Ω VCC = V+ = V− = 0 V, V
RS-232 Output Short-Circuit Current ±10 mA
0.4 V
INL
2.4 V
INH
MIN
to T
, unless otherwise noted.
MAX
= GND (ADM560), SHDN = VCC (ADM561), TIN = VCC
SHDN
, EN, EN , SHDN, SHDN
T
IN
, EN, EN, SHDN, SHDN
T
IN
= 1.6 mA
OUT
= −40 mA
OUT
= VCC, EN = GND, 0 V ≤ R
EN
= 3 kΩ, CL = 2500 pF measured from +3 V to −3 V or
R
L
−3 V to +3 V
= ±2 V
OUT
OUT
≤ VCC
Rev. B | Page 3 of 12
ADM560/ADM561
www.BDTIC.com/ADI
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 2.
Parameter Rating
VCC −0.3 V to +6 V
V+ (VCC − 0.3 V) to +14 V
V− +0.3 V to −14 V
Input Voltages
TIN −0.3 V to (V+, +0.3 V)
RIN 25 V
Output Voltages
T
(V+, +0.3 V) to (V−, −0.3 V)
OUT
R
−0.3 V to (VCC + 0.3 V)
OUT
Short-Circuit Duration
T
Continuous
OUT
Power Dissipation
SSOP 900 mW
SOIC 900 mW
Operating Temperature Range
Commercial (J Version) 0°C to +70°C
Storage Temperature Range −65°C to +150°C
Lead Temperature
(Soldering, 10 sec)
ESD Rating >2000 V
+300°C
Stresses above those listed under Absolute Maximum Ratings
ma
y cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. B | Page 4 of 12
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