Full-Duplex, Low Power,
Slew Rate Limited, EIA RS-485 Transceivers
FEATURES
Meets EIA RS-485 and RS-422 standards
250 kbps data rate
Single 5 V ± 10% supply
−7 V to +12 V bus common-mode range
12 kΩ input impedance
2 kV EFT protection meets IEC1000-4-4
High EM immunity meets IEC1000-4-3
Reduced slew rate for low EM interference
Short-circuit protection
Excellent noise immunity
30 µA supply current
APPLICATIONS
Low power RS-485 and RS-422 systems
DTE-DCE interface
Packet switching
Local area networks
Data concentration
Data multiplexers
Integrated services digital network (ISDN)
GENERAL DESCRIPTION
The ADM488 and ADM489 are low power, differential line
transceivers suitable for communication on multipoint bus
transmission lines. They are intended for balanced data
transmission and comply with both EIA Standards RS-485 and
RS-422. Both products contain a single differential line driver
and a single differential line receiver, making them suitable for
full-duplex data transfer. The ADM489 contains an additional
receiver and driver enable control.
The input impedance is 12 kΩ, allowing 32 transceivers to be
connected on the bus.
The ADM488/ADM489 operate from a single 5 V ± 10% power
supply. Excessive power dissipation caused by bus contention or
ADM488/ADM489
FUNCTIONAL BLOCK DIAGRAMS
ADM488
RO
DI
RO
RE
DE
DI
R
D
Figure 1.
ADM489
R
D
Figure 2.
output shorting is prevented by a thermal shutdown circuit.
This feature forces the driver output into a high impedance state
if, during fault conditions, a significant temperature increase is
detected in the internal driver circuitry.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The ADM488/ADM489 are fabricated on BiCMOS, an
advanced mixed technology process combining low power
CMOS with fast switching bipolar technology.
The ADM488/ADM489 are fully specified over the industrial
temperature range and are available in PDIP, SOIC, and TSSOP
packages.
A
B
Z
Y
A
B
Z
Y
00079-001
00079-002
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
www.analog.com
ADM488/ADM489
TABLE OF CONTENTS
Specifications..................................................................................... 3
Fast Transient Burst Immunity (IEC1000-4-4) ...................... 11
Timing Specifications .................................................................. 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Test C ir c uit s ................................................................................... 7
Switching Characteristics ............................................................ 8
Typical Performance Characteristics ............................................. 9
Theory of Operation ...................................................................... 11
EFT Transient Protection Scheme............................................ 11
REVISION HISTORY
11/04–Data Sheet Changed from Rev. B to Rev. C
Updated Format ................................................................. ..Universal
Changes to Receiving Truth Table Inputs ......................................11
Renamed General Information to Theory of Operation..............12
Radiated Immunity (IEC1000-4-3) ......................................... 12
EMI Emissions............................................................................ 13
Conducted Emissions ................................................................ 13
Application Information................................................................ 14
Differential Data Transmission ................................................ 14
Cable and Data Rate................................................................... 14
Outline Dimensions ....................................................................... 15
Ordering Guide .......................................................................... 16
Updated Outline Dimensions..........................................................15
Changes to Ordering Guide.............................................................16
5/01–Data Sheet Changed from Rev. A to Rev. B
Changed to Absolute Maximum Ratings ........................................3
3/01–Data Sheet Changed from Rev. 0 to Rev. A
Changed to ESD specification, Absolute Maximum Ratings .......3
6/97–Revision 0: Initial Version
Rev. C | Page 2 of 16
ADM488/ADM489
SPECIFICATIONS
VCC = 5 V ± 10%. All specifications T
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Differential Output Voltage, V
OD
2.0 5.0 V VCC = 5 V, R = 50 Ω (RS-422), Figure 6
1.5 5.0 V R = 27 Ω (RS-485), Figure 6
1.5 5.0 V V
∆|VOD| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, Figure 6
Common-Mode Output Voltage, V
∆ |VOC| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω
Output Short-Circuit Current (V
Output Short-Circuit Current (V
CMOS Input Logic Threshold Low, V
CMOS Input Logic Threshold High, V
Logic Input Current (DE, DI) ±1.0 µA
RECEIVER
Differential Input Threshold Voltage, V
Input Voltage Hysteresis, ∆ V
TH
Input Resistance 12 kΩ −7 V ≤ VCM ≤ +12 V
Input Current (A, B) 1 mA VIN = 12 V
−0.8 mA VIN = –7 V
Logic Enable Input Current (RE)
CMOS Output Voltage Low, V
CMOSOutput Voltage High, V
OL
OH
Short-Circuit Output Current 7 85 mA V
Three-State Output Leakage Current ±1.0 µA 0.4 V ≤ V
POWER SUPPLY CURRENT Outputs unloaded, receivers enabled
I
CC
37 74 µA DE = 5 V (enabled)
MIN
to T
, unless otherwise noted.
MAX
5.0 V R = ∞, Figure 6
= –7 V to +12 V, Figure 7, VCC = 5 V ± 5%
TST
OC
= High) 250 mA −7 V ≤ VO ≤ +12 V
OUT
= Low) 250 mA −7 V ≤ VO ≤ +12 V
OUT
INL
INH
TH
3 V R = 27 Ω or 50 Ω, Figure 6
1.4 0.8 V
2.0 1.4 V
−0.2 +0.2 V −7 V ≤ VCM ≤ +12 V
70 mV VCM = 0 V
±1 µA
0.4 V I
4.0 V I
= +4.0 mA
OUT
= −4.0 mA
OUT
= GND or V
OUT
OUT
30 60 µA DE = 0 V (disabled)
CC
≤ +2.4 V
Rev. C | Page 3 of 16
ADM488/ADM489
TIMING SPECIFICATIONS
VCC = 5 V ± 10%. All specifications T
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Propagation Delay Input to Output, T
Driver O/P to OP, T
Driver Rise/Fall Time, TR, T
SKEW
F
Driver Enable to Output Valid 250 2000 ns RL = 500 Ω, CL = 100 pF, Figure 7
Driver Disable Timing 300 3000 ns RL = 500 Ω, CL = 15 pF, Figure 7
Data Rate 250 kbps
RECEIVER
Propagation Delay Input to Output, T
Skew | T
Receiver Enable, T
Receiver Disable, T
PLH
− T
| 100 ns
PHL
EN1
EN2
Data Rate 250 kbps
MIN
to T
PLH
PLH
, unless otherwise noted.
MAX
, T
PHL
250 2000 ns RL Differential = 54 Ω, CL1 = CL2 = 100 pF, Figure 10
100 800 ns RL Differential = 54 Ω, CL1 = CL2 = 100 pF, Figure 10
250 2000 ns RL Differential = 54 Ω, CL1 = CL2 = 100 pF, Figure 10
, T
PHL
250 2000 ns CL = 15 pF, Figure 10
10 50 ns RL = 1 kΩ, CL = 15 pF, Figure 9
10 50 ns RL = 1 kΩ, CL = 15 pF, Figure 9
Rev. C | Page 4 of 16
ADM488/ADM489
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
V
CC
Inputs
Driver Input (DI) −0.3 V to VCC + 0.3 V
Control Inputs (DE, RE)
Receiver Inputs (A, B) −14 V to +14 V
Outputs
Driver Outputs −14 V to +12.5 V
Receiver Output −0.5 V to VCC + 0.5 V
Power Dissipation 8-Lead PDIP 700 mW
θJA, Thermal Impedance 120°C/W
Power Dissipation 8-Lead SOIC 520 mW
θJA, Thermal Impedance 110°C/W
Power Dissipation 14-Lead PDIP 800 mW
θJA, Thermal Impedance 140°C/W
Power Dissipation 14-Lead SOIC 800 mW
θJA, Thermal Impedance 120°C/W
Power Dissipation 16-Lead TSSOP 800 mW
θJA, Thermal Impedance 150°C/W
Operating Temperature Range
Industrial (A Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 secs) 300°C
Vapor Phase (60 secs) 215°C
Infrared (15 secs) 220°C
ESD Association S5.1 HBM Standard 3 kV
EFT Rating, IEC1000-4-4 2 kV
7 V
−0.3 V to V
+ 0.3 V
CC
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum ratings for extended periods of time may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. C | Page 5 of 16
ADM488/ADM489
G
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
V
1
CC
ADM488
RO
2
TOP VIEW
(Not to Scale)
3
DI
ND
4
Figure 3. ADM488 8-Lead PDIP/SOIC Pin Configuration
Table 4. ADM488 Pin Function Descriptions
Pin Mnemonic Description
1 V
CC
Power Supply, 5 V ± 10%.
2 RO Receiver Output. When A > B by 200 mV, RO = high. If A < B by 200 mV, RO = low.
3 DI Driver Input. A logic low on DI forces Y low and Z high, while a logic high on DI forces Y high and Z low.
4 GND Ground Connection, 0 V.
5 Y Noninverting Driver, Output Y.
6 Z Inverting Driver, Output Z.
7 B Inverting Receiver Input B.
8 A Noninverting Receiver Input A.
8
A
7
B
6
Z
5
Y
00079-003
1
NC
RO
2
3
RE
DE
4
(Not to Scale)
DI
5
GND
6
GND
7
NC = NO CONNECT
ADM489
TOP VIEW
14
V
CC
13
NC
12
A
B
11
Z
10
Y
9
NC
8
00079-004
V
GND
GND
CC
NC
RO
RE
DE
Figure 4. ADM489 14-Lead PDIP/SOIC Pin Configuration
Figure 5. ADM489 16-Lead TSSOP Pin Configuration
Table 5. ADM489 Pin Function Descriptions
DIP/SOIC
Pin
TSSOP
Pin Mnemonic Description
1, 8, 13 2, 9, 10, 13, 16 NC No Connect. No connections are required to this pin.
2 3 RO
Receiver Output. When enabled, if A > B by 200 mV then RO = high. If A < B by 200 mV then
RO = low.
3 4
RE Receiver Output Enable. A low level enables the receiver output, RO. A high level places it in a
high impedance state.
4 5 DE
Driver Output Enable. A high level enables the driver differential outputs, Y and Z. A low level
places it in a high impedance state.
5 6 DI
Driver Input. When the driver is enabled, a logic low on DI forces Y low and Z high, while a logic
high on DI forces Y high and Z low.
6, 7 7, 8 GND Ground Connection, 0 V.
9 11 Y Noninverting Driver Output Y.
10 12 Z Inverting Driver Output Z.
11 14 B Inverting Receiver Input B.
12 15 A Noninverting Receiver Input A.
14 1 V
CC
Power Supply, 5 V ± 10%.
1
2
3
ADM489
4
TOP VIEW
5
(Not to Scale)
6
DI
7
8
NC = NO CONNECT
16
NC
15
A
14
B
13
NC
Z
12
Y
11
NC
10
NC
9
00079-005
Rev. C | Page 6 of 16
ADM488/ADM489
TEST CIRCUITS
V
CC
L
S2
00079-022
RO
R
RE
00079-023
V
OD
Figure 6. Driver Voltage Measurement Test Circuit
375Ω
V
60Ω
OD3
375Ω
Figure 7. Driver Enable/Disable Test Circuit
A
0V OR 3V
DE IN
DE
S1 S2
B
Figure 8. Driver Voltage Measurement Test Circuit 2
R
R
V
OC
00079-019
+1.5V
–1.5V
S1
RE IN
RE
R
C
L
V
OUT
Figure 9. Receiver Enable/Disable Test Circuit
3V
DE
V
TST
00079-020
Y
DI
D
Z
RL
DIFF
A
C
L1
B
C
L2
Figure 10. Driver/Receiver Propagation Delay Test Circuit
V
CC
R
L
C
L
V
OUT
00079-021
Rev. C | Page 7 of 16
ADM488/ADM489
A
SWITCHING CHARACTERISTICS
+VO
–VO
3V
0V
B
A
0V
1.5V
T
PLH
1/2VO
VO
T
SKEW
90% POINT
10% POINT
T
R
Figure 11. Driver Propagation Delay, Rise/Fall Timing
–B
RO
0V
T
PLH
1.5V 1.5V
Figure 12. Receiver Propagation Delay
1.5V
T
PHL
3V
T
PHL
T
SKEW
90% POINT
10% POINT
T
F
00079-006
A, B
A, B
1.5VDE
T
ZL
2.3V
T
ZH
2.3V
T
T
1.5V
LZ
HZ
+ 0.5V
V
OL
VOH– 0.5V
0V
V
OL
V
OH
00079-008
0V
Figure 13. Driver Enable/Disable Timing
3V
RE
0V
R
V
OH
R
V
00079-007
OL
0V
1.5V 1.5V
T
ZL
1.5V
O/P LOW
T
ZH
O/P HIGH
1.5V
T
LZ
T
HZ
V
+ 0.5V
OL
VOH– 0.5V
0V
V
OL
V
OH
00079-009
Figure 14. Receiver Enable/Disable Timing
Rev. C | Page 8 of 16
ADM488/ADM489
TYPICAL PERFORMANCE CHARACTERISTICS
40
35
30
25
20
15
OUTPUT CURRENT (mA)
10
5
0
0 0.5 2.0 2.5
1.0 1.5
OUTPUT VOLTAGE (V)
Figure 15. Receiver Output Low Voltage vs. Output Current
00079-010
0
–10
–20
–30
–40
–50
–60
OUTPUT CURRENT (mA)
–70
–80
–90
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
0 5.0
OUTPUT VOLTAGE (V)
Figure 18. Driver Output High Voltage vs. Output Current
00079-013
0
–5
–10
–15
OUTPUT CURRENT (mA)
–20
3.4 3.6 5.03.8 4.0 4.2 4.4 4.6 4.8
OUTPUT VOLTAGE (V)
Figure 16. Receiver Output High Voltage vs. Output Current
90
80
70
60
50
40
30
OUTPUT CURRENT (mA)
20
10
0
0 3.0
0.5
1.5
1.0
OUTPUT VOLTAGE (V)
2.0
Figure 17. Driver Output Low Voltage vs. Output Current
2.5
00079-011
00079-012
80
70
60
50
40
30
20
OUTPUT CURRENT (mA)
10
0
0 0.5 4.5
1.5
1.0
OUTPUT VOLTAGE (V)
2.5
2.0 3.0
3.5
4.0
Figure 19. Driver Differential Output Voltage vs. Output Current
T
100
T
90
T
10
0%
Figure 20. Driving 4000 Ft. of Cable
RO
DI
00079-014
00079-015
Rev. C | Page 9 of 16
ADM488/ADM489
100
90
10dB/DIV
10
0%
500kHz/DIV0 5MHz
00079-016
Figure 21. Driver Output Waveform and FFT Plot Transmitting at 150 kHz
80
70
60
50
40
dB (µV)
30
20
10
0
30 200
FREQUENCY (MHz)
LIMIT
Figure 22. Radiated Emissions
80
70
60
LIMIT
00079-017
50
40
dB (µV)
30
20
10
0
0.3 0.6 1 6 10 30
LOG FREQUENCY (0.15–30) (MHz)
3
00079-018
Figure 23. Conducted Emissions
Rev. C | Page 10 of 16
ADM488/ADM489
THEORY OF OPERATION
The ADM488/ADM489 are ruggedized RS-485 transceivers
that operate from a single 5 V supply. They contain protection
against radiated and conducted interference and are ideally
suited for operation in electrically harsh environments or where
cables can be plugged/unplugged. They are also immune to
high RF field strengths without special shielding precautions.
They are intended for balanced data transmission and comply
with both EIA Standards RS-485 and RS-422. They contain a
differential line driver and a differential line receiver, and are
suitable for full-duplex data transmission.
The input impedance on the ADM488/ADM489 is 12 kΩ,
allowing up to 32 transceivers on the differential bus. The
ADM488/ADM489 operate from a single 5 V ± 10% power
supply. Excessive power dissipation caused by bus contention or
by output shorting is prevented by a thermal shutdown circuit.
This feature forces the driver output into a high impedance state
if, during fault conditions, a significant temperature increase is
detected in the internal driver circuitry.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating). A
high level of robustness is achieved using internal protection
circuitry, eliminating the need for external protection components such as tranzorbs or surge suppressors. Furthermore,
low electromagnetic emissions are achieved using slew limited
drivers, minimizing interference both conducted and radiated.
The ADM488/ADM489 can transmit at data rates up to
250 kbps. A typical application for the ADM488/ADM489 is
illustrated in Figure 24 showing a full-duplex link where data is
transferred at rates of up to 250 kbps. A terminating resistor is
shown at both ends of the link. This termination is not critical
because the slew rate is controlled by the ADM488/ADM489
and reflections are minimized.
The communications network can be extended to include
multipoint connections, as shown in Figure 30. As many as
32 transceivers may be connected to the bus.
5V
0.1µF
Table 6 and Table 7 show the truth tables for transmitting and
receiving.
Table 6. Transmitting Truth Table
Inputs Outputs
RE
DE DI Z Y
X 1 1 0 1
X 1 0 1 0
0 0 X Hi-Z Hi-Z
1 0 X Hi-Z Hi-Z
X = Don’t Care.
Table 7. Receiving Truth Table
Inputs Output
RE
DE A-B RO
0 0 ≥ +0.2 V 1
0 0
≤ −0.2 V
0
0 0 Inputs O/C 1
1 0 X Hi-Z
X = Don’t Care.
EFT TRANSIENT PROTECTION SCHEME
The ADM488/ADM489 use protective clamping structures on
their inputs and outputs that clamp the voltage to a safe level
and dissipate the energy present in ESD (electrostatic) and EFT
(electrical fast transients) discharges.
FAST TRANSIENT BURST IMMUNITY (IEC1000-4-4)
IEC1000-4-4 (previously 801-4) covers electrical fast transient
burst (EFT) immunity. Electrical fast transients occur as a result
of arcing contacts in switches and relays. The tests simulate the
interference generated when, for example, a power relay disconnects
an inductive load. A spark is generated due to the well-known
back EMF effect. In fact, the spark consists of a burst of sparks
as the relay contacts separate. The voltage appearing on the line,
therefore, consists of a burst of extremely fast transient impulses.
A similar effect occurs when switching on fluorescent lights.
5V
0.1µF
V
CC
RE
RO
ADM488
DI
DE
A
R
B
Z
D
Y
Figure 24. ADM488/ADM489 Full-Duplex Data Link
RS-485/RS-422 LINK
Rev. C | Page 11 of 16
Y
Z
B
A
V
CC
D
ADM489
R
GNDGND
DE
DI
RO
RE
00079-024
ADM488/ADM489
VtV
The fast transient burst test, defined in IEC1000-4-4, simulates
this arcing, and its waveform is illustrated in Figure 25. It
consists of a burst of 2.5 kHz to 5 kHz transients repeating at
300 ms intervals. It is specified for both power and data lines.
Four severity levels are defined in terms of an open-circuit voltage as a function of installation environment. The installation
environments are defined as
• Wel l pro t ec t ed
• Protected
• Typica l i nd u s t rial
• Severe industrial
300ms 16ms
5ns
50ns
0.2/0.4ms
Figure 25. IEC1000-4-4 Fast Transient Waveform
Table 8 shows the peak voltages for each of the environments.
Table 8. Peak Voltages
Level V
(kV) PSU V
PEAK
PEAK
1 0.5 0.25
2 1 0.5
3 2 1
4 4 2
A simplified circuit diagram of the actual EFT generator is
shown in Figure 26.
These transients are coupled onto the signal lines using an EFT
coupling clamp. The clamp is 1 m long and completely surrounds the cable, providing maximum coupling capacitance
(50 pF to 200 pF typical) between the clamp and the cable. High
energy transients are capacitively coupled onto the signal lines.
Fast rise times (5 ns), as specified by the standard, result in very
effective coupling. This test is very severe because high voltages
are coupled onto the signal lines. The repetitive transients often
cause problems, while single pulses do not. Destructive latch-up
can be induced due to the high energy content of the transients.
Note that this stress is applied while the interface products are
powered up and transmitting data. The EFT test applies hun-
t
(kV) I/O
00079-025
dreds of pulses with higher energy than ESD. Worst-case
transient current on an I/O line can be as high as 40 A.
HIGH
VOLTAGE
SOURCE
R
C
C
C
Figure 26. EFT Generator
L
Z
S
D
M
50Ω
OUTPUT
00079-026
C
R
Test results are classified according to the following:
• Normal performance within specification limits.
• Temporary degradation or loss of performance that is self-
recoverable.
• Temporary degradation or loss of function or performance
that requires operator intervention or system reset.
• Degradation or loss of function that is not recoverable due
to damage.
The ADM488/ADM489 have been tested under worst-case
conditions using unshielded cables, and meet Classification 2 at
Severity Level 4. Data transmission during the transient
condition is corrupted, but it can be resumed immediately
following the EFT event without user intervention.
RADIATED IMMUNITY (IEC1000-4-3)
IEC1000-4-3 (previously IEC801-3) describes the measurement
method and defines the levels of immunity to radiated electromagnetic fields. It was originally intended to simulate the
electromagnetic fields generated by portable radio transceivers
or any other device that generates continuous wave-radiated
electromagnetic energy. Its scope has been broadened to include
spurious EM energy, which can be radiated from fluorescent
lights, thyristor drives, inductive loads, and so on.
Testing for immunity involves irradiating the device with an
EM field. Test methods include the use of anechoic chamber,
stripline cell, TEM cell, and GTEM cell. These consist of two
parallel plates with an electric field developed between them.
The device under test is placed between the plates and exposed
to the electric field. The three severity levels have field strengths
ranging from 1 V/m to 10 V/m. Results are classified as follows:
• Normal operation.
• Temporary degradation or loss of function that is self-
recoverable when the interfering signal is removed.
• Temporary degradation or loss of function that requires
operator intervention or system reset when the interfering
signal is removed.
• Degradation or loss of function that is not recoverable due
to damage.
Rev. C | Page 12 of 16
ADM488/ADM489
The ADM488/ADM489 comfortably meet Classification 1 at
the most stringent (Level 3) requirement. In fact, field strengths
up to 30 V/m showed no performance degradation, and errorfree data transmission continued even during irradiation.
Table 9. Field Strengths
Level V/m Field Strength
1 1
2 3
3 10
EMI EMISSIONS
The ADM488/ADM489 contain internal slew rate limiting to
minimize the level of electromagnetic interference generated.
Figure 27 shows an FFT plot when transmitting a 150 kHz data
stream.
The objective is to control the level of both conducted and
radiated emissions.
For ease of measurement and analysis, conducted emissions are
assumed to predominate below 30 MHz, while radiated
emissions predominate above this frequency.
CONDUCTED EMISSIONS
Conducted Emissions is a measure of noise that is conducted
onto the mains power supply. The noise is measured using a
LISN (linc impedance stabilizing network) and a spectrum
analyzer. The test setup is shown in Figure 28. The spectrum
analyzer is set to scan the spectrum from 0 MHz to 30 MHz.
Figure 29 shows that the level of conducted emissions from the
ADM488/ADM489 is well below the maximum allowable
limits.
SPECTRUM
ANALYZER
100
90
10dB/DIV
10
0%
500kHz/DIV0 5MHz
Figure 27. Driver Output Waveform and FFT Plot Transmitting at 105 kHz
The slew limiting attenuates the high frequency components.
EMI is, therefore, reduced, as are reflections due to improperly
terminated cables.
EN55022, CISPR22 defines the permitted limits of radiated and
conducted interference from information technology
equipment (ITE).
DUT
LISN PSU
00079-028
Figure 28. Conducted Emissions Test Setup
80
70
60
50
40
00079-027
dB (µV)
30
20
10
0
0.6
0.3
1
LOG FREQUENCY (0.15–30) (MHz)
36 10
30
LIMIT
00079-029
Figure 29. Conducted Emissions
Rev. C | Page 13 of 16
ADM488/ADM489
APPLICATION INFORMATION
DIFFERENTIAL DATA TRANSMISSION
Differential data transmission is used to reliably transmit data at
high rates over long distances and through noisy environments.
Differential transmission nullifies the effects of ground shifts
and noise signals, which appear as common-mode voltages on
the line. Two main standards are approved by the Electronics
Industries Association (EIA), which specify the electrical characteristics of transceivers used in differential data transmission.
The RS-422 standard specifies data rates up to 10 MBaud and
line lengths up to 4000 ft. A single driver can drive a transmission line with up to 10 receivers.
To cater to true multipoint communications, the RS-485 standard was defined to meet or exceed the requirements of RS-422.
It also allows up to 32 drivers and 32 receivers to be connected
to a single bus. An extended common-mode range of −7 V to
+12 V is defined. The most significant difference between the
RS-422 and RS-485 is that the RS-485 drivers can be disabled,
thereby allowing more than one (32, in fact) to be connected to
a single line. Only one driver should be enabled at a time, but
the RS-485 standard contains additional specifications to
guarantee device safety in the event of line contention.
Table 10. Comparison of RS-422 and RS-485 Interface Standards
Specification RS-422 RS-485
Transmission type Differential Differential
Maximum data rate 10 MB/s 10 MB/s
Maximum cable length 4000 ft. 4000 ft.
Minimum driver output voltage ±2 V ±1.5 V
Driver load impedance 100 Ω 54 Ω
Receiver input resistance 4 k Ω minimum 12 k Ω minimum
Receiver input sensitivity ±200 mV ±200 mV
Receiver input voltage range −7 V to +7 V −7 V to +12 V
Number of drivers/receivers per line 1/10 32/32
RT RT
CABLE AND DATA RATE
The transmission line of choice for RS-485 communications is a
twisted pair. Twisted-pair cable tends to cancel common-mode
noise and also causes cancellation of the magnetic fields generated by the current flowing through each wire, thereby reducing
the effective inductance of the pair.
The ADM488/ADM489 are designed for bidirectional data
communications on multipoint transmission lines. A typical
application showing a multipoint transmission network is
illustrated in Figure 30. An RS-485 transmission line can have
up to 32 transceivers on the bus. Only one driver can transmit
at a particular time, but multiple receivers can be simultaneously enabled.
As with any transmission line, it is important that reflections be
minimized. This can be achieved by terminating the extreme
ends of the line using resistors equal to the characteristic impedance of the line. Stub lengths of the main line should also be
kept as short as possible. A properly terminated transmission
line appears purely resistive to the driver.
D
R
D
R
D
Figure 30. Typical RS-485 Network
Rev. C | Page 14 of 16
R
D
R
00079-030
ADM488/ADM489
OUTLINE DIMENSIONS
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
8
1
0.100 (2.54)
0.180
(4.57)
MAX
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-095AA
BSC
5
4
0.295 (7.49)
0.285 (7.24)
0.275 (6.98)
0.015
(0.38)
MIN
SEATING
PLANE
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
Figure 31. 8-Lead Plastic DIP (N-8)
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
85
1.27 (0.0500)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012AA
BSC
6.20 (0.2440)
5.80 (0.2284)
41
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0196)
0.25 (0.0099)
8°
1.27 (0.0500)
0°
0.40 (0.0157)
Figure 32. 8-Lead Standard Small Outline Package [SOIC] (R-8)
Dimensions show in millimeters and (inches)
0.685 (17.40)
0.665 (16.89)
0.645 (16.38)
14
17
0.295 (7.49)
0.285 (7.24)
0.275 (6.99)
8
0.180 (4.57)
MAX
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 34. 14-Lead Standard Small Outline Package [SOIC] (R-14)
16
4.50
4.40
4.30
×
45°
0.15
0.05
PIN 1
0.65
BSC
Figure 35. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16)
0.685 (17.40)
0.665 (16.89)
0.645 (16.38)
14
17
0.100 (2.54)
BSC
0.015 (0.38)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
COMPLIANT TO JEDEC STANDARDS MO-095-AB
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
8
MIN
0.295 (7.49)
0.285 (7.24)
0.275 (6.99)
SEATING
PLANE
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
Dimensions shown in millimeters (inches)
5.10
5.00
4.90
9
6.40
BSC
81
1.20
MAX
0.30
0.19
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153AB
SEATING
PLANE
0.20
0.09
8°
0°
Dimensions shown in millimeters
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.75
0.60
0.45
0.100 (2.54)
BSC
0.015 (0.38)
MIN
0.180 (4.57)
MAX
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
COMPLIANT TO JEDEC STANDARDS MO-095-AB
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
SEATING
PLANE
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
Figure 33. 14-Lead Plastic Dual In-Line Package [PDIP] (N-14)
Dimensions shown in inches and (millimeters)
Rev. C | Page 15 of 16
ADM488/ADM489
ORDERING GUIDE
Temperature
Model
ADM488AN −40°C to +85°C 8-Lead Plastic Dual In-Line Package [PDIP] N-8
ADM488AR −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC] R-8
ADM488AR-REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC] R-8
ADM488AR-REEL7 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC] R-8
ADM488ARZ
1
ADM488ARZ-REEL1 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC] R-8
ADM488ARZ-REEL71 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC] R-8
ADM489AN −40°C to +85°C 14-Lead Plastic Dual In-Line Package [PDIP] N-14
ADM489AR −40°C to +85°C 14-Lead Standard Small Outline Package [SOIC] R-14
ADM489AR-REEL −40°C to +85°C 14-Lead Standard Small Outline Package [SOIC] R-14
ADM489AR-REEL7 −40°C to +85°C 14-Lead Standard Small Outline Package [SOIC] R-14
ADM489ARU −40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADM489ARU-REEL −40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADM489ARU-REEL7 −40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADM489ARUZ1 −40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADM489ARUZ-REEL1 −40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADM489ARUZ-REEL71 −40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
1
Z = Pb-free part.
Range Package Description Package Option
−40°C to +85°C 8-Lead Standard Small Outline Package [SOIC] R-8
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C00079–0–11/04(C)
Rev. C | Page 16 of 16
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