Meets EIA RS-485 and RS-422 standards
250 kbps data rate
Single 5 V ± 10% supply
−7 V to +12 V bus common-mode range
12 kΩ input impedance
2 kV EFT protection meets IEC1000-4-4
High EM immunity meets IEC1000-4-3
Reduced slew rate for low EM interference
Short-circuit protection
Excellent noise immunity
30 µA supply current
APPLICATIONS
Low power RS-485 and RS-422 systems
DTE-DCE interface
Packet switching
Local area networks
Data concentration
Data multiplexers
Integrated services digital network (ISDN)
GENERAL DESCRIPTION
The ADM488 and ADM489 are low power, differential line
transceivers suitable for communication on multipoint bus
transmission lines. They are intended for balanced data
transmission and comply with both EIA Standards RS-485 and
RS-422. Both products contain a single differential line driver
and a single differential line receiver, making them suitable for
full-duplex data transfer. The ADM489 contains an additional
receiver and driver enable control.
The input impedance is 12 kΩ, allowing 32 transceivers to be
connected on the bus.
The ADM488/ADM489 operate from a single 5 V ± 10% power
supply. Excessive power dissipation caused by bus contention or
ADM488/ADM489
FUNCTIONAL BLOCK DIAGRAMS
ADM488
RO
DI
RO
RE
DE
DI
R
D
Figure 1.
ADM489
R
D
Figure 2.
output shorting is prevented by a thermal shutdown circuit.
This feature forces the driver output into a high impedance state
if, during fault conditions, a significant temperature increase is
detected in the internal driver circuitry.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The ADM488/ADM489 are fabricated on BiCMOS, an
advanced mixed technology process combining low power
CMOS with fast switching bipolar technology.
The ADM488/ADM489 are fully specified over the industrial
temperature range and are available in PDIP, SOIC, and TSSOP
packages.
A
B
Z
Y
A
B
Z
Y
00079-001
00079-002
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Changes to Ordering Guide.............................................................16
5/01–Data Sheet Changed from Rev. A to Rev. B
Changed to Absolute Maximum Ratings ........................................3
3/01–Data Sheet Changed from Rev. 0 to Rev. A
Changed to ESD specification, Absolute Maximum Ratings .......3
6/97–Revision 0: Initial Version
Rev. C | Page 2 of 16
ADM488/ADM489
SPECIFICATIONS
VCC = 5 V ± 10%. All specifications T
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Differential Output Voltage, V
OD
2.0 5.0 V VCC = 5 V, R = 50 Ω (RS-422), Figure 6
1.5 5.0 V R = 27 Ω (RS-485), Figure 6
1.5 5.0 V V
∆|VOD| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, Figure 6
Common-Mode Output Voltage, V
∆ |VOC| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω
Output Short-Circuit Current (V
Output Short-Circuit Current (V
CMOS Input Logic Threshold Low, V
CMOS Input Logic Threshold High, V
Logic Input Current (DE, DI) ±1.0 µA
RECEIVER
Differential Input Threshold Voltage, V
Input Voltage Hysteresis, ∆ V
TH
Input Resistance 12 kΩ −7 V ≤ VCM ≤ +12 V
Input Current (A, B) 1 mA VIN = 12 V
−0.8 mA VIN = –7 V
Logic Enable Input Current (RE)
CMOS Output Voltage Low, V
CMOSOutput Voltage High, V
OL
OH
Short-Circuit Output Current 7 85 mA V
Three-State Output Leakage Current ±1.0 µA 0.4 V ≤ V
POWER SUPPLY CURRENT Outputs unloaded, receivers enabled
I
CC
37 74 µA DE = 5 V (enabled)
MIN
to T
, unless otherwise noted.
MAX
5.0 V R = ∞, Figure 6
= –7 V to +12 V, Figure 7, VCC = 5 V ± 5%
TST
OC
= High) 250 mA −7 V ≤ VO ≤ +12 V
OUT
= Low) 250 mA −7 V ≤ VO ≤ +12 V
OUT
INL
INH
TH
3 V R = 27 Ω or 50 Ω, Figure 6
1.4 0.8 V
2.0 1.4 V
−0.2 +0.2 V −7 V ≤ VCM ≤ +12 V
70 mV VCM = 0 V
±1 µA
0.4 V I
4.0 V I
= +4.0 mA
OUT
= −4.0 mA
OUT
= GND or V
OUT
OUT
30 60 µA DE = 0 V (disabled)
CC
≤ +2.4 V
Rev. C | Page 3 of 16
ADM488/ADM489
TIMING SPECIFICATIONS
VCC = 5 V ± 10%. All specifications T
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
Driver Input (DI) −0.3 V to VCC + 0.3 V
Control Inputs (DE, RE)
Receiver Inputs (A, B) −14 V to +14 V
Outputs
Driver Outputs −14 V to +12.5 V
Receiver Output −0.5 V to VCC + 0.5 V
Power Dissipation 8-Lead PDIP 700 mW
θJA, Thermal Impedance 120°C/W
Power Dissipation 8-Lead SOIC 520 mW
θJA, Thermal Impedance 110°C/W
Power Dissipation 14-Lead PDIP 800 mW
θJA, Thermal Impedance 140°C/W
Power Dissipation 14-Lead SOIC 800 mW
θJA, Thermal Impedance 120°C/W
Power Dissipation 16-Lead TSSOP 800 mW
θJA, Thermal Impedance 150°C/W
Operating Temperature Range
Industrial (A Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 secs) 300°C
Vapor Phase (60 secs) 215°C
Infrared (15 secs) 220°C
ESD Association S5.1 HBM Standard 3 kV
EFT Rating, IEC1000-4-4 2 kV
7 V
−0.3 V to V
+ 0.3 V
CC
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum ratings for extended periods of time may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. C | Page 5 of 16
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