ANALOG DEVICES ADM488 Service Manual
www.BDTIC.com/ADI
Full-Duplex, Low Power,
Slew Rate Limited, EIA RS-485 Transceivers
FEATURES
Meets EIA RS-485 and RS-422 standards
250 kbps data rate
Single 5 V ± 10% supply
−7 V to +12 V bus common-mode range
12 kΩ input impedance
2 kV EFT protection meets IEC1000-4-4
High EM immunity meets IEC1000-4-3
Reduced slew rate for low EM interference
Short-circuit protection
Excellent noise immunity
30 μA supply current
APPLICATIONS
Low power RS-485 and RS-422 systems
DTE-DCE interface
Packet switching
Local area networks
Data concentration
Data multiplexers
Integrated services digital network (ISDN)
GENERAL DESCRIPTION
The ADM488 and ADM489 are low power, differential line
transceivers suitable for communication on multipoint bus
transmission lines. They are intended for balanced data
transmission and comply with both Electronics Industries
Association (EIA) RS-485 and RS-422 standards. Both products
contain a single differential line driver and a single differential
line receiver, making them suitable for full-duplex data transfer.
The ADM489 contains an additional receiver and driver enable
control.
ADM488/ADM489
FUNCTIONAL BLOCK DIAGRAMS
ADM488
RO
DI
RO
RE
DE
DI
R
D
Figure 1.
ADM489
R
D
Figure 2.
The receiver contains a fail-safe feature that results in a logic
hig
h output state if the inputs are unconnected (floating).
The ADM488/ADM489 are fabricated on BiCMOS, an
dvanced mixed technology process combining low power
a
CMOS with fast switching bipolar technology.
The ADM488/ADM489 are fully specified over the industrial
emperature range and are available in PDIP, SOIC, and TSSOP
t
packages.
A
B
Z
Y
00079-001
A
B
Z
Y
00079-002
The input impedance is 12 kΩ, allowing 32 transceivers to be
nnected on the bus.
co
The ADM488/ADM489 operate from a single 5 V ± 10% power
pply. Excessive power dissipation caused by bus contention or
su
output shorting is prevented by a thermal shutdown circuit.
This feature forces the driver output into a high impedance state
if, during fault conditions, a significant temperature increase is
detected in the internal driver circuitry.
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.
ADM488/ADM489
www.BDTIC.com/ADI
TABLE OF CONTENTS
Features.............................................................................................. 1
Theory of Operation ...................................................................... 11
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams............................................................. 1
Specifications..................................................................................... 3
Timing Specifications .................................................................. 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Test Circuits................................................................................... 7
Switching Characteristics ............................................................ 8
Typical Performance Characteristics ............................................. 9
REVISION HISTORY
4/06—Rev. C to Rev. D
Updated Outline Dimensions....................................................... 15
Changes to Ordering Guide.......................................................... 16
EFT Transient Protection Scheme ........................................... 11
Fast Transient Burst Immunity (IEC1000-4-4)...................... 11
Radiated Immunity (IEC1000-4-3) ......................................... 12
EMI Emissions............................................................................ 13
Conducted Emissions................................................................ 13
Application Information................................................................ 14
Differential Data Transmission ................................................ 14
Cable and Data Rate................................................................... 14
Outline Dimensions....................................................................... 15
Ordering Guide .......................................................................... 16
11/04—Rev. B to Rev. C
pdated Format..................................................................Universal
U
Changes to Receiving Truth Table Inputs Data Section............ 11
Renamed General Information to Theory of Operation........... 12
Updated Outline Dimensions....................................................... 15
Changes to Ordering Guide.......................................................... 16
5/01—Rev. A to Rev. B
C
hanges to Absolute Maximum Ratings Section......................... 3
3/01—Rev. 0 to Rev. A
C
hanges to ESD Specification, Absolute Maximum Ratings...... 3
6/97—Revision 0: Initial Version
Rev. D | Page 2 of 16
ADM488/ADM489
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SPECIFICATIONS
VCC = 5 V ± 10%. All specifications T
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Differential Output Voltage, VOD 5.0 V R = ∞, see Figure 6
2.0 5.0 V VCC = 5 V, R = 50 Ω (RS-422), see Figure 6
1.5 5.0 V R = 27 Ω (RS-485), see Figure 6
1.5 5.0 V V
Δ|VOD| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, see Figure 6
Common-Mode Output Voltage, VOC 3 V R = 27 Ω or 50 Ω, see Figure 6
Δ|VOC| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω
Output Short-Circuit Current (V
Output Short-Circuit Current (V
CMOS Input Logic Threshold Low, V
CMOS Input Logic Threshold High, V
Logic Input Current (DE, DI) ±1.0 μA
RECEIVER
Differential Input Threshold Voltage, VTH −0.2 +0.2 V −7 V ≤ VCM ≤ +12 V
Input Voltage Hysteresis, Δ VTH 70 mV VCM = 0 V
Input Resistance 12 kΩ −7 V ≤ VCM ≤ +12 V
Input Current (A, B) 1 mA VIN = 12 V
−0.8 mA VIN = –7 V
Logic Enable Input Current (RE)
CMOS Output Voltage Low, VOL 0.4 V I
CMOS Output Voltage High, VOH 4.0 V I
Short-Circuit Output Current 7 85 mA V
Three-State Output Leakage Current ±1.0 μA 0.4 V ≤ V
POWER SUPPLY CURRENT Outputs unloaded, receivers enabled
ICC 30 60 μA DE = 0 V (disabled)
37 74 μA DE = 5 V (enabled)
to T
MIN
= High) 250 mA −7 V ≤ VO ≤ +12 V
OUT
= Low) 250 mA −7 V ≤ VO ≤ +12 V
OUT
1.4 0.8 V
INL
INH
, unless otherwise noted.
MAX
= –7 V to +12 V, see Figure 7, VCC = 5 V ± 5%
TST
2.0 1.4 V
±1 μA
= +4.0 mA
OUT
= −4.0 mA
OUT
= GND or VCC
OUT
OUT
≤ +2.4 V
Rev. D | Page 3 of 16
ADM488/ADM489
www.BDTIC.com/ADI
TIMING SPECIFICATIONS
VCC = 5 V ± 10%. All specifications T
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Propagation Delay Input to Output, T
Driver O/P to OP, T
SKEW
Driver Rise/Fall Time, TR, TF 250 2000 ns
Driver Enable to Output Valid 250 2000 ns RL = 500 Ω, CL = 100 pF, see Figure 7
Driver Disable Timing 300 3000 ns RL = 500 Ω, CL = 15 pF, see Figure 7
Data Rate 250 kbps
RECEIVER
Propagation Delay Input to Output, T
Skew |T
Receiver Enable, T
Receiver Disable, T
PLH
− T
| 100 ns
PHL
10 50 ns RL = 1 kΩ, CL = 15 pF, see Figure 9
EN1
10 50 ns RL = 1 kΩ, CL = 15 pF, see Figure 9
EN2
Data Rate 250 kbps
MIN
to T
PLH
, unless otherwise noted.
MAX
, T
250 2000 ns
PHL
Differential = 54 Ω, CL1 = CL2 = 100 pF,
R
L
see Figure 10
100 800 ns
RL Differential = 54 Ω, CL1 = CL2 = 100 pF,
see Figure 10
Differential = 54 Ω, CL1 = CL2 = 100 pF,
R
L
see Figure 10
, T
250 2000 ns CL = 15 pF, see Figure 10
PLH
PHL
Rev. D | Page 4 of 16
ADM488/ADM489
www.BDTIC.com/ADI
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
VCC 7 V
Inputs
Driver Input (DI) −0.3 V to VCC + 0.3 V
Control Inputs (DE, RE)
Receiver Inputs (A, B) −14 V to +14 V
Outputs
Driver Outputs −14 V to +12.5 V
Receiver Output −0.5 V to VCC + 0.5 V
Power Dissipation 8-Lead PDIP 700 mW
θJA, Thermal Impedance 120°C/W
Power Dissipation 8-Lead SOIC 520 mW
θJA, Thermal Impedance 110°C/W
Power Dissipation 14-Lead PDIP 800 mW
θJA, Thermal Impedance 140°C/W
Power Dissipation 14-Lead SOIC 800 mW
θJA, Thermal Impedance 120°C/W
Power Dissipation 16-Lead TSSOP 800 mW
θJA, Thermal Impedance 150°C/W
Operating Temperature Range
Industrial (A Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
ESD Association S5.1 HBM Standard 3 kV
EFT Rating, IEC1000-4-4 2 kV
−0.3 V to V
+ 0.3 V
CC
Stresses above those listed under Absolute Maximum Ratings
y cause permanent damage to the device. This is a stress
ma
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. D | Page 5 of 16
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