ANALOG DEVICES ADM487E Service Manual

5 V, ±15 kV ESD Protected

V

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Half-Duplex, RS-485/RS-422 Transceivers

FEATURES

TIA/EIA RS-485/RS-422 compliant
ESD protection on RS-485 I/O pins
±15 kV human body model (HBM)
Data rates

ADM487E: 250 kbps

ADM485E/ADM1487E: 2.5 Mbps
Half-duplex
Reduced slew rates for low EMI
Common-mode input range: −7 V to +12 V
Thermal shutdown and short-circuit protection
8-lead SOIC packages

APPLICATIONS

Energy/power metering
Lighting systems
Industrial control
Telecommunications
Security systems
Instrumentation

GENERAL DESCRIPTION

The ADM485E/ADM487E/ADM1487E are 5 V, low power
data transceivers with ±15 kV ESD protection suitable for half­duplex communication on multipoint bus transmission lines.
They are designed for balanced data transmission and comply
with Telecommunication Industry Association/Electronics
Industries Association (TIA/EIA) standards RS-485 and RS-422.
The ADM487E and ADM1487E have a 1/4 unit load receiver
input impedance that allows up to 128 transceivers on a bus,
whereas the ADM485E allows up to 32 transceivers on a bus.
Because only one driver is enabled at any time, the output of a
disabled or power-down driver is three-stated to avoid overloading
the bus.

ADM485E/ADM487E/ADM1487E

FUNCTIONAL BLOCK DIAGRAM

CC

ADM485E/
ADM487E/

ADM1487E

RO

RE

DE

DI

The driver outputs are slew rate limited to reduce EMI and data
errors caused by reflections from improperly terminated buses.
Excessive power dissipation caused by bus contention or output
shorting is prevented with a thermal shutdown circuit.

The parts are fully specified over the industrial temperature
ranges and are available in 8-lead SOIC packages.

R

D

GND

Figure 1.

A

B

06356-001

Table 1. Selection Table

Guaranteed
Part
Number

ADM485E Half 2.5 No No Yes 300 32 8
ADM487E Half 0.25 Yes Yes Yes 120 128 8
ADM1487E Half 2.5 No No Yes 230 128 8

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

Half-/Full­Duplex

Data Rate

(Mbps)

Slew Rate
Limited

Low Power
Shutdown

Driver/Receiver
Enable

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2007–2008 Analog Devices, Inc. All rights reserved.

Quiescent
Current (μA)

Number of
Nodes on Bus

Pin
Count

ADM485E/ADM487E/ADM1487E

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TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Timing Specifications .................................................................. 4

Absolute Maximum Ratings ............................................................ 6

ESD Caution .................................................................................. 6

Pin Configuration and Function Descriptions ............................. 7

REVISION HISTORY

3/08—Rev. 0 to Rev. A

Changes to Supply Voltage Range .................................... Universal

Added Endnote 1 .............................................................................. 3

Changes to Table 3 ............................................................................ 4

Changes to Table 4 ............................................................................ 5

Changes to Figure 12 ........................................................................ 9

Changes to Figure 27 and Table 9 ................................................. 14

Changes to Figure 29 ...................................................................... 15

Updated Outline Dimensions ....................................................... 16

1/07—Revision 0: Initial Version

Typical Performance Characteristics ..............................................8

Test Circuits and Switching Characteristics ................................ 11

Theory of Operation ...................................................................... 13

Circuit Description .................................................................... 13

Applications Information .............................................................. 15

Differential Data Transmission ................................................ 15

Cable and Data Rate ................................................................... 15

Outline Dimensions ....................................................................... 16

Ordering Guide .......................................................................... 16

Rev. A | Page 2 of 16

ADM485E/ADM487E/ADM1487E

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SPECIFICATIONS

VCC = 5 V ± 10%, TA = T

Table 2. ADM485E/ADM487E/ADM1487E

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DRIVER

Differential Outputs

Differential Output Voltage (No Load) V
Differential Output Voltage (with Load) V

Δ |VOD| for Complementary Output States 0.2 V RL = 27 Ω or 50 Ω (see Figure 18)
Common-Mode Output Voltage VOC 3 V RL = 27 Ω or 50 Ω (see Figure 18)
Δ |VOC| for Complementary Output States 0.2 V RL = 27 Ω or 50 Ω (see Figure 18)

Logic Inputs

Input High Voltage VIH 2.0 V
Input Low Voltage VIL 0.8 V
Logic Input Current1 I

RECEIVER

Input Current (A, B) I

Differential Inputs

Differential Input Threshold Voltage VTH −0.2 +0.2 V −7 V < V
Input Hysteresis ΔVTH 70 mV VCM = 0 V

Receiver Output Logic

Output Voltage High VOH 3.5 V I
Output Voltage Low VOL 0.4 V I
Three-State Output Leakage Current I
Receiver Input Resistance RIN 12 kΩ −7 V < VCM < +12 V (ADM485E)

POWER SUPPLY

No Load Supply Current ICC 500 900 μA

Supply Current in Shutdown I
Driver Short-Circuit Current, VO High I

Driver Short-Circuit Current, VO Low I
Receiver Short-Circuit Current I

ESD PROTECTION

A, B ±15 kV Human body model

1

Supply voltage is 5 V ± 5%.

MIN

to T

, unless otherwise noted.

MAX

OD1

OD2

1.5 5 V RL = 27 Ω (RS-485) (see Figure 18)

±2 μA

IN1

1.0 mA DE = 0 V, VIN = 12 V

IN2

−0.8 mA VCC = 0 V or 5.25 V, VIN = −7 V (ADM485E)

0.25 mA DE = 0 V, VIN = 12 V

−0.2 mA

±1 μA 0.4 V < VO < 2.4 V

OZR

48 kΩ −7 V < VCM < +12 V (ADM487E/ADM1487E)

300 500 μA
300 500 μA
230 400 μA
250 400 μA
120 250 μA

SHDN

OSD1

OSD2

7 95 mA 0 V ≤ VO ≤ VCC

OSR

5 V
2 V RL = 50 Ω (RS-422)

DE, DI, RE
DE, DI, RE
DE, DI, RE

V

CC

= 0 V or 5.25 V, VIN = −7 V

(ADM487E/ADM1487E)

< +12 V

CM

= −4 mA, VID = +200 mV

OUT

= +4 mA, VID = −200 mV

OUT

= 0 V or VCC, DE = VCC (ADM485E)

RE

= 0 V or VCC, DE = 0 V (ADM485E)

RE

= 0 V or VCC, DE = VCC (ADM1487E)

RE

= 0 V or VCC, DE = 0 V (ADM1487E)

RE

= 0 V or VCC, DE = VCC (ADM487E)

RE

= 0 V, DE = 0 V (ADM487E)

RE

0.5 10 μA

DE = 0 V, RE

= VCC (ADM487E)
35 250 mA −7 V ≤ VO ≤ +12 V, applies to peak current
35 250 mA −7 V ≤ VO ≤ +12 V, applies to peak current

Rev. A | Page 3 of 16

ADM485E/ADM487E/ADM1487E

www.BDTIC.com/ADI

TIMING SPECIFICATIONS

VCC = 5 V ± 10%, TA = T

Table 3. ADM485E/ADM1487E

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DRIVER

Driver Propagation Delay Input to Output, Low to High t

Driver Propagation Delay Input to Output, High to Low

Output Skew to Output t

Rise/Fall Time tDR, tDF 3 20 40 ns R

Enable Time to High Level t
Enable Time to Low Level t
Disable Time from Low Level t
Disable Time from High Level t

RECEIVER

Receiver Propagation Delay Input to Output, Low to High t
Receiver Propagation Delay Input to Output, High to Low t
|t

− t

| Differential Receiver Skew t

PLH

PHL

Enable Time to Low Level t
Enable Time to High Level t
Disable Time from Low Level t
Disable Time from High Level t

MAXIMUM DATA RATE f

MIN

to T

, unless otherwise noted.

MAX

10 40 60 ns R

DPLH

t

10 40 60 ns R

DPHL

5 10 ns R

SKEW

45 70 ns

DZH

45 70 ns

DZL

45 70 ns

DLZ

45 70 ns

DHZ

20 60 200 ns

RPLH

20 60 200 ns

RPHL

5 ns

SKEW

25 50 ns

RZL

20 50 ns

RZH

20 50 ns

RLZ

20 50 ns t

RHZ

2.5 Mbps

MAX

= 54 Ω, CL1 = CL2 = 100 pF

DIFF

(see

Figure 19 and Figure 20)

= 54 Ω, CL1 = CL2 = 100 pF

DIFF

(see

Figure 19 and Figure 20)

= 54 Ω, CL1 = CL2 = 100 pF

DIFF

(see

Figure 19 and Figure 20)

= 54 Ω, CL1 = CL2 = 100 pF

DIFF

(see

Figure 19 and Figure 20)

C

= 100 pF, S1 closed (see Figure 21)

L

C

= 100 pF, S1 closed (see Figure 22)

L

C

= 15 pF, S1 closed (see Figure 22)

L

C

= 15 pF, S1 closed (see Figure 21)

L

See

Figure 23 and Figure 24

See

Figure 23 and Figure 24

See

Figure 23 and Figure 24

C

= 15 pF, S2 closed (see Figure 25)

L

C

= 15 pF, S1 closed (see Figure 25)

L

C

= 15 pF, S2 closed (see Figure 25)

L

, t

< 50% of data period

PLH

PHL

Rev. A | Page 4 of 16

ADM485E/ADM487E/ADM1487E

www.BDTIC.com/ADI

VCC = 5 V ± 10%, TA = T

Table 4. ADM487E

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DRIVER

Driver Propagation Delay Input to Output, Low to High t

Driver Propagation Delay Input to Output, High to Low

Output Skew to Output t

Rise/Fall Time tDR, tDF 250 2000 ns R

Enable Time to High Level t
Enable Time to Low Level t
Disable Time from Low Level t
Disable Time from High Level t

RECEIVER

Receiver Propagation Delay Input to Output, Low to High t
Receiver Propagation Delay Input to Output, High to Low t
|t

− t

| Differential Receiver Skew t

PLH

PHL

Enable Time to Low Level t
Enable Time to High Level t
Disable Time from Low Level t
Disable Time from High Level t
Maximum Data Rate f
Time to Shutdown1 t
Driver Enable from Shutdown to Output High t
Driver Enable from Shutdown to Output Low t
Receiver Enable from Shutdown to Output High t
Receiver Enable from Shutdown to Output Low t

1

The ADM487E is put into shutdown mode by bringing RE high and DE low. If the inputs are in this state for less than 50 ns, the parts are guaranteed not to enter

shutdown. If the inputs are in this state for at least 600 ns, the ADM487E is guaranteed to enter shutdown.

MIN

to T

, unless otherwise noted.

MAX

250 800 2000 ns R

DPLH

t

250 800 2000 ns R

DPHL

250 20 800 ns R

SKEW

250 2000 ns

DZH

2000 ns

DZL

300 3000 ns

DLZ

300 3000 ns

DHZ

250 2000 ns

RPLH

250 2000 ns

RPHL

100 ns

SKEW

25 50 ns

RZL

25 50 ns

RZH

25 50 ns

RLZ

25 50 ns t

RHZ

250 kbps

MAX

50 200 600 ns

SHDN

5000 ns

DZH(SHDN)

5000 ns

DZL(SHDN)

5000 ns

RZH(SHDN)

5000 ns

RZL(SHDN)

= 54 Ω, CL1 = CL2 = 100 pF

DIFF

(see

Figure 19 and Figure 20)

= 54 Ω, CL1 = CL2 = 100 pF

DIFF

(see

Figure 19 and Figure 20)

= 54 Ω, CL1 = CL2 = 100 pF

DIFF

(see

Figure 19 and Figure 20)

= 54 Ω, CL1 = CL2 = 100 pF

DIFF

(see

Figure 19 and Figure 20)

C

= 100 pF, S1 closed (see Figure 21)

L

C

= 100 pF, S1 closed (see Figure 22)

L

C

= 15 pF, S1 closed (see Figure 22)

L

C

= 15 pF, S1 closed (see Figure 21)

L

See

Figure 23 and Figure 24

See

Figure 23 and Figure 24

See

Figure 23 and Figure 24

C

= 15 pF, S2 closed (see Figure 25)

L

C

= 15 pF, S1 closed (see Figure 25)

L

C

= 15 pF, S2 closed (see Figure 25)

L

, t

< 50% of data period

PLH

PHL

C

= 100 pF, S1 closed (see Figure 21)

L

C

= 100 pF, S1 closed (see Figure 22)

L

C

= 15 pF, S2 closed (see Figure 25)

L

C

= 15 pF, S1 closed (see Figure 25)

L

Rev. A | Page 5 of 16

ADM485E/ADM487E/ADM1487E

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ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 5.

Parameter Rating
VCC to GND −0.5 V to +6 V
Digital I/O Voltage (DE, RE)
Driver Input Voltage (DI) −0.5 V to (VCC + 0.5 V)
Receiver Output Voltage (RO) −0.5 V to (VCC + 0.5 V)
Driver Output/Receiver Input Voltage

(A, B)
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
θJA Thermal Impedance, 8-Lead SOIC 158°C/W
Lead Temperature, Soldering (10 sec) 260°C

−0.5 V to (V

−9 V to +14 V

+ 0.5 V)

CC

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

ESD CAUTION

Rev. A | Page 6 of 16

ADM485E/ADM487E/ADM1487E

www.BDTIC.com/ADI

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

RO

1

ADM485E/
ADM487E/

RE

2

ADM1487E

3

DE

TOP VIEW

(Not to Scale)

DI

4

Figure 2. Pin Configuration

Table 6. Pin Function Descriptions

Pin No. Mnemonic Description

1 RO Receiver Output. When enabled, if A > B by 200 mV, then RO = high. If A < B by 200 mV, then RO = low.
2

RE

3 DE

Receiver Output Enable. A low level enables the RO; a high level places it in a high impedance state.
Driver Output Enable. A high level enables the driver differential outputs, Pin A and Pin B; a low level places

the driver in a high impedance state.

4 DI

Driver Input. When the driver is enabled, a logic low on DI forces Pin A low and Pin B high; a logic high on DI

forces Pin A high and Pin B low.
5 GND Ground Connection (0 V).
6 A Noninverting Receiver Input A/Driver Output A.
7 B Inverting Receiver Input B/Driver Output B.
8 VCC Power Supply (5 V ± 10%).

V

8

CC

B

7

6

A

GND

5

06356-002

Rev. A | Page 7 of 16

ADM485E/ADM487E/ADM1487E

–

www.BDTIC.com/ADI

TYPICAL PERFORMANCE CHARACTERISTICS

50

45

40

35

30

25

20

15

OUTPUT CURRENT (mA)

10

5

0

0 0.5 1.0 1.5 2.0 2.5

OUTPUT LOW VOLTAGE (V)

Figure 3. Output Current vs. Receiver Output Low Voltage

06356-016

0.9

0.8

0.7

0.6

0.5

0.4

0.3

OUTPUT LO W VOLT AGE (V)

0.2

0.1

0

–40 –20 0 20 40 60 80

IRO = 8mA

TEMPERATURE ( °C)

Figure 6. Receiver Output Low Voltage vs. Temperature

06356-019

30

–25

–20

–15

–10

OUTPUT CURRENT ( mA)

–5

0

1.5 2.0 2. 5 3.0 3.5 4.0 4.5 5.0

OUTPUT HIG H VOLTAG E (V)

Figure 4. Output Current vs. Receiver Output High Voltage

4.5

4.4

4.3

4.2

4.1

OUTPUT HIGH VOLTAGE (V)

4.0

3.9
–40 –20 0 20 40 60 80

TEMPERATURE (° C)

IRO = –8mA

Figure 5. Receiver Output High Voltage vs. Temperature

45

40

35

30

25

20

15

OUTPUT CURRENT ( mA)

10

5

06356-017

0

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

DIFFERENTIAL OUTPUT VOLTAGE (V)

06356-020

Figure 7. Driver Output Current vs. Differential Output Voltage

2.3

2.2

2.1

2.0

1.9

1.8

1.7

DIFFERENTIAL OUTPUT VOLTAGE (V)

1.6

06356-018

1.5
–40 –20 0 20 40 60 80

TEMPERATURE ( °C)

06356-021

Figure 8. Driver Differential Output Voltage vs. Temperature

Rev. A | Page 8 of 16

ADM485E/ADM487E/ADM1487E

–

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140

120

100

80

60

40

OUTPUT CURRENT ( mA)

20

0

024681012

OUTPUT LOW VOLTAGE (V)

Figure 9. Output Current vs. Driver Output Low Voltage

140

–120

–100

–80

–60

–40

OUTPUT CURRENT (mA)

–20

0

–8–6–4–20246

OUTPUT HIG H VOLTAG E (V)

Figure 10. Output Current vs. Driver Output High Voltage

06356-022

06356-023

600

500

400

300

200

SUPPLY CURRENT (µA)

100

0

–40 –20 0 20 40 60 80

DE = VCC AND RE = 1

DE = 0 AND RE = 0

TEMPERATURE ( °C)

Figure 12. ADM487E Supply Current vs. Temperature

10

9

8

7

6

5

4

3

SHUTDOWN CURRENT ( µA)

2

1

0

–60 –20–40 0 204060 10080

TEMPERATURE ( °C)

Figure 13. Shutdown Current vs. Temperature

06356-025

06356-026

600

500

400

300

200

SUPPLY CURRENT (µA)

100

0

–40 –20 0 20 40 60 80

DE = VCC AND RE = 1

DE = 0 AND RE = 1

TEMPERATURE ( °C)

Figure 11. ADM485E/ADM1487E Supply Current vs. Temperature

06356-024

Rev. A | Page 9 of 16

3

2

1

CH1 5.00V
CH3 500mV

T

B

A

R

O

CH2 500mV M200ns A CH1 2.80V

Figure 14. ADM487E Receiver t

T 57.60%

RPHL

06356-027

ADM485E/ADM487E/ADM1487E

www.BDTIC.com/ADI

3

2

1

A

B

R

CH1 5.00V
CH3 500mV

O

CH2 500mV M200ns A CH1 2.80V

Figure 15. ADM487E Receiver t

3

2

A

B

T

T 60.80%

Driven by External RS-485 Device

RPLH

T

3

B

2

A

1

R

06356-028

O

CH1 5.00V
CH3 500mV

CH2 500mV M20ns A CH1 2.70V

Figure 17. ADM485E/ADM1487E Receiver t

T

06356-030

T 60.80%

RPLH

R

O

1

CH1 5.00V
CH3 500mV

CH2 500mV M20ns A CH1 2.70V

T 60.80%

Figure 16. ADM485E/ADM1487E Receiver t

06356-029

RPHL

Rev. A | Page 10 of 16

ADM485E/ADM487E/ADM1487E

Y

V

V

V

V

V

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TEST CIRCUITS AND SWITCHING CHARACTERISTICS

R

L

V

OD

R

L

Z

Figure 18. Driver DC Test Load

V

OC

6356-003

0V OR 5V

GENERATOR

D

50Ω

S1

CC

RL = 500Ω

C

L

OUT

DIFF

DD

DE

C

DI

A

V

OD

B

R

L1

L

C

L2

06356-004

Figure 19. Driver Timing Test Circuit

5

DI

1.5V

0V

B

V

O

A

1/2V

O

V

O

0V

–V

20%

O

t

DR

t

DPLH

V

DIFF

80% 80%

t

SKEW

t

DPHL

= V (A) – V (B)

=

t

– t

DPLH

DPHL

20%

1/2V

O

t

DF

06356-005

Figure 20. Driver Propagation Delays

DE

t

DZL,

t

DZL(SHDN)

V

OUT

CC

V

OL

2.3V

Figure 22. Driver Enable and Disable Times (t

ATE

V

Figure 23. Receiver Propagation Delay Test Circuit

A

RO

B

V

OH

V

OL

1.5V

THE RISE T IME AND FALL TIME OF INPUT A AND INPUT B < 4ns

t

RPLH

Figure 24. Receiver Propagation Delays

VCC/2

t

DLZ

, t

DZL

DLZ

RECEIVER

B

ID

OUTPUT

R

A

, t

DZL(SHDN)

5V

0V

0.5V

06356-007

)

06356-008

+1

–1V

t

RPHL

06356-009

0V OR 5V

GENERATOR

DE

t

DZH(SHDN)

t

DZH,

D

50Ω

2.3VOUT

Figure 21. Driver Enable and Disable Times (t

S1

DZH

0.5V

, t

OUT

RL = 500Ω

5V

0V

V

0V

DZH(SHDN)

OH

06356-006

)

C

L

1.5V

t

DHZ

, t

DHZ

Rev. A | Page 11 of 16

ADM485E/ADM487E/ADM1487E

www.BDTIC.com/ADI

+1.5V

–1.5V

S3

0V OR 5V

V

ID

1kΩ

C

L

15pF

S1

V

CC

S2

RE

RO

RE

RO

t

RZH,tRZH(SHDN)

+0.5V

S2 CLOSED

S1 OPEN

S2 CLOSED

S3 = +1.5V

+1.5V

t

GENERATOR

S1 OPEN

S3 = +1.5V

RHZ

50Ω

S1 CLOSED

S2 OPEN

S3 = –1.5V

t

RZL,tRZL(SHDN)

S1 CLOSED

S3 = +1.5V

+1.5V

S2 OPEN

+0.5V

+1.5V

+5V

0V

V

0V

OH

+5V

0V

V

0V

RE

RO

RE

OH

RO

Figure 25. Receiver Enable and Disable Times

+5V

+1.5V

0V

V

CC

+1.5V

V

OL

+5V

t

RLZ

0V

V

CC

V

OL

06356-010

Rev. A | Page 12 of 16

ADM485E/ADM487E/ADM1487E

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THEORY OF OPERATION

The ADM485E/ADM487E/ADM1487E are ruggedized RS-485
transceivers that operate from a single 5 V supply. They contain
protection against high levels of electrostatic discharge and are
ideally suited for operation in electrically harsh environments
or where cables can be plugged or unplugged. These devices are
intended for balanced data transmission and comply with TIA/
EIA standards RS-485 and RS-422. They contain a differential
line driver and a differential line receiver, and are suitable for
half-duplex data transmission because the driver and receiver
share the same differential pins.

The input impedance on the ADM485E is 12 kΩ, allowing up
to 32 transceivers on the differential bus. The ADM487E/
ADM1487E are 48 kΩ, allowing up to 128 transceivers on the
differential bus.

CIRCUIT DESCRIPTION

The ADM485E/ADM487E/ADM1487E are operated from
a single 5 V ± 10% power supply. Excessive power dissipation
caused by bus contention or output shorting is prevented by
a thermal shutdown circuit. If, during fault conditions, a sig­nificant temperature increase is detected in the internal driver
circuitry, this feature forces the driver output into a high
impedance state.

The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).

A high level of robustness is achieved using internal protection
circuitry, eliminating the need for external protection compo­nents, such as tranzorbs or surge suppressors.

Low electromagnetic emissions are achieved using slew rate­limited drivers, minimizing both conducted and radiated
interference.

The ADM485E/ADM487E/ADM1487E can transmit at data
rates up to 250 kbps.

A typical application for the ADM485E/ADM487E/ADM1487E
is illustrated in Figure 26, which shows a half-duplex link where
data can be transferred at rates up to 250 kbps. A terminating
resistor is shown at both ends of the link. This termination is
not critical because the slew rate is controlled by the ADM485E/
ADM487E/ADM1487E and reflections are minimized.

The communications network can be extended to include
multipoint connections, as shown in Figure 29. As many as
32 ADM485E transceivers or 128 ADM487E/ADM1487E
transceivers can be connected to the bus.

5

0.1µF0.1µF

DE

B

A

V

CC

ADM485E/
ADM487E/

ADM1487E

GND

DI

RO

RE

V

RE

CC

RO

ADM485E/
ADM487E/

ADM1487E

DI

DE

GND

B

A

RS-485/RS-422 LINK

Figure 26. Typical Half-Duplex Link Application

Table 7 and Table 8 show the truth tables for transmitting and
receiving.

Table 7. Transmitting Truth Table

Transmitting Inputs Transmitting Outputs

DE DI B A

RE

X1 1 1 0 1
X1 1 0 1 0
0 0 X1 High-Z High-Z
1 0 X1 High-Z High-Z

1

X = don’t care.

Table 8. Receiving Truth Table

Receiving Inputs Receiving Outputs

DE A to B RO

RE

0 0 ≥+0.2 V 1
0 0 ≤−0.2 V 0
0 0 Inputs open circuit 1
1 0 X1 High-Z

1

X = don’t care.

ESD Transient Protection Scheme

The ADM485E/ADM487E/ADM1487E use protective clamping
structures on their inputs and outputs that clamp the voltage to
a safe level and dissipate the energy present in ESD.

The protection structure achieves ESD protection up to ±15 kV
human body model (HBM).

06356-012

Rev. A | Page 13 of 16

ADM485E/ADM487E/ADM1487E

www.BDTIC.com/ADI

ESD Testing

Two coupling methods are used for ESD testing: contact
discharge and air-gap discharge. Contact discharge calls for
a direct connection to the unit being tested; air-gap discharge
uses a higher test voltage but does not make direct contact with
the unit under test. With air discharge, the discharge gun is moved
toward the unit under test, developing an arc across the air gap;
thus, the term air discharge is used. This method is influenced
by humidity, temperature, barometric pressure, distance, and
rate of closure of the discharge gun. The contact-discharge
method, though less realistic, is more repeatable and is gaining
acceptance and preference over the air-gap method.

Although very little energy is contained within an ESD pulse,
the extremely fast rise time, coupled with high voltages, can
cause failures in unprotected semiconductors. Catastrophic
destruction can occur immediately as a result of arcing or heating.
Even if catastrophic failure does not occur immediately, the
device can suffer from parametric degradation, which can result
in degraded performance. The cumulative effects of continuous
exposure can eventually lead to complete failure.

HIGH

VOLTAGE

GENERATOR

NOTES:

1. THE ESD TEST METHOD USED IS THE
HUMAN BODY MO DEL (±15kV)
WITH R2 = 1500Ω AND C1 = 100pF.

Figure 27. ESD Generator

R2

C1

DEVICE

UNDER TEST

06356-013

I/O lines are particularly vulnerable to ESD damage. Simply
touching or plugging in an I/O cable can result in a static
discharge that can damage or completely destroy the interface
product connected to the I/O port. It is, therefore, extremely
important to have high levels of ESD protection on the I/O lines.

The ESD discharge can induce latch-up in the device under test.
Therefore, it is important that ESD testing on the I/O pins be
carried out while device power is applied. This type of testing
is more representative of a real-world I/O discharge where the
equipment is operating normally when the discharge occurs.

100%

90%

PEAK

I

36.8%

10%

t

RL

Figure 28. Human Body Model ESD Current Waveform

t

DL

TIME (t)

06356-014

Table 9. ADM483E ESD Test Results

ESD Test Method I/O Pins Other Pins

Human body model (HBM) ±15 kV ±3.5 kV

Rev. A | Page 14 of 16

ADM485E/ADM487E/ADM1487E

www.BDTIC.com/ADI

APPLICATIONS INFORMATION

DIFFERENTIAL DATA TRANSMISSION

Differential data transmission is used to reliably transmit data
at high rates over long distances and through noisy environ­ments. Differential transmission nullifies the effects of ground
shifts and noise signals that appear as common-mode voltages
on the line. There are two main standards approved by TIA/EIA
that specify the electrical characteristics of transceivers used in
differential data transmission.

The RS-422 standard specifies data rates up to 10 MB and line
lengths up to 4000 feet. A single driver can drive a transmission
line with up to 10 receivers.

To cater to true multipoint communications, the RS-485 standard
is defined. This standard meets or exceeds all the requirements
of RS-422, but also allows for up to 32 drivers and 32 receivers
to be connected to a single bus. An extended common-mode
range of −7 V to +12 V is defined. The most significant differ­ence between RS-422 and RS-485 is that the drivers can be
disabled, thereby allowing as many as 32 drivers to be connected
to a single line. Only one driver is enabled at a time, but the
RS-485 standard contains additional specifications to guarantee
device safety in the event of line contention.

CABLE AND DATA RATE

The transmission line of choice for RS-485 communications is
a twisted pair. A twisted pair cable can cancel common-mode
noise and can also cause cancellation of the magnetic fields
generated by the current flowing through each wire, thereby
reducing the effective inductance of the pair.

A typical application showing a multipoint transmission net­work is illustrated in Figure 29. An RS-485 transmission line
can have as many as 32 transceivers on the bus. Only one driver
can transmit at a particular time, but multiple receivers can be
enabled simultaneously.

R

T

D

R

D

RR

Figure 29. Typical RS-485 Network

D

R

T

D

R

06356-015

Rev. A | Page 15 of 16

ADM485E/ADM487E/ADM1487E

www.BDTIC.com/ADI

OUTLINE DIMENSIONS

5.00 (0.1968)

4.80 (0.1890)

4.00 (0.1574)

3.80 (0.1497)

0.25 (0.0098)

0.10 (0.0040)

COPLANARITY

0.10

CONTROLL ING DIMENSI ONS ARE IN MILLIMETERS; INCH DI MENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRI ATE FOR USE IN DESIGN.

85

1

1.27 (0.0500)

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MS-012-A A

BSC

6.20 (0.2440)

5.80 (0.2284)

4

1.75 (0.0688)

1.35 (0.0532)

0.51 (0.0201)

0.31 (0.0122)

8°
0°

0.25 (0.0098)

0.17 (0.0067)

0.50 (0.0196)

0.25 (0.0099)

1.27 (0.0500)

0.40 (0.0157)

45°

060506-A

Figure 30. 8-Lead Standard Small Outline Package [SOIC_N]

Narrow Body

(R-8)

Dimensions shown in millimeters and (inches)

ORDERING GUIDE

Model Temperature Range Package Description Package Option

ADM485EARZ1 –40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM485EARZ-REEL71 –40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM487EARZ1 –40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM487EARZ-REEL71 –40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM1487EARZ1 –40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM1487EARZ-REEL71 –40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8

1

Z = RoHS Compliant Part.

©2007–2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06356-0-3/08(A)

Rev. A | Page 16 of 16