ANALOG DEVICES ADM 483 ARZ Datasheet

Page 1
5 V Low Power, Slew-Rate Limited

FEATURES

EIA RS-485/RS-422-compliant Data rates up to 250 kbps Slew-rate limited for low EMI 100 nA supply current in shutdown mode Low power consumption (120 µA) Up to 32 transceivers on one bus Outputs high-z when disabled or powered off –7 V to +12 V bus common-mode range Thermal shutdown and short-circuit protection Pin-compatible with MAX483 Specified over –40°C to +85°C temperature range Available in 8-lead SOIC package

APPLICATIONS

Low power RS-485 applications EMI sensitive systems DTE-DCE interfaces Industrial control Packet switching Local area networks Level translators
RS-485/RS-422 Transceiver
ADM483

FUNCTIONAL BLOCK DIAGRAM

V
CC
ADM483
RO
RE
DE
DI
R
D
GND
Figure 1.
A
B
05079-001

GENERAL DESCRIPTION

The ADM483 is a low power differential line transceiver suitable for half-duplex data communication on multipoint bus trans­mission lines. It is designed for balanced data transmission, and complies with EIA Standards RS-485 and RS-422.The part contains a differential line driver and a differential line receiver. Both share the same differential pins, with either the driver or the receiver being enabled at any given time.
The device has an input impedance of 12 kΩ, allowing up to 32 transceivers on one bus. Since only one driver should be enabled at any time, the output of a disabled or powered-down driver is three-stated to avoid overloading the bus. This high impedance driver output is maintained over the entire common-mode voltage range from –7 V to +12 V.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
The receiver contains a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating).
The driver outputs are slew-rate limited to reduce EMI and data errors caused by reflections from improperly terminated buses. Excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit.
The part is fully specified over the industrial temperature range, and is available in an 8-lead SOIC package.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
www.analog.com
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ADM483
TABLE OF CONTENTS
Specifications..................................................................................... 3
Timing Specifications....................................................................... 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Test C ir c uit s ....................................................................................... 7
Switching Characteristics ................................................................ 8
Typical Performance Characteristics............................................. 9
REVISION HISTORY
10/04—Revision 0: Initial Version
Applications..................................................................................... 11
Differential Data Transmission ................................................ 11
Cable and Data Rate................................................................... 11
Thermal Shutdown .................................................................... 12
Receiver Open-Circuit Fail-Safe............................................... 12
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 13
Rev. 0 | Page 2 of 16
Page 3
ADM483

SPECIFICATIONS

VCC = 5 V ± 5%, TA = T
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Differential Output Voltage, V
2.0 V R = 50 Ω (RS-422), Figure 3
1.5 5 V R = 27 Ω (RS-485), Figure 3
1.5 5 V V ∆ |VOD| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, Figure 3 Common-Mode Output Voltage, V ∆ |VOC| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, Figure 3 Output Short-Circuit Current, V Output Short-Circuit Current, V
DRIVER INPUT LOGIC
CMOS Input Logic Threshold Low 0.8 V CMOS Input Logic Threshold High 2.0 V CMOS Logic Input Current (DI) ±2 µA DE Input Resistance to GND
RECEIVER
Differential Input Threshold Voltage, V Input Hysteresis 70 mV VCM = 0V Input Resistance (A, B) 12 kΩ –7 V < VCM < +12 V Input Current (A, B)
CMOS Logic Input Current (RE) CMOS Output Voltage Low 0.4 V I CMOS Output Voltage High 3.5 V I Output Short-Circuit Current 7 95 mA 0 V < V
Three-State Output Leakage Current ±2 µA 0.4 ≤ V POWER SUPPLY CURRENT 0.1 10 µA 120 250 µA 350 650 µA DE = VCC
MIN
to T
, unless otherwise noted.
MAX
OD
OC
= High 35 250 mA –7 V < V
OUT
= Low 35 250 mA –7 V < V
OUT
5 V
3 V R = 27 Ω or 50 Ω, Figure 3
220 kΩ
R = , Figure 3
= –7 V to 12 V, Figure 4
TST
< +12 V
OUT
< +12 V
OUT
TH
–200 +200 mV –7 V < VCM < +12 V
1 mA VIN = +12 V –0.8 mA VIN = –7 V ±2 µA
= 4 mA
OUT
= –4 mA
OUT
< V
OUT
≤ 2.4 V
OUT
DE = 0 V, DE = 0 V,
RE = VCC (shutdown) RE = 0 V
CC
Rev. 0 | Page 3 of 16
Page 4
ADM483

TIMING SPECIFICATIONS

VCC = 5 V ± 5%, TA = T
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Maximum Data Rate 250 kbps Propagation Delay t Skew t
SKEW
Rise/Fall Time tR, tF 200 2000 ns R Enable Time 125 2000 ns RL = 500 Ω, CL = 100 pF, Figure 6 Disable Time 125 3000 ns RL = 500 Ω, CL = 15 pF, Figure 6 Enable Time from Shutdown 5000 ns RL = 500 Ω, CL = 100 pF, Figure 6
RECEIVER
Propagation Delay t Differential Skew t Enable Time 20 50 ns RL = 1 kΩ, CL = 15 pF, Figure 8 Disable Time 20 50 ns RL = 1 kΩ, CL = 15 pF, Figure 8 Enable Time from Shutdown 5000 ns RL = 1 kΩ, CL = 15 pF, Figure 8 Time to Shutdown
1
The device is put into shutdown mode by driving RE high and DE low. If these inputs are in this state for less than 50 ns, the device is guaranteed not to enter
shutdown mode. If the enable inputs are in this state for at least 3000 ns, the device is guaranteed to have entered shutdown mode.
SKEW
1
PLH
PLH
MIN
to T
, t
, t
, unless otherwise noted.
MAX
250 800 2000 ns R
PHL
100 800 ns R
250 2000 ns CL = 15 pF, Figure 7
PHL
LDIFF
LDIFF
LDIFF
100 ns CL = 15 pF, Figure 7
50 330 3000 ns
= 54 Ω, CL1 = CL2 = 100 pF, Figure 5 = 54 Ω, CL1 = CL2 = 100 pF, Figure 5 = 54 Ω, CL1 = CL2 = 100 pF, Figure 5
Rev. 0 | Page 4 of 16
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ADM483

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
VCC to GND 6 V Digital I/O Voltage (DE, RE, DI, ROUT) Driver Output/Receiver Input Voltage –9 V to +14 V Operating Temperature Range –40°C to +85°C Storage Temperature Range –65°C to +125°C θJA Thermal Impedance (SOIC) 110°C/W Lead Temperature
Soldering (10 s) 300°C
Vapor Phase (60 s) 215°C
Infrared (15 s) 220°C
–0.3 V to V
+ 0.3 V
CC
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. 0 | Page 5 of 16
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ADM483

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

RO RE DE
DI
1
ADM483
2 3
TOP VIEW
(Not to Scale)
4
8
V
CC
B
7
A
6
GND
5
05079-002
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 RO
Receiver Output. When enabled, if A > B by 200 mV, then RO = high. If A < B by 200 mV, then RO = low.
2
RE Receiver Output Enable. A low level enables the receiver output, RO.
A high level places it in a high impedance state.
3 DE
Driver Output Enable. A high level enables the driver differential inputs A and B. A low level places it in a high impedance state.
4 DI
Driver Input. When the driver is enabled, a logic low on DI forces A low and B high,
while a logic high on DI forces A high and B low. 5 GND Ground. 6 A Noninverting Receiver Input A/Driver Output A. 7 B Inverting Receiver Input B/Driver Output B. 8 V
CC
5 V Power Supply.
Rev. 0 | Page 6 of 16
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ADM483

TEST CIRCUITS

V
R
V
OD
R
Figure 3. Driver Voltage Measurement
375
A
0V OR 3V
V
OC
05079-003
DE IN
DE
S1
V
B
C
L
Figure 6. Driver Enable/Disable
R
OUT
CC
L
S2
05079-006
V
V
OD3
60
375
TST
05079-004
Figure 4. Driver Voltage Measurement over Common-Mode Voltage Range
A
R
LDIFF
B
C
L1
C
L2
05079-005
Figure 5. Driver Propagation Delay
A
V
RE
B
OUT
C
L
05079-007
Figure 7. Receiver Propagation Delay
+1.5V
–1.5V
RE IN
S1
RE
C
L
V
CC
R
L
S2
V
OUT
05079-008
Figure 8. Receiver Enable/Disable
Rev. 0 | Page 7 of 16
Page 8
ADM483
3V0V5V0

SWITCHING CHARACTERISTICS

B
VO
A
V
1.5V
t
PLH
1/2VO
t
SKEW
90% POINT
10% POINT
t
R
Figure 9. Driver Propagation Delay, Rise/Fall Timing
0VA, B
=
|t
PLH –tPHL
1.5V
t
PHL
|
t
0V
90% POINT
10% POINT
F
05079-009
DE
A, B
A, B
RE
t
t
1.5V
ZL
2.3V
ZH
2.3V
1.5V
t
LZ
V
OL
t
HZ
V
OH
Figure 11. Driver Enable/Disable Timing
1.5V
t
ZL
1.5V
t
LZ
+0.5V
–0.5V
3V
0V
V
OL
V
OH
0V
05079-011
3V
0V
RO
t
PLH
1.5V 1.5V
t
=
|t
SKEW
PLH –tPHL
t
|
Figure 10. Receiver Propagation Delay
PHL
R
V
OH
R
V
OL
05079-010
0V
1.5V O/P LOW
t
ZH
O/P HIGH
1.5V
+0.5V
V
OL
t
HZ
V
OH
–0.5V
V
OL
V
OH
05079-012
Figure 12. Receiver Enable/Disable Timing
Rev. 0 | Page 8 of 16
Page 9
ADM483

TYPICAL PERFORMANCE CHARACTERISTICS

400
350
300
0.40
0.35
250
200
DE = V
150
100
UNLOADED SUPPLY CURRENT (µA)
50
0
50–250 255075100125
TEMPERATURE (
°C)
CC
DE = GND
Figure 13. Supply Current vs. Temperature
50
45
40
35
30
25
20
15
10
RECEIVER OUTPUT CURRENT (mA)
5
0
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
RECEIVER OUTPUT LOW VOLTAGE (V)
Figure 14. Output Current vs. Receiver Output Low Voltage
5
0
–5
–10
–15
RECEIVER OUTPUT CURRENT (mA)
–20
3.5 4.0 4.5 5.0 5.5 RECEIVER OUTPUT HIGH VOLTAGE (V)
Figure 15. Output Current vs. Receiver Output High Voltage
05079-013
05079-014
05079-015
0.30
0.25
OUTPUT LOW VOLTAGE (V)
0.20
0.15 –50 –25 0 25 50 75 100 125
TEMPERATURE (
°
C)
Figure 16. Receiver Output Low Voltage vs. Temperature
4.6
4.5
4.4
4.3
4.2
OUTPUT HIGH VOLTAGE (V)
4.1
4.0 –50–250 255075100125
TEMPERATURE (
°
C)
Figure 17. Receiver Output High Voltage vs. Temperature
90
80
70
60
50
40
30
20
DRIVER OUTPUT CURRENT (mA)
10
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
DIFFERENTIAL OUTPUT VOLTAGE (V)
Figure 18. Driver Output Current vs. Differential Output Voltage
05079-016
05079-017
05079-018
Rev. 0 | Page 9 of 16
Page 10
ADM483
120
800
100
80
60
40
OUTPUT CURRENT (mA)
20
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT VOLTAGE (V)
Figure 19. Output Current vs. Driver Output Low Voltage
–10
–30
–50
–70
OUTPUT CURRENT (mA)
–90
–110
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT VOLTAGE (V)
Figure 20. Output Current vs. Driver Output High Voltage
05079-019
05079-020
700
600
500
400
300
200
PROPAGATION DELAY (ns)
100
0
–50 –25 0 25 50 75 100 125
TEMPERATURE (°C)
Figure 22. Receiver Propagation Delay vs. Temperature
3
2 4
CH1 1.00V
CH3 2.00V
B
W
B
W
CH2 1.00V CH4 5.00V
B
W
M400ns CH3 2.00V
Figure 23. Driver/Receiver Propagation Delay
05079-022
05079-023
450
400
350
300
250
200
150
PROPAGATION DELAY (ns)
100
50
0
50–250 255075100125
TEMPERATURE (
°C)
Figure 21. Driver Propagation Delay vs. Temperature
05079-021
Rev. 0 | Page 10 of 16
Page 11
ADM483

APPLICATIONS

DIFFERENTIAL DATA TRANSMISSION

Differential data transmission is used to reliably transmit data at high rates over long distances and through noisy environments. Differential transmission nullifies the effects of ground shifts and noise signals that appear as common­mode voltages on the line. There are two main standards approved by the Electronics Industries Association (EIA), which specify the electrical characteristics of transceivers used in differential data transmission.
The RS-422 standard specifies data rates up to 10 Mbaud and line lengths up to 4000 ft. A single driver can drive a transmission line with up to 10 receivers.
To achieve true multipoint communications, the RS-485 standard was defined. This standard meets or exceeds all the requirements of RS-422, but also allows up to 32 drivers and 32 receivers to be connected to a single bus. An extended common­mode range of –7 V to +12 V is defined. The most significant difference between RS-422 and RS-485 is that the drivers may be disabled, allowing up to 32 to be connected to a single line. Only one driver should be enabled at a time, but the RS-485 standard contains additional specifications to guarantee device safety in the event of line contention.
Table 5. Comparison of RS-422 and RS-485 Interface Standards
Specification RS-422 RS-485
Transmission Type Differential Differential Maximum Cable Length 4000 ft. 4000 ft. Minimum Driver Output Voltage ±2 V ±1.5 V Driver Load Impedance 100 Ω 54 Ω Receiver Input Resistance 4 kΩ min 12 kΩ min Receiver Input Sensitivity ±200 mV ±200 mV Receiver Input Voltage Range –7 V to +7 V –7 V to +12 V Drivers/Receivers per Line 1/10 32/32

CABLE AND DATA RATE

The preferred transmission line for RS-485 communications is a twisted pair. Twisted pair cable tends to cancel common­mode noise and the magnetic fields generated by the current flowing through each wire, thereby reducing the effective inductance of the pair.
The ADM483 is designed for bidirectional data communica­tions on multipoint transmission lines. A typical application showing a multipoint transmission network is shown in
Figure 24. An RS-485 transmission line can have as many as
32 transceivers on the bus. Only one driver can transmit at a particular time, but multiple receivers can be enabled simul­taneously. As with any transmission line, it is important to minimize reflections. This can be done by terminating the extreme ends of the line by using resistors equal to the char­acteristic impedance of the line. Stub lengths of the main line should also be kept as short as possible. A properly terminated transmission line appears purely resistive to the driver.
RO
RE DE
DI
ADM483
R
D
A
B
AB
ADM483
R
RO RE DE DI
MAXIMUM NUMBER OF TRANSCEIVERS ON BUS: 32
Figure 24. Typical Half-Duplex RS-485 Network Topology
D
Rev. 0 | Page 11 of 16
ADM483
AB
R
RO RE DE DI
ADM483
A
B
D
R
RO
RE DE
D
DI
05079-024
Page 12
ADM483

THERMAL SHUTDOWN

The ADM483 contains thermal shutdown circuitry that protects the part from excessive power dissipation during fault conditions. Shorting the driver outputs to a low impedance source can result in high driver currents. The thermal sensing circuitry detects the increase in die temp­erature and disables the driver outputs. The thermal sensing circuitry is designed to disable the driver outputs when a die temperature of 150°C is reached. As the device cools, the drivers are re-enabled at 140°C.

RECEIVER OPEN-CIRCUIT FAIL-SAFE

The receiver input includes a fail-safe feature that guarantees a logic high on the receiver when the inputs are open circuit or floating.
Rev. 0 | Page 12 of 16
Page 13
ADM483

OUTLINE DIMENSIONS

5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
85
6.20 (0.2440)
5.80 (0.2284)
41
1.27 (0.0500) BSC
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012AA
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
0.40 (0.0157)
× 45°
Figure 25. 8-Lead Standard Small Outline Package [SOIC]
(R-8)
Dimensions shown in millimeters and (inches)

ORDERING GUIDE

Model Temperature Range Package Description Package Option
ADM483AR –40°C to +85°C 8-Lead Standard Small Outline Package R-8 ADM483AR-REEL –40°C to +85°C 8-Lead Standard Small Outline Package R-8 ADM483AR-REEL7 –40°C to +85°C 8-Lead Standard Small Outline Package R-8 ADM483JR 0°C to 70°C 8-Lead Standard Small Outline Package R-8 ADM483JR-REEL 0°C to 70°C 8-Lead Standard Small Outline Package R-8 ADM483JR-REEL7 0°C to 70°C 8-Lead Standard Small Outline Package R-8
Rev. 0 | Page 13 of 16
Page 14
ADM483
NOTES
Rev. 0 | Page 14 of 16
Page 15
ADM483
NOTES
Rev. 0 | Page 15 of 16
Page 16
ADM483
NOTES
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.
D05079-0-10/04(0)
Rev. 0 | Page 16 of 16
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Authorized Distributor
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