Analog Devices ADM3491 a Datasheet
3.3 V, Full-Duplex, 840 µA,
FEATURES
Operates with 3.3 V supply
EIA RS-422 and RS-485 compliant over full CM range
19 kΩ input impedance
Up to 50 transceivers on bus
20 Mbps data rate
Short circuit protection
Specified over full temperature range
Thermal shutdown
Interoperable with 5 V logic
840 µA supply current
2 nA shutdown current
Also available in TSSOP package
Meets IEC1000-4-4 (>1 kV)
8 ns skew
Upgrade for MAX 3491, SN75ALS180
APPLICATIONS
Telecommunications
DTE–DCE interface
Packet switching
Local area networks
Data concentration
Data multiplexers
Integrated services digital network (ISDN)
AppleTalk
Industrial controls
GENERAL DESCRIPTION
The ADM3491 is a low power, differential line transceiver
designed to operate using a single 3.3 V power supply. Low
power consumption, coupled with a shutdown mode, makes it
ideal for power-sensitive applications. It is suitable for communication on multipoint bus transmission lines.
20 Mbps, EIA RS-485 Transceiver
ADM3491
FUNCTIONAL BLOCK DIAGRAM
ADM3491
RO
RE
DE
DI
R
D
Figure 1.
The ADM3491 is intended for balanced data transmission and
complies with both EIA Standards RS-485 and RS-422. It
contains a differential line driver and a differential line receiver,
making it suitable for full-duplex data transfer.
The input impedance is 19 kΩ, allowing up to 50 transceivers to
be connected on the bus. Excessive power dissipation caused by
bus contention or by output shorting is prevented by a thermal
shutdown circuit. This feature forces the driver output into a
high impedance state, if a significant temperature increase is
detected in the internal driver circuitry during fault conditions.
The receiver contains a fail-safe feature that results in a logic
high output state, if the inputs are unconnected (floating).
The ADM3491 is fabricated on BiCMOS, an advanced mixed
technology process combining low power CMOS with fast
switching bipolar technology.
The ADM3491 is fully specified over the industrial temperature
range and is available in DIP and SOIC packages, as well as the
space-saving TSSOP package.
A
B
Z
Y
05234-001
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
www.analog.com
ADM3491
TABLE OF CONTENTS
Specifications..................................................................................... 3
Typical Perfor m a n c e Character i stics ..............................................9
Timing Specifications .................................................................. 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Tes t Ci rc u it s ....................................................................................... 7
Switching Characteristics ................................................................ 8
REVISION HISTORY
11/04—Rev. 0 to Rev. A
Format Updated ..................................................................Universal
Changes to Specifications Section.................................................. 3
Changes to Ordering Guide.......................................................... 13
1/98—Revision 0: Initial Version
Applications Information .............................................................. 11
Differential Data Transmission ................................................ 11
Cable and Data Rate................................................................... 11
Receiver Open-Circuit Fail-Safe Feature ................................ 11
Outline Dimensions....................................................................... 12
Ordering Guide .......................................................................... 13
Rev. A | Page 2 of 16
ADM3491
SPECIFICATIONS
VCC = 3.3 V ± 0.3 V. All specifications T
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Differential Output Voltage, VOD 2.0 V RL = 100 Ω, Figure 4, VCC > 3.1 V
1.5 V RL = 54 Ω, Figure 4
1.5 V RL = 60 Ω, Figure 5, −7 V < V
∆|VOD| for Complementary Output States 0.2 V R = 54 Ω or 100 Ω, Figure 4
Common-Mode Output Voltage, VOC 3 V R = 54 Ω or 100 Ω, Figure 4
∆|VOC| for Complementary Output States 0.2 V R = 54 Ω or 100 Ω, Figure 4
CMOS Input Logic Threshold Low, V
CMOS Input Logic Threshold High, V
Logic Input Current (DE, DI, RE)
Output Leakage (Y, Z) Current ±3 µA VO = –7 V or +12 V, VCC = 0 V or 3.6 V
Output Short-Circuit Current ±250 mA VO = –7 V or +12 V
RECEIVER
Differential Input Threshold Voltage, VTH −0.2 +0.2 V −7 V < VCM < +12 V
Input Voltage Hysteresis, ∆VTH 50 mV VCM = 0 V
Input Resistance 12 19 kΩ −7 V < VCM < +12 V
Input Current (A, B) 1 mA VIN = 12 V
−0.8 mA VIN = −7 V
Logic Enable Input Current (RE)
Output Voltage Low, VOL 0.4 V I
Output Voltage High, VOH VCC – 0.4 V V I
Short-Circuit Output Current ±60 mA V
Three-State Output Leakage Current ±1.0 µA VCC = 3.6 V, 0 V < V
POWER SUPPLY CURRENT
ICC Outputs unloaded
0.84 1.5 mA
0.84 1.5 mA
Supply Current in Shutdown 0.002 1 µA
to T
MIN
0.8 V
INL
2.0 V
INH
, unless otherwise noted.
MAX
±1.0 µA
±1 µA
= 2.5 mA
OUT
= −1.5 mA
OUT
= GND or VCC
OUT
DE = V
CC
DE = 0 V,
DE = 0 V,
, RE = 0 V
RE = 0 V
RE = VCC
OUT
< VCC
< +12 V
TST
Rev. A | Page 3 of 16
ADM3491
TIMING SPECIFICATIONS
VCC = 3.3 V, TA = 25°C.
Table 2.
Parameter Min Typ Max Unit Test Conditions/ Comments
DRIVER
Differential Output Delay, T
DD
Differential Output Transition Time 1 8 15 ns RL = 60 Ω, CL1 = C
Propagation Delay Input to Output, T
Driver Output to Output, T
SKEW
PLH
, T
PHL
ENABLE/DISABLE
Driver Enable to Output Valid
Driver Disable Timing
Driver Enable from Shutdown
RECEIVER
Time to Shutdown 80 190 300 ns
Propagation Delay Input to Output, T
Skew, T
Receiver Enable, T
Receiver Disable, T
PLH
– T
PHL
EN
DEN
PLH
, T
PHL
Receiver Enable from Shutdown
1
35 ns RL = 60 Ω, CL1 = C
7 22 35 ns RL = 27 Ω, CL1 = C
8 ns R
= 54 Ω, CL1 = C
L
45 90 ns RL = 110 Ω, C
40 80 ns RL = 110 Ω, C
650 110 ns RL = 110 Ω, C
= 50 pF, Figure 6
L
= 50 pF, Figure 6
L
= 15 pF, Figure 6
L
25 65 90 ns C
25 50 ns C
25 45 ns C
10 ns C
500 ns C
= 15 pF, Figure 11
L
= 15 pF, Figure 11
L
= 15 pF, Figure 7
L
= 15 pF, Figure 7
L
= 15 pF, Figure 7
L
= 15 pF, Figure 8
L2
= 15 pF, Figure 8
L2
= 15 pF, Figure 9
L2
= 15 pF, Figure 9
L2
= 3.3 V ± 0.3 V, TA = T
V
CC
MIN
to T
MAX
.
Table 3.
Parameter Min Typ Max Unit Test Conditions/ Comments
DRIVER
Differential Output Delay, T
DD
Differential Output Transition Time 2 8 15 ns RL = 60 Ω, CL1 = C
Propagation Delay Input to Output, T
Driver Output to Output, T
SKEW
PLH
, T
PHL
ENABLE/DISABLE
Driver Enable to Output Valid
Driver Disable Timing
Driver Enable from Shutdown
RECEIVER
Time to Shutdown 50 190 500 ns
Propagation Delay Input to Output, T
Skew, T
Receiver Enable, T
Receiver Disable, T
PLH
– T
PHL
EN
DEN
PLH
, T
PHL
Receiver Enable from Shutdown
1
70 ns RL = 60 Ω, CL1 = C
7 22 70 ns RL = 27 Ω, CL1 = C
10 ns R
= 54 Ω, CL1 = C
L
45 110 ns RL = 110 Ω, C
40 110 ns RL = 110 Ω, C
650 110 ns RL = 110 Ω, C
= 50 pF, Figure 6
L
= 50 pF, Figure 6
L
= 15 pF, Figure 6
L
25 65 115 ns C
25 50 ns C
25 50 ns C
20 ns C
600 ns C
= 15 pF, Figure 11
L
= 15 pF, Figure 11
L
= 15 pF, Figure 7
L
= 15 pF, Figure 7
L
= 15 pF, Figure 7
L
= 15 pF, Figure 8
L2
= 15 pF, Figure 8
L2
= 15 pF, Figure 9
L2
= 15 pF, Figure 9
L2
Rev. A | Page 4 of 16
ADM3491
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 4.
Parameter Min
V
CC
Inputs
Driver Input (DI) −0.3 V to VCC + 0.3 V
Control Inputs (DE, RE)
Receiver Inputs (A, B) −7.5 V to +12.5 V
Outputs
Driver Outputs −7.5 V to +12.5 V
Receiver Output −0.5 V to VCC + 0.5 V
14-Lead DIP, Power Dissipation 800 mW
θJA, Thermal Impedance 140°C/W
14-Lead SOIC, Power Dissipation 650 mW
θJA, Thermal Impedance 115°C/W
16-Lead TSSOP, Power Dissipation 500 mW
θJA, Thermal Impedance 158°C/W
Operating Temperature Range
Industrial (A Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 s) 300°C
Vapor Phase (60 s) 215°C
Infrared (15 s) 220°C
ESD Rating >2 kV
EFT Rating (IEC1000-4-4) >1 kV
7 V
−0.3 V to V
+ 0.3 V
CC
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. A | Page 5 of 16
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