Analog Devices ADM3485E b Datasheet

ESD-Protected, EMC-Compliant, 3.3 V

FEATURES

Operates with 3.3 V supply ESD protection: 8 kV meets IEC1000-4-2 EFT protection: 2 kV meets IEC1000-4-4 EIA RS-422 and RS-485 compliant over full CM range 19 kΩ input impedance Up to 50 transceivers on bus 20 Mbps data rate Short-circuit protection Specified over full temperature range Thermal shutdown Interoperable with 5 V logic 1 mA supply current 2 nA shutdown current 8 ns skew

APPLICATIONS

Telecommunications DTE-DCE interfaces Packet switching Local area networks Data concentration Data multiplexers Integrated services digital network (ISDN) AppleTalk Industrial controls

GENERAL DESCRIPTION

The ADM3485E is a low power, differential line transceiver that operates with a single 3.3 V power supply. Low power consumption makes it ideal for power-sensitive applications.
It is suitable for communication on multipoint bus transmission lines. Internal protection against electrostatic discharge (ESD) and electrical fast transient (EFT) allows operation in electri­cally harsh environments.
20 Mbps, EIA RS-485 Transceiver
ADM3485E

FUNCTIONAL BLOCK DIAGRAM

ADM3485E
RO
RE
DE
DI
Excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit. This feature forces the driver output into a high impedance state if, during fault conditions, a significant temperature increase is detected in the internal driver circuitry.
The receiver contains a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating).
R
D
Figure 1.
B
A
03338-001
It is intended for balanced data transmission and complies with both EIA Standards RS-485 and RS-422. It contains a differential line driver and a differential line receiver, and is suitable for half-duplex data transfer.
The input impedance is 19 kΩ following up to 50 transceivers to be connected on the bus.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
The device is fabricated on BiCMOS, an advanced mixed technology process combining low power CMOS with fast switching bipolar technology.
The ADM3485E is fully specified over the industrial temper­ature range and is available in 8-lead PDIP and SOIC packages.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
www.analog.com
ADM3485E
TABLE OF CONTENTS
Specifications..................................................................................... 3
Timing Specifications....................................................................... 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configurations and Pin Function Descriptions .................... 6
Test C ir c ui t s ....................................................................................... 7
Switching Characteristics ................................................................ 8
Typical Performance Characteristics ............................................. 9
Standards and Testing .................................................................... 11
REVISION HISTORY
10/04—Data Sheet Changed from Rev. A to Rev. B
Updated Format..................................................................Universal
Changes to Power-Supply Current, Table 1 .................................. 3
Updated Outline Dimensions....................................................... 14
Changes to Ordering Guide.......................................................... 14
5/00—Data Sheet Changed from Rev. 0 to Rev. A
ESD/EFT Transient Protection Scheme .................................. 11
ESD Testing................................................................................. 11
Fast Transient Burst Immunity (IEC1000-4-4)...................... 12
Applications Information .............................................................. 13
Differential Data Transmission ................................................ 13
Cable and Data Rate................................................................... 13
Receiver Open-Circuit Fail-Safe............................................... 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 14
Rev. B | Page 2 of 16
ADM3485E

SPECIFICATIONS

VCC = +3.3 V ± 0.3 V. All specifications T
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Differential Output Voltage, VOD 2.0 V RL= 100 Ω, VCC > 3.1 V; see Figure 3
1.5 V RL= 54 Ω; see Figure 9
1.5 V RL= 60 Ω, see Figure 4; –7 V < V ∆|VOD| for Complementary Output States 0.2 V R = 54 Ω or 100 Ω; see Figure 3 Common-Mode Output Voltage VOC 3 V R = 54 Ω or 100 Ω; see Figure 3 ∆|VOC| for Complementary Output States 0.2 V R = 54 Ω or 100 Ω; see Figure 3 CMOS Input Logic Threshold Low, V CMOS Input Logic Threshold High, V Logic Input Current (DE, DI, RE)
Output Short-Circuit Current ±250 mA VO = −7 V or +12 V
RECEIVER
Differential Input Threshold Voltage, VTH −0.2 +0.2 V −7 V < VCM < +12 V Input Voltage Hysteresis, ∆VTH 50 mV VCM = 0 V Input Resistance 12 19 kΩ −7 V < VCM < +12 V Input Current (A, B) 1 mA VIN = 12 V
−0.8 mA VIN = −7 V Logic Enable Input Current (RE) Output Voltage Low, VOL 0.4 V I Output Voltage High, VOH VCC – 0.4 V V I Short-Circuit Output Current ±60 mA V Three-State Output Leakage Current ±1.0 µA VCC = 3.6 V, 0 V < V
POWER-SUPPLY CURRENT
ICC Outputs unloaded 1 1.5 mA
1 1.5 mA Supply Current in Shutdown 0.002 1 µA
ESD/EFT IMMUNITY
ESD Protection ±8 kV IEC1000-4-2 A, B pins contact discharge EFT Protection ±2 kV IEC1000-4-4, A, B pins
to T
MIN
0.8 V
INL
2.0 V
INH
unless otherwise noted.
MAX,
±1.0 µA
±1 µA
= +2.5 mA
OUT
= −1.5 mA
OUT
= GND or VCC
OUT
DE = V
CC
DE = 0 V, DE = 0 V,
, RE = 0 V
RE = 0 V RE = VCC
OUT
< VCC
< +12 V
TST
Rev. B | Page 3 of 16
ADM3485E

TIMING SPECIFICATIONS

VCC = 3.3 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Differential Output Delay T
DD
Differential Output Transition Time 1 8 15 ns RL = 60 Ω, CL1 = CL2 = 15 pF; see Figure 5
Propagation Delay Input to Output T
Driver Output-to-Output T
SKEW
PLH
, T
PHL
ENABLE/DISABLE
Driver Enable to Output Valid 45 90 ns RL = 110 Ω, CL = 50 pF; see Figure 4
Driver Disable Timing 40 80 ns RL = 110 Ω, CL = 50 pF; see Figure 4
Driver Enable from Shutdown 650 110 ns RL = 110 Ω, CL = 15 pF; see Figure 4 RECEIVER
Time to Shutdown 80 190 300 ns
Propagation Delay Input to Output T
Skew T
PLH–TPHL
Receiver Enable T
Receiver Disable T
EN
DEN
PLH
, T
PHL
Receiver Enable from Shutdown 500 ns CL = 15 pF; see Figure 8
1 35 ns RL = 60 Ω, CL1 = CL2 = 15 pF; see Figure 5
7 22 35 ns RL = 27 Ω, CL1 = CL2 = 15 pF; see Figure 9 8 ns RL = 54 Ω, CL1 = CL2 = 15 pF; see Figure 5
25 65 90 ns CL = 15 pF; see Figure 10 10 ns CL = 15 pF; see Figure 10 25 50 ns CL = 15 pF; see Figure 8 25 45 ns CL = 15 pF; see Figure 8
TIMING SPECIFICATIONS
VCC = 3.3 V ± 0.3 V, TA = T
Table 3.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Differential Output Delay T
Differential Output Transition Time 2 8 15 ns RL = 60 Ω, CL1 = CL2 = 15 pF; see Figure 5
Propagation Delay Input to Output T
Driver Output-to-Output T ENABLE/DISABLE
Driver Enable to Output Valid 45 110 ns RL = 110 Ω, CL = 50 pF; see Figure 4
Driver Disable Timing 40 110 ns RL = 110 Ω, CL = 50 pF; see Figure 4
Driver Enable from Shutdown 650 110 ns RL = 110 Ω, CL = 15 pF; see Figure 4 RECEIVER
Time to Shutdown 50 190 500 ns
Propagation Delay Input to Output T
Skew T
Receiver Enable T
Receiver Disable T
PLH
– T
PHL
EN
DEN
Receiver Enable from Shutdown 600 ns CL = 15 pF, Figure 8
MIN
DD
SKEW
to T
, unless otherwise noted.
MAX
, T
PLH
PHL
, T
PLH
PHL
1 70 ns RL = 60 Ω, CL1 = CL2 = 15 pF; see Figure 5
7 22 70 ns RL = 27 Ω, CL1 = CL2 = 15 pF; see Figure 9 10 ns RL = 54 Ω, CL1 = CL2 = 15 pF; see Figure 5
25 65 115 ns CL = 15 pF, Figure 10 20 ns CL = 15 pF, Figure 10 25 50 ns CL = 15 pF, Figure 8 25 50 ns CL = 15 pF, Figure 8
Rev. B | Page 4 of 16
ADM3485E

ABSOLUTE MAXIMUM RATINGS

= +25°C, unless otherwise noted.
T
A
Table 4.
Parameter Values
V
CC
Inputs
Driver Input (DI)
Control Inputs (DE, RE) Receiver Inputs (A, B)
Outputs
Driver Outputs
Receiver Output
Power Dissipation 8-Lead PDIP 800 mW
θJA, Thermal Impedance 140°C/W
Power Dissipation 8-Lead SOIC 650 mW
θJA, Thermal Impedance 115°C/W
Operating Temperature Range
Industrial (A Version)
Storage Temperature Range
Lead Temperature (Soldering, 10 sec) 300°C
Vapor Phase (60 sec) 215°C Infrared (15 sec) 220°C
ESD Rating: Air
(Human Body Model,All Pins)
ESD Rating: IEC1000-4-2 Contact
(A, B Pins)
EFT Rating: IEC1000-4-4 (A, B Pins) > 2 kV
7 V
0.3 V to V
0.3 V to V
7.5 V to +12.5 V
7.5 V to +12.5 V
0.5 V to V
40°C to +85°C
65°C to +150°C
> 4 kV
> 8 kV
+ 0.3 V
CC
+ 0.3 V
CC
+ 0.5 V
CC
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum ratings for extended periods of time may affect device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. B | Page 5 of 16
ADM3485E

PIN CONFIGURATIONS AND PIN FUNCTION DESCRIPTIONS

RO RE DE
DI
1
ADM3485E
2
TOP VIEW
3
(Not to Scale)
4
8
V
CC
7
B A
6
GND
5
03338-002
Figure 2. PDIP/SOIC Pin Configuration
Table 5. Pin Function Descriptions
Mnemonic DIP/SOIC Description
RO 1 Receiver Output. High when A > B by 200 mV or low when A < B by 200 mV. RE
DE 3
2
Receiver Output Enable. With RE low, the receiver output RO is enabled. With RE high, the output goes high impedance. If
RE is high and DE low, the ADM3485E enters a shutdown state.
Driver Output Enable. A high level enables the driver differential outputs A and B. A low level places it in a high impedance state.
DI 4
Driver Input. When the driver is enabled, a logic low on DI forces A low and B high, while a logic high on DI
forces A high and B low. GND 5 Ground Connection, 0 V. A 6 Noninverting Receiver Input A/Driver Output A. B 7 Inverting Receiver Input B/Driver Output B. VCC 8 Power Supply, 3.3 V ± 0.3 V.
Rev. B | Page 6 of 16
ADM3485E
V

TEST CIRCUITS

V
OD
CC
R/2
R/2
V
OC
03338-003
V
OD3
375
R
L
375
V
TST
03338-007
Figure 3. Driver Voltage Measurement Test Circuit
0V OR 3V
DE IN
DE
S1
C
L
V
OUT
Figure 4. Driver Enable/Disable Test Circuit
DI
D
R
LDIFF
C
C
Figure 5. Driver Differential Output Delay Test Circuit
DI
D
R
LDIFF
C
L1
C
L2
Figure 7. Driver Voltage Measurement Test Circuit 2
V
CC
R
L
S2
03338-004
+1.5V
–1.5V
RE IN
S1
RE
C
L
V
OUT
V
CC
R
L
S2
03338-008
Figure 8. Receiver Enable/Disable Test Circuit
V
L1
V
L2
OUT
03338-005
IN
DE
V
CC
S1
OM
R
L
V
OUT
C
L
03338-009
Figure 9. Driver Propagation Delay Test Circuit
A
B
RO
R
RE
03338-006
3V
0V
V
ID
RE
1.5V
V
OUT
C
L
03338-010
Figure 6. Driver/Receiver Propagation Delay Test Circuit
Figure 10. Receiver Propagation Delay Test Circuit
Rev. B | Page 7 of 16
ADM3485E

SWITCHING CHARACTERISTICS

3V
1.5V
t
PLH
VO
–VO
0V
B
A
0V
1/2VO
VO
90% POINT
10% POINT
1.5V
t
PLH
t
SKEW
t
R
t
SKEW
90% POINT
10% POINT
t
F
03338-011
DE
3V
1.5V
t
ZL
D
D
0V
1.5V
t
ZH
1.5V
O/P
LOW
O/P
HIGH
t
t
1.5V
LZ
HZ
V
+ 0.25V
OL
VOH– 0.25V
0V
V
OL
V
OH
03338-013
Figure 13. Driver Enable/Disable Timing
1.5V
t
ZL
t
ZH
1.5V
1.5V
O/P
LOW
O/P
HIGH
t
t
1.5V
LZ
HZ
Figure 14. Receiver Enable/Disable Timing
+ 0.25V
V
OL
VOH– 0.25V
3V
0V
V
OL
V
OH
03338-014
A–B
RO
Figure 11. Driver Propagation Delay, Rise/Fall Timing
0V0V
t
PLH
t
PLH
1.5V1.5V
Figure 12. Receiver Propagation Delay
RE
V
OH
V
OL
03338-012
R
R
0V
Rev. B | Page 8 of 16
ADM3485E

TYPICAL PERFORMANCE CHARACTERISTICS

14
12
12
10
8
6
4
OUTPUT CURRENT (mA)
2
0
0 3.50.5
1.0 OUTPUT LOW VOLTAGE (V)
1.5
2.0
2.5
3.0
Figure 15. Output Current vs. Receiver Output Low Voltage
0.8
0.7
0.6
0.5
0.4
0.3
0.2
RECEIVER OUTPUT LOW VOLTAGE (V)
0.1 –30
–50 90
–10 10 30 50 70
TEMPERATURE (°C)
110
Figure 16. Receiver Output Low Voltage vs. Temperature
120
100
80
60
40
DRIVER OUTPUT CURRENT (mA)
20
0
0.5
0
1.0
DIFFERENTIAL OUTPUT VOLTAGE (V)
1.5
2.0
2.5
Figure 17. Driver Output Current vs. Differential Output Voltage
3.0
03338-015
03338-016
03338-017
10
8
6
4
OUTPUT CURRENT (mA)
2
0
0 3.0
1.0
0.5 OUTPUT HIGH VOLTAGE (V)
1.5
2.0
2.5
Figure 18. Output Current vs. Receiver Output High Voltage
3.30
3.25
3.20
3.15
3.10
3.05
3.00
RECEIVER O/P HIGH VOLTAGE (V)
2.95
2.90 –30
–50 70
–10 10 30 50
TEMPERATURE (°C)
90 110
Figure 19. Receiver Output High Voltage vs. Temperature
2.6
2.5
2.4
2.3
2.2
(V)
2.1
OD
V
2.0
1.9
1.8
1.7
1.6 –30
–50 70
–10 10 30 50
TEMPERATURE (°C)
90 110
Figure 20. Driver Differential Output Voltage vs. Temperature
3.5
03338-018
03338-019
03338-020
Rev. B | Page 9 of 16
ADM3485E
1.20
1.15
1.10
1.05
1.00
0.95
(mA)
CC
I
0.90
0.85
0.80
0.75
0.70 –30
–50 70
Figure 21. Supply Current vs. Temperature
(mA) DE = VCC, RE = X
I
CC
ICC (mA) RE = LO, DE = LO
–10 10 30 50
TEMPERATURE (°C)
90 110
03338-021
100
90
80
70
60
50
(nA)
CC
I
40
30
20 10
0
–20
–40 80
0204060
TEMPERATURE (
ICC (mA)
°
C)
Figure 22. Shutdown Current vs. Temperature
03338-022
Rev. B | Page 10 of 16
ADM3485E
3

STANDARDS AND TESTING

Table 6 compares RS-422 and RS-485 interface standards, while Table 7 and Table 8 show transmitting and receiving truth tables.
Table 6.
Specification RS-422 RS-485
Transmission Type Differential Differential Maximum Data Rate 10 MB/s 10 MB/s Maximum Cable Length 4000 ft. 4000 ft. Minimum Driver Output Voltage ±2 V ±1.5 V Driver Load Impedance 100 Ω 54 Ω Receiver Input Resistance 4 kΩ min 12 kΩ min Receiver Input Sensitivity ±200 mV ±200 mV Receiver Input Voltage Range
7 V to +7 V 7 V to +12 V
No. of Drivers/Receivers Per Line 1/10 32/32
Table 7. Transmitting Truth Table
Transmitting Inputs Transmitting Outputs
DE DI B A
RE
X 1 1 0 1 X 1 0 1 0 0 0 X Hi-Z Hi-Z 1 0 X Hi-Z Hi-Z
Table 8. Receiving Truth Table
Receiving Inputs Receiving Outputs
DE A–B RO
RE
0 X > +0.2 V 1 0 X < –0.2 V 0 0 X Inputs O/C 1 1 X X Hi-Z

ESD/EFT TRANSIENT PROTECTION SCHEME

The ADM3485E uses protective clamping structures on its inputs and outputs that clamp the voltage to a safe level and dissipate the energy present in ESD (electrostatic) and EFT (electrical fast transients) discharges. This protection structure achieves ESD protection up to 8 kV according to IEC1000-4-2, and EFT protection up to 2 kV on all input/output (I/O) lines.

ESD TESTING

Two coupling met h o ds are use d f o r E SD te st ing, contac t discharge and air-gap discharge. Contact discharge calls for a direct connection to the unit being tested. Air-gap discharge uses a higher test voltage but does not make direct contact with the unit under test. With air discharge, the discharge gun is moved toward the unit under test, developing an arc across the air gap, hence the term air-discharge. This method is influenced by humidity, temperature, barometric pressure, distance, and rate of closure of the discharge gun. The contact-discharge method, while less realistic, is more repeatable and is gaining acceptance and preference over the air-gap method.
Although very little energy is contained within an ESD pulse, the extremely fast rise time, coupled with high voltages, can cause failures in unprotected semiconductors. Catastrophic destruction can occur immediately as a result of arcing or heating. Even if catastrophic failure does not occur immediately, the device may suffer from parametric degradation, which may result in degraded performance. The cumulative effects of continuous exposure can eventually lead to complete failure.
I/O lines are particularly vulnerable to ESD damage. Simply touching or plugging in an I/O cable can result in a static discharge that can damage or completely destroy the interface product connected to the I/O port. It is extremely important, therefore, to have high levels of ESD protection on the I/O lines.
The ESD discharge could induce latch-up in the device under test, so it is important that ESD testing on the I/O pins be carried out while device power is applied. This type of testing is more representative of a real-world I/O discharge where the equipment is operating normally when the discharge occurs.
Table 9. ESD Test Results
ESD Test Method I/O Pins
IEC1000-4-2: Contact ±8 kV
100%
90%
PEAK
I
6.8%
10%
TIME
TIME
t
03338-023
t
03338-024
100%
90%
PEAK
I
10%
0.1 TO 1ns 30ns
t
DL
60ns
t
RL
Figure 23. Human Body Model Current Waveform
Figure 24. IEC1000-4-2 ESD Current Waveform
Rev. B | Page 11 of 16
ADM3485E
V
V

FAST TRANSIENT BURST IMMUNITY (IEC1000-4-4)

IEC1000-4-4 (previously 801-4) covers electrical fast-transient­burst (EFT) immunity. Electrical fast transients occur as a result of arcing contacts in switches and relays. The tests simulate the interference generated when, for example, a power relay discon­nects an inductive load. A spark is generated due to the well­known back EMF effect. This spark consists of a burst of sparks as the relay contacts separate. The voltage appearing on the line consists of a burst of extremely fast transient impulses. A similar effect occurs when turning on fluorescent lights.
The fast transient burst test, defined in IEC1000-4-4, simulates this arcing and its waveform is illustrated in Figure 25. It consists of a burst of 2.5 kHz to 5 kHz transients repeating at 300 ms intervals. It is specified for both power and data lines.
t
300ms 16ms
5ns
50ns
t
0.2/0.4ms
Figure 25. IEC1000-4-4 Fast Transient Waveform
Four severity levels are defined in terms of an open-circuit voltage as a function of the installation environment. The installation environments are defined as
We ll - P ro t e ct e d
Protected
Typical Indust r ial
Severe Industrial
03338-025
Table 10 shows the peak voltages for each of the environments.
Table 10. Peak Voltages
Level V
(kV) PSU V
PEAK
(kV) I/O
PEAK
Well-Protected 0.5 0.25 Protected 1 0.5 Typical Industrial 2 1 Severe Industrial 4 2
A simplified circuit diagram of the actual EFT generator is illustrated in Figure 26.
C
R
HIGH
VOLTAGE
SOURCE
R
C
C
C
Figure 26. EFT Generator
L
D
M
Z
S
50 OUTPUT
03338-026
These transients are coupled onto the signal lines using an EFT coupling clamp. The clamp is 1 m long and completely surrounds the cable, providing maximum coupling capacitance (50 pF to 200 pF, typ) between the clamp and the cable. High energy transients are capacitively coupled onto the signal lines. Fast rise times (5 ns), as specified by the standard, result in very effective coupling. This test is severe because high voltages are coupled onto the signal lines. The repetitive transients can cause problems, where single pulses do not. Destructive latch-up may be induced due to the high energy content of the transients. Note that this stress is applied while the interface products are powered up and are transmitting data. The EFT test applies hundreds of pulses with higher energy than ESD. The worst­case transient current on an I/O line can be as high as 40 A.
Test results are classified according to the following:
Normal performance within specification limits.
Temporary degradation or loss of performance that is
self-recoverable.
Temporary degradation or loss of function or perfor-
mance that requires operator intervention or system reset.
Degradation or loss of function that is not recoverable due
to damage.
Rev. B | Page 12 of 16
ADM3485E

APPLICATIONS INFORMATION

DIFFERENTIAL DATA TRANSMISSION

Differential data transmission is used to reliably transmit data at high rates over long distances and through noisy environ­ments. Differential transmission nullifies the effects of ground shifts and noise signals that appear as common-mode voltages on the line.
The ADM3485E is designed for bidirectional data communi­cations on multipoint transmission lines. A typical application showing a multipoint transmission network is illustrated in Figure 27. Only one driver can transmit at a particular time, but multiple receivers may be enabled simultaneously.
Two main standards are approved by the Electronics Industries Association (EIA) which specify the electrical characteristics of transceivers used in differential data transmission. The RS-422 standard specifies data rates up to 10 MBaud and line lengths up to 4000 feet. A single driver can drive a transmission line with up to 10 receivers.
The RS-485 standard was defined to cater to true multipoint communications. This standard meets or exceeds all the requirements of RS-422, but also allows multiple drivers and receivers to be connected to a single bus. An extended common-mode range of −7 V to +12 V is defined.
The most significant difference between RS-422 and RS-485 is the fact that the drivers may be disabled, thereby allowing more than one to be connected to a single line. Only one driver should be enabled at a time, but the RS-485 standard contains additional specifications to guarantee device safety in the event of line contention.

CABLE AND DATA RATE

The transmission line of choice for RS-485 communications is a twisted pair. Twisted-pair cable tends to cancel common­mode noise and also causes cancellation of the magnetic fields generated by the current flowing through each wire, thereby reducing the effective inductance of the pair.
As with any transmission line, it is important that reflections are minimized. This may be achieved by terminating the extreme ends of the line using resistors equal to the characteristic impedance of the line. Stub lengths of the main line should also be kept as short as possible. A properly terminated transmission line appears purely resistive to the driver.

RECEIVER OPEN-CIRCUIT FAIL-SAFE

The receiver input includes a fail-safe feature that guarantees a logic high on the receiver when the inputs are open circuit or floating.
Table 11. RS-422 and RS-485 Interface Standards
Specification RS-422 RS-485
Transmission Type Differential Differential Maximum Cable Length 4000 ft. 4000 ft. Minimum Driver Output Voltage ±2 V ±1.5 V Driver Load Impedance 100 Ω 54 Ω Receiver Input Resistance 4 kΩ min 12 kΩ min Receiver Input Sensitivity ±200 mV ±200 mV Receiver Input Voltage Range
7 V to +7 V 7 V to +12 V
RO
RE
DE
DI
ADM3485E
R
D
A
B
ADM3485E
R
RO
A
B
D
DE
RE DI
MAXIMUM NUMBER OF TRANSCEIVERS ON BUS: 50
Figure 27. Multipoint Transmission Network
Rev. B | Page 13 of 16
RO
A
R
RE
B
ADM3485E
D
DIDE
ADM3485E
A
B
R
RO
RE
DE
D
DI
03338-027
ADM3485E

OUTLINE DIMENSIONS

0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
8
1
0.100 (2.54)
0.180
(4.57)
MAX
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-095AA
BSC
5
4
0.295 (7.49)
0.285 (7.24)
0.275 (6.98)
0.015 (0.38)
MIN
SEATING PLANE
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
Figure 28. 8-Lead Plastic Dual In-Line Package [PDIP]
(N-8)
Dimensions shown in inches and( millimeters)
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
85
6.20 (0.2440)
5.80 (0.2284)
41
1.27 (0.0500) BSC
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012AA
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
0.40 (0.0157)
× 45°
Figure 29. 8-Lead Standard Small Outline Package [SOIC]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)

ORDERING GUIDE

Model Temperature Range Package Description Package Options
ADM3485EAN −40°C to +85°C Plastic DIP N-8 ADM3485EAR −40°C to +85°C Small Outline (SOIC) R-8 ADM3485EAR-REEL −40°C to +85°C Small Outline (SOIC) R-8 ADM3485EAR-REEL7 −40°C to +85°C Small Outline (SOIC) R-8 ADM3485EARZ1 −40°C to +85°C Small Outline (SOIC) R-8 ADM3485EARZ-REEL1 −40°C to +85°C Small Outline (SOIC) R-8 ADM3485EARZ-REEL71 −40°C to +85°C Small Outline (SOIC) R-8
1
Z = Pb-free part.
Rev. B | Page 14 of 16
ADM3485E
NOTES
Rev. B | Page 15 of 16
ADM3485E
NOTES
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective companies.
C03338–0–11/04(B)
Rev. B | Page 16 of 16
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