FEATURES
Operates with +3.3 V Supply
ESD Protection: 8 kV Meets IEC1000-4-2
EFT Protection: 2 kV Meets IEC1000-4-4
EIA RS-422 and RS-485 Compliant Over Full CM Range
19 k Input Impedance
Up to 50 Transceivers on Bus
20 Mbps Data Rate
Short Circuit Protection
Specified Over Full Temperature Range
Thermal Shutdown
Interoperable with 5 V Logic
1 mA Supply Current
2 nA Shutdown Current
8 ns Skew
APPLICATIONS
Telecommunications
DTE-DCE Interface
Packet Switching
Local Area Networks
Data Concentration
Data Multiplexers
Integrated Services Digital Network (ISDN)
AppleTalk
Industrial Controls
20 Mbps, EIA RS-485 Transceiver
ADM3485E
FUNCTIONAL BLOCK DIAGRAM
ADM3485E
RO
RE
DE
DI
R
B
A
D
GENERAL DESCRIPTION
The ADM3485E is a low power differential line transceiver
designed to operate using a single +3.3 V power supply. Low
power consumption makes it ideal for power sensitive applications. It is suitable for communication on multipoint bus transmission lines. Internal protection against electrostatic discharge
(ESD) and electrical fast transient (EFT) allows operation in
electrically harsh environments.
It is intended for balanced data transmission and complies with
both EIA Standards RS-485 and RS-422. It contains a differential line driver and a differential line receiver, and is suitable for
half duplex data transfer.
The input impedance is 19 kΩ allowing up to 50 transceivers to
be connected on the bus.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
Excessive power dissipation caused by bus contention or by
output shorting is prevented by a thermal shutdown circuit.
This feature forces the driver output into a high impedance
state if, during fault conditions, a significant temperature
increase is detected in the internal driver circuitry.
The receiver contains a fail-safe feature that results in a
logic high output state if the inputs are unconnected
(floating).
The ADM3485E is fabricated on BiCMOS, an advanced
mixed technology process combining low power CMOS
with fast switching bipolar technology.
The ADM3485E is fully specified over the industrial temperature range and is available in 8-lead DIP and SOIC
packages.
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum ratings for
extended periods of time may affect device reliability.
ADM3485EAN–40°C to +85°CPlastic DIPN-8
ADM3485EAR–40°C to +85°CSmall Outline (SOIC)SO-8
PIN CONFIGURATION
DIP/SOIC
RO
RE
DE
DI
1
ADM3485E
2
3
TOP VIEW
(Not to Scale)
4
8
V
CC
7
B
6
A
5
GND
PIN FUNCTION DESCRIPTIONS
MnemonicDIP/
PinSOICFunction
RO1Receiver Output. High when A > B by 200 mV or low when A < B by 200 mV.
RE2Receiver Output Enable. With RE low, the receiver output RO is enabled. With RE high, the output goes
high impedance. If RE is high and DE low, the ADM3485E enters a shutdown state.
DE3Driver Output Enable. A high level enables the driver differential outputs, A and B. A low level places it in a
high impedance state.
DI4Driver Input. When the driver is enabled, a logic low on DI forces A low and B high, while a logic high on DI
forces A high and B low.
GND5Ground Connection, 0 V.
A6Noninverting Receiver Input A/Driver Output A.
B7Inverting Receiver Input B/Driver Output B.
V
CC
8Power Supply, 3.3 V ± 0.3 V.
–4–
REV. A
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