Low Power, 3.3 V, RS-232
O
FEATURES
460 kbps data rate
Specified at 3.3 V
Meets EIA-232E specifications
0.1 μF charge pump capacitors
Low power shutdown (ADM3222 and ADM1385)
PDIP, SOIC_N, SOIC_W, SSOP, and TSSOP options
Upgrade for MAX3222/MAX3232 and LTC1385
ESD protection to IEC 1000-4-2 (801.2)
on RS-232 pins (ADM3202 only)
±8 kV: contact discharge
±15 kV: air gap discharge
APPLICATIONS
General-purpose RS-232 data link
Portable instruments
Printers, palmtop computers, PDAs
GENERAL DESCRIPTION
The ADM3202/ADM3222/ADM1385 transceivers are high
speed, 2-channel RS-232/V.28 interface devices that operate
from a single 3.3 V power supply. Low power consumption and
a shutdown facility (ADM3222/ADM1385) make them ideal for
battery-powered portable instruments.
The ADM3202/ADM3222/ADM1385 parts conform to the
EIA-232E and CCITT V.28 specifications and operate at data
rates up to 460 kbps.
Four external 0.1 μF charge pump capacitors are used for the
voltage doubler/inverter, permitting operation from a single
3.3 V supply.
The ADM3222 contains additional enable and shutdown
EN
circuitry. The
outputs. The
and transmitter outputs, reducing the quiescent current to less
than 0.5 μA. The receivers remain enabled during shutdown
unless disabled using
The ADM1385 contains a driver disable mode and a complete
shutdown mode.
The ADM3202 is available in a 16-lead PDIP, SOIC_W, and
SOIC_N, as well as a space-saving 16-lead TSSOP. The ADM3222
is available in 18-lead PDIP and SOIC_W and in 20-lead SSOP
and TSSOP. The ADM1385 is available in a 20-lead SSOP,
which is pin-compatible with the LTC1385 CG.
input can be used to three-state the receiver
SD
input is used to power down the charge pump
EN
.
Line Drivers/Receivers
ADM3202/ADM3222/ADM1385
FUNCTIONAL BLOCK DIAGRAMS
+3.3VINPUT
CMOS
INPUTS
CMOS
OUTPUTS
CMOS
INPUTS
CMOS
OUTPUTS
CMOS
INPUTS
CMOS
UTPUTS
0.1µF
10V
0.1µF
10V
R1
R2
0.1µF
10V
0.1µF
10V
R1
R2
0.1µF
10V
0.1µF
10V
R1
R2
T1
T2
T1
T2
OUT
OUT
T1
T2
OUT
OUT
OUT
OUT
+3.3V TO +6.6V
C1+
+
+
IN
IN
C1–
+6.6V TO –6.6V
C2+
C2–
T1
ADM3202
GND
VOLTAGE
DOUBLER
VOLTAGE
INVERTER
T2
V
CC
+
V+
V–
+
T1
T2
R1
R2
*INTERNAL 5kΩ PULL-DOWN RESISTOR
ON EACH RS-232 INPUT
R1
R2
Figure 1.
+3.3VINPUT
+3.3V TO +6.6V
C1+
+
+
IN
IN
EN
C1–
+6.6V TO –6.6V
C2+
C2–
T1
GND
VOLTAGE
DOUBLER
VOLTAGE
INVERTER
T2
V
CC
+
V+
V–
+
T1
T2
R1
R2
R1
R2
SD
ADM3222
*INTERNAL 5kΩ PULL-DOWN RESISTOR
ON EACH RS-232 INPUT
Figure 2.
+3.3VINPUT
+3.3V TO +6.6V
C1+
+
+
IN
IN
DD
C1–
+6.6V TO –6.6V
C2+
C2–
T1
GND
VOLTAGE
DOUBLER
VOLTAGE
INVERTER
T2
V
CC
V+
V–
C4
+
0.1µF
10V
T1
T2
R1
R2
R1
R2
SD
ADM1385
*INTERNAL 5kΩ PULL-DOWN RESISTOR
ON EACH RS-232 INPUT
Figure 3.
C3
0.1µF
6.3V
C4
0.1µF
10V
OUT
OUT
IN
IN
C3
0.1µF
6.3V
C4
0.1µF
10V
OUT
OUT
IN
IN
OUT
OUT
IN
IN
+
C5
0.1µF
EIA/TIA-232
OUTPUTS
EIA/TIA-232
INPUTS*
+
C5
0.1µF
EIA/TIA-232
OUTPUTS
EIA/TIA-232
INPUTS*
+
C3
0.1µF
6.3V
EIA/TIA-232
OUTPUTS
EIA/TIA-232
INPUTS*
+
C5
0.1µF
00071-001
00071-002
00071-003
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.
ADM3202/ADM3222/ADM1385
TABLE OF CONTENTS
Features .............................................................................................. 1
Pin Configurations (N, RN, RU, and RW Packages)................5
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagrams............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configurations and Function Descriptions ........................... 5
REVISION HISTORY
8/06—Rev. C to Rev. D
Changes to Table 1............................................................................ 3
Updated Outline Dimensions....................................................... 10
Changes to Ordering Guide.......................................................... 12
9/05—Rev. B to Rev. C
Updated Outline Dimensions....................................................... 10
Changes to Ordering Guide.......................................................... 12
Pin Configurations (RS and RU Packages)................................5
Typical Perf or m an c e Charac t e r istics ..............................................6
General Description..........................................................................8
Circuit Description .......................................................................8
High Baud Rate..............................................................................9
Outline Dimensions ....................................................................... 10
Ordering Guide .......................................................................... 12
12/01—Rev. A to Rev. B
Changes to Specifications Page........................................................2
Rev. D | Page 2 of 12
ADM3202/ADM3222/ADM1385
SPECIFICATIONS
VCC = 3.3 V ± 0.3 V, C1 to C4 = 0.1 μF. All specifications T
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
DC CHARACTERISTICS
Operating Voltage Range 3.0 3.3 5.5 V
VCC Power Supply Current 1.3 3 mA No load
8 12 mA RL = 3 kΩ to GND
Shutdown Supply Current 0.01 0.5 μA
LOGIC
Input Logic Threshold Low, V
Input Logic Threshold High, V
0.8 V TIN
INL
2.0 V TIN
INH
CMOS Output Voltage Low, VOL 0.4 V I
CMOS Output Voltage High, VOH VCC − 0.6 V I
Logic Pull-Up Current 5 10 μA TIN = GND to V
Output Leakage Current ±10 μA Receivers disabled
RS-232 RECEIVER
EIA-232 Input Voltage Range −30 +30 V
EIA-232 Input Threshold Low 0.6 1.2 V
EIA-232 Input Threshold High 1.6 2.4 V
EIA-232 Input Hysteresis 0.4 V
EIA-232 Input Resistance 3 5 7 kΩ
RS-232 TRANSMITTER
Output Voltage Swing (RS-232) ±5.0 ±5.2 V VCC = 3.3 V, all transmitter outputs loaded with 3 kΩ to ground
Output Voltage Swing (RS-562) ±3.7 V VCC = 3.0 V
Transmitter Output Resistance 300 Ω VCC = 0 V, V
RS-232 Output Short-Circuit Current ±15 mA
Output Leakage Current ±25 μA
TIMING CHARACTERISTICS
Maximum Data Rate 460 kbps
Receiver Propagation Delay
TPHL 0.4 1 μs
TPLH 0.4 1 μs
Transmitter Propagation Delay 0.3 1.2 μs RL = 3 kΩ, CL = 1000 pF
Receiver Output Enable Time 200 ns
Receiver Output Disable Time 200 ns
Transmitter Skew 30 ns
Receiver Skew 300 ns
Transition Region Slew Rate 5.5 10 30 V/μs
1
ADM1385: Input leakage current typically −10 μA when TIN = GND.
MIN
to T
, unless otherwise noted.
MAX
= 1.6 mA
OUT
= −1 mA
OUT
SD = low, V
= 3.3 V, RL = 3 kΩ to 7 kΩ, CL = 50 pF to 1000 pF, one
V
CC
Tx switching
Measured from +3 V to −3 V or −3 V to +3 V, V
= 3 kΩ, CL = 1000 pF, TA = 25°C
R
L
= ±2 V
OUT
OUT
1
CC
= 12 V
= +3.3 V;
CC
Rev. D | Page 3 of 12
ADM3202/ADM3222/ADM1385
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 2.
Parameter Rating
V
CC
V+ (VCC − 0.3 V) to +14 V
V− +0.3 V to –14 V
Input Voltages
T
IN
R
IN
Output Voltages
T
OUT
R
OUT
Short-Circuit Duration
T
OUT
Power Dissipation N-16/N-18
(Derate 6 mW/°C above 50°C) 450 mW
θJA, Thermal Impedance 117°C/W
Power Dissipation RW-16/RN-16
(Derate 6 mW/°C above 50°C) 450 mW
θJA, Thermal Impedance 158°C/W
Power Dissipation RU-16
(Derate 6 mW/°C above 50°C) 500 mW
θJA, Thermal Impedance 158°C/W
Power Dissipation RW-18
(Derate 6 mW/°C above 50°C) 450 mW
θJA, Thermal Impedance 158°C/W
Power Dissipation RS-20
(Derate 6 mW/°C above 50°C) 450 mW
θJA, Thermal Impedance 158°C/W
Power Dissipation RU-20
(Derate 6 mW/°C above 50°C) 450 mW
θJA, Thermal Impedance 158°C/W
Operating Temperature Range
Industrial (A Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature
(Soldering, 10 sec)
−0.3 V to +6 V
−0.3 V to (V+, +0.3 V)
±30 V
±15 V
−0.3 V to ( VCC + 0.3 V)
Continuous
JEDEC industry standard
J-STD-020
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. D | Page 4 of 12
ADM3202/ADM3222/ADM1385
T
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
PIN CONFIGURATIONS (N, RN, RU, AND RW PACKAGES)
1
C1+
2
V+
ADM3202
3
C1–
C2+
C2–
V–
T2
OUT
R2
IN
4
(Not to Scale)
5
6
7
8
TOP VIEW
16
V
CC
15
GND
14
T1
OUT
13
R1
IN
12
R1
OUT
11
T1
IN
10
T2
IN
9
R2
OUT
00071-004
Figure 4. N, RN, RU, and RW Packages Pin Configuration
PIN CONFIGURATIONS (RS AND RU PACKAGES)
1
EN
2
C1+
3
V+
ADM3222
4
C1–
(SSOP/TSSOP)
TOP VIEW
5
C2+
(Not to Scale)
6
C2–
7
V–
8
T2
OUT
9
R2
IN
10
R2
OUT
NC = NO CONNECT
Figure 6. RS and RU Packages Pin Configuration
20
SD
19
V
CC
18
GND
17
T1
OUT
16
R1
IN
15
R1
OUT
14
NC
13
T1
IN
12
T2
IN
11
NC
00071-006
1
EN
2
C1+
3
V+
ADM3222
4
C1–
C2+
C2–
V–
T2
OUT
R2
IN
TOP VIEW
(Not to Scale)
5
6
7
8
9
Figure 5. N and RW Packages Pin Configuration
1
DD
2
C1+
3
V+
4
5
6
V–
7
8
9
IN
10
NC = NO CONNECT
ADM1385
(SSOP)
TOP VIEW
(Not to Scale)
C1–
C2+
C2–
2
OUT
R2
NC
Figure 7. RS Package Pin Configuration
18
SD
17
V
CC
16
GND
15
T1
OUT
14
R1
IN
13
R1
OUT
12
T1
IN
11
T2
IN
10
R2
OUT
00071-005
SD
20
V
19
CC
GND
18
T1
17
OUT
R1
16
IN
R1
15
OUT
T1
14
IN
13
T2
IN
R2
12
OUT
NC
11
00071-007
Table 3. Pin Function Descriptions
Mnemonic Description
VCC Power Supply Input (3.3 V ± 0.3 V).
V+ Internally Generated Positive Supply (+6 V nominal).
V– Internally Generated Negative Supply (−6 V nominal).
GND Ground Pin. Must be connected to 0 V.
C1+, C1–
External Capacitor 1 is connected between these pins. A 0.1 μF capacitor is recommended but larger capacitors up to 47 μF
can be used.
C2+, C2–
External Capacitor 2 is connected between these pins. A 0.1 μF capacitor is recommended but larger capacitors up to 47 μF
can be used.
TxIN Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels.
Tx
Transmitter (Driver) Outputs. These are RS-232 signal levels (typically ±9 V).
OUT
RxIN Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kΩ pull-down resistor to GND is connected on each input.
Rx
Receiver Outputs. These are CMOS output logic levels.
OUT
EN
(ADM3222 only) Receiver Enable. Active low. When low, the receiver outputs are enabled. When high, they are three-stated.
SD (ADM3222 only) Shutdown Control. Active low. When low, the charge pump is shut down and the transmitter outputs
are disabled.
SD
DD
(ADM1385 only) Shutdown Control. When low, the charge pump is shut down and all transmitters and receivers are disabled.
(ADM1385 only) Driver Disable. When low, the charge pump is turned off and the transmitters are disabled. The receivers
remain active.
NC No Connect.
Rev. D | Page 5 of 12
ADM3202/ADM3222/ADM1385
TYPICAL PERFORMANCE CHARACTERISTICS
8
T
(HIGH)
6
4
OUT
8
6
V+
4
2
0
–2
Tx O/P VOLTAGE (V)
–4
T
(LOW)
–6
–8
0 1200200 400 600 800
OUT
LOAD CAPACITANCE (pF)
Figure 8. Transmitter Output Voltage High/Low vs.
Load Capacitance @ 460 kbps
8
6
4
2
0
Tx O/P (V)
–2
–4
–6
–8
2.7 2.9 3.1 3.3 3.5
Tx O/P HIGH
Tx O/P LOW
VCC (V)
1000
00071-008
00071-009
2
0
V+, V– (V)
–2
–4
–6
–8
02468
LOAD CURRENT (mA)
V–
Figure 11. Charge Pump V+, V− vs. Load Current
350
300
250
200
150
IMPEDANCE (Ω)
100
50
0
2.7 2.9 3.1 3.3 3.5
V+ (IMPEDANCE)
V– (IMPEDANCE)
VCC(V)
10 12
00071-011
00071-012
Figure 9. Transmitter Output Voltage vs. V
8
6
4
2
0
Tx O/P (V)
–2
–4
–6
–8
02468
LOAD CURRENT (mA)
Tx O/P HIGH
Tx O/P LOW
CC
10 12
Figure 10. Transmitter Output Voltage Low/High vs. Load Current
00071-010
Rev. D | Page 6 of 12
Figure 12. Charge Pump Impedance vs. V
20
18
16
14
12
10
(mA)
CC
I
8
6
4
2
0
0 1000 2000 3000
LOAD CAPACITANCE (pF)
I
@ 460kbps
CC
@ 230kbps
I
CC
CC
Figure 13. Power Supply Current vs. Load Capacitance
00071-013
ADM3202/ADM3222/ADM1385
1
2
CH 1 5.00V CH 2 5.00V M1.00µs CH1 0V
Figure 14. 460 kbps Data Transmission
T
T
00071-014
Rev. D | Page 7 of 12
ADM3202/ADM3222/ADM1385
O
R
GENERAL DESCRIPTION
+
R1
S4
S3
V
CC
V+
V–
R2
+3.3V INPUT
V
CC
V+
V–
R2
S3
S4
+3.3V INPUT
C3
+
0.1µF
6.3V
C4
+
0.1µF
10V
T1
OUT
T2
OUT
R1
IN
R2
IN
SD
C4
+
0.1µF
10V
T1
OUT
T2
OUT
R1
IN
R2
IN
SD
+
C3
+
C4
EIA/TI A-232
OUTPUTS
EIA/TI A-232
INPUTS*
+
C3
0.1µF
6.3V
EIA/TIA-232
OUTPUTS
EIA/TIA-232
INPUTS*
V+ = 2V
V
CC
GND
V– = –(V+)
+
C5
0.1µF
CC
+
C5
0.1µF
00071-018
00071-016
00071-017
00071-019
The ADM3202/ADM3222/ADM1385 are RS-232 line drivers/
receivers. Step-up voltage converters coupled with level-shifting
transmitters and receivers allow RS-232 levels to be developed
while operating from a single 3.3 V supply.
CMOS technology is used to keep the power dissipation to an
absolute minimum, allowing maximum battery life in portable
applications.
The ADM3202/ADM3222/ADM1385 are modifications,
enhancements, and improvements of the AD230 to AD241
family and derivatives. They are essentially plug-in compatible
and do not have any materially different applications.
CIRCUIT DESCRIPTION
The internal circuitry consists of these main sections:
• A charge pump voltage converter
• 3.3 V logic to EIA-232 transmitters
• EIA-232 to 5 V logic receivers
Charge Pump DC to DC Voltage Converter
The charge pump voltage converter consists of a 200 kHz
oscillator and a switching matrix. The converter generates a
±6.6 V supply from the input 3.3 V level. This is done in two
stages by using a switched capacitor technique as illustrated in
Figure 18 and Figure 19. First, the 3.3 V input supply is doubled
to 6.6 V by using Capacitor C1 as the charge storage element.
The +6.6 V level is then inverted to generate −6.6 V using C2
as the storage element. C3 is shown connected between V+ and
V
but is equally effective if connected between V+ and GND.
CC
Capacitors C3 and C4 are used to reduce the output ripple.
Their values are not critical and can be increased, if desired.
Capacitor C3 is shown connected between V+ and V
also acceptable to connect this capacitor between V+ and GND.
If desired, larger capacitors (up to 10 μF) can be used for
Capacitors C1 to C4.
+3.3V INPUT
+3.3V TO +6.6V
CMOS
INPUTS
CMOS
OUTPUTS
0.1µF
10V
0.1µF
10V
R1
R2
T1
T2
+
IN
IN
OUT
OUT
C1–
+6.6V TO –6.6V
C2+
C2–
T1
GND
VOLTAGE
DOUBLER
VOLTAGE
INVERTER
T2
ADM3202
C1+
+
Figure 15. ADM3202 Typical Operating Circuit
V
CC
V+
V–
R1
R2
*INTERNAL 5kΩ PULL-DOWN RESISTOR
ON EACH RS-232 INPUT
T1
T2
R1
R2
C3
+
0.1µF
6.3V
C4
+
0.1µF
10V
OUT
OUT
IN
IN
. It is
CC
+
C5
0.1µF
EIA/TIA-232
OUTPUTS
EIA/TIA-232
INPUTS*
00071-015
CMOS
INPUTS
CMOS
OUTPUTS
CMOS
INPUTS
CMOS
UTPUTS
FROM
VOLTAGE
DOUBLE
0.1µF
10V
0.1µF
10V
R1
R2
T1
T2
+
IN
IN
OUT
OUT
EN
C1–
+6.6V TO –6.6V
C2+
C2–
T1
GND
VOLTAGE
DOUBLER
VOLTAGE
INVERTER
T2
ADM3222
*INTERNAL 5kΩ PULL-DOWN RESISTOR
ON EACH RS-232 INPUT
+3.3V TO +6.6V
C1+
+
Figure 16. ADM3222 Typical Operating Circuit
0.1µF
10V
0.1µF
10V
R1
R2
T1
T2
+
IN
IN
OUT
OUT
DD
C1–
+6.6V TO –6.6V
C2+
C2–
T1
GND
VOLTAGE
DOUBLER
VOLTAGE
INVERTER
T2
R1
ADM1385
*INTERNAL 5kΩ PULL-DOWN RESISTOR
ON EACH RS-232 INPUT
+3.3V TO +6.6V
C1+
+
Figure 17. ADM1385 Typical Operating Circuit
V
CC
GND
INTERNAL
OSCILLATOR
S1
+
C1
S2
Figure 18. Charge Pump Voltage Doubler
V
+
GND
INTERNAL
OSCILLATOR
S1
C2
S2
Figure 19. Charge Pump Voltage Inverter
Rev. D | Page 8 of 12
ADM3202/ADM3222/ADM1385
Transmitter (Driver) Section
The drivers convert 3.3 V logic input levels into RS-232 output
levels. With V
voltage swing is typically ±6 V.
= 3.3 V and driving an RS-232 load, the output
CC
Receiver Section
The receivers are inverting level-shifters that accept RS-232
input levels and translate them into 3 V logic output levels. The
inputs have internal 5 kΩ, pull-down resistors to ground and are
protected against overvoltages up to ±30 V. Unconnected inputs
are pulled to 0 V by the internal 5 kΩ, pull-down resistor. This
results in a Logic 1 output level for unconnected inputs or for
inputs connected to GND.
The receivers have Schmitt-trigger inputs with a hysteresis level
of 0.4 V. This ensures error-free reception for both noisy inputs
and for inputs with slow transition times.
HIGH BAUD RATE
The ADM3202/ADM3222 feature high slew rates permitting
data transmission at rates well in excess of the EIA/RS-232E
specifications. RS-232 voltage levels are maintained at data rates
up to 460 kbps even under worst-case loading conditions. This
allows high speed data links between two terminals and is
suitable for the new generation ISDN modem standards that
require data rates of 230 kbps. The slew rate is internally
controlled to less than 30 V/μs to minimize EMI interference.
Rev. D | Page 9 of 12
ADM3202/ADM3222/ADM1385
C
C
OUTLINE DIMENSIONS
0.210 (5.33)
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.15
0.05
0.800 (20.32)
0.790 (20.07)
0.780 (19.81)
16
1
0.100 (2.54)
BSC
MAX
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
CONTROLL ING DIMENSI ONSARE I N INCHES; MIL LIMETER DI MENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUI VALENTS FOR
REFERENCE ON LY AND ARE NOT APPROPRIATE FOR USE IN DESI GN.
CORNER LEADS M AY BE CONFIGURED AS WHOLE O R HALF LEADS.
9
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
8
0.060 (1.52)
MAX
0.015
(0.38)
0.015 (0.38)
MIN
GAUGE
PLANE
SEATING
PLANE
0.005 (0.13)
MIN
COMPLIANT TO JEDEC STANDARDS MS-001
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.430 (10.92)
Figure 20. 16-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-16)
Dimensions shown in inches and (millimeters)
5.10
5.00
4.90
4.50
4.40
4.30
PIN 1
16
0.65
BSC
COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-153-AB
0.10
0.30
0.19
9
81
1.20
MAX
SEATING
PLANE
6.40
BSC
0.20
0.09
8°
0°
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.75
0.60
0.45
10.00 (0.3937)
9.80 (0.3858)
4.00 (0.1575)
3.80 (0.1496)
0.25 (0.0098)
0.10 (0.0039)
OPLANARITY
0.10
070706-A
16
1
1.27 (0.0500)
BSC
0.51 (0.0201)
0.31 (0.0122)
CONTROLLI NG DIMENSIO NS ARE IN MILLIMETERS ; INCH DIMENSIO NS
(IN PARENTHESES) ARE ROUNDED-OF F MILLI METER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AC
Figure 22. 16-Lead Standard Small Outline Package [SOIC_N]
Dimensions shown in millimeters and (inches)
10.50 (0.4134)
10.10 (0.3976)
16
1
1.27 (0.0500)
0.30 (0.0 118)
0.10 (0.0039)
OPLANARI TY
0.10
0.51 (0.0201)
0.31 (0.0122)
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRI ATE FOR USE I N DESIGN.
9
8
BSC
COMPLIA NT TO JEDEC STANDARDS M S-013- AA
9
6.20 (0.2441)
5.80 (0.2283)
8
1.75 (0.0689)
1.35 (0.0531)
SEATING
PLANE
Narrow Body
(RN-16)
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10.00 (0.3937)
2.65 (0.1043)
2.35 (0.0925)
SEATING
PLANE
0.25 (0.0098)
0.17 (0.0067)
8°
0°
0.33 (0.0130)
0.20 (0.0079)
0.50 (0.0197)
0.25 (0.0098)
8°
0°
1.27 (0.0500)
0.40 (0.0157)
0
.
5
0
0
.
2
5
1
9
(
0
.0
(
0
.
0
0
9
1.27 (0.0500)
0.40 (0.0157)
⋅ 45°
072506-B
7
)
45°
8
)
060606-A
Figure 21. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
Figure 23. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body
(RW-16)
Dimensions shown in millimeters and (inches)
Rev. D | Page 10 of 12
ADM3202/ADM3222/ADM1385
Y
0.920 (23.37)
0.900 (22.86)
0.880 (22.35)
0.210 (5.33)
0.150 (3.81 )
0.130 (3.30 )
0.115 (2.92)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
18
1
0.100 (2.54)
BSC
MAX
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
CONTROLLING DI MENSIONS ARE IN INCHES; MILLIMETER DIMENSI ONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLYAND ARE NOT APPROPRIATE FOR U SE IN DESI GN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
10
0.280 (7. 11)
0.250 (6.35 )
0.240 (6.10 )
9
0.060 (1.52)
MAX
0.015
(0.38)
0.015 (0.38 )
MIN
GAUGE
PLANE
SEATING
PLANE
0.005 (0.13 )
MIN
COMPLI ANT TO JEDEC STANDARDS MS-001
Figure 24. 18-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-18)
Dimensions shown in inches and (millimeters)
11.75 (0.4626)
11.35 (0.4469)
10
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
9
10.00 (0.3937)
2.65 (0.1043)
2.35 (0.0925)
0.51 (0.0201)
0.31 (0.0122)
COMPLIANT TO JE DEC STANDARDS MS-013-AB
SEATING
PLANE
8°
0°
0.33 (0.0130)
0.20 (0.0079)
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
0.10
18
1
1.27
(0.0500)
BSC
CONTROLLI NG DIMENSIONS ARE IN MILLIMETE RS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-O FF MILLIMETER EQ UIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FO R USE IN DESIGN.
Figure 25. 18-Lead Standard Small Outline Package [SOIC_W]
Wide Body
(RW-18)
Dimensions shown in millimeters and (inches)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.430 (10.9 2)
MAX
0
0
.
7
.
2
5
(
5
(
0.195 (4.95 )
0.130 (3.30 )
0.115 (2.92)
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0
.
0
2
9
.
0
0
9
0
1.27 (0.0500)
0.40 (0.0157)
6.60
6.50
6.40
20
1
PIN 1
0.65
0.10
BSC
0.30
0.19
0.15
0.05
COPLANARIT
COMPLIANT TO JEDEC STANDARDS MO-153-AC
070706-A
1.20 MAX
11
10
SEATING
PLANE
4.50
4.40
4.30
6.40 BSC
0.20
0.09
8°
0°
0.75
0.60
0.45
Figure 26. 20-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-20)
Dimensions shown in millimeters
7.50
7.20
6.90
0.38
0.22
11
5.60
5.30
8.20
5.00
7.80
1.85
1.75
1.65
SEATING
PLANE
7.40
0.25
0.09
8°
4°
0°
0.95
0.75
0.55
060106-A
10
20
5
)
45°
8
)
2.00 MAX
0.05 MIN
COPLANARITY
0.10
060706-A
1
0.65 BSC
COMPLIANT TO JEDE C STANDARDS MO-150-AE
Figure 27. 20-Lead Shrink Small Outline Package [SSOP]
(RS-20)
Dimensions shown in millimeters
Rev. D | Page 11 of 12
ADM3202/ADM3222/ADM1385
ORDERING GUIDE
Model Temperature Range Package Description Package Option
ADM3202AN –40°C to +85°C 16-Lead Plastic Dual In-Line Package [PDIP] N-16
ADM3202ANZ
ADM3202ARN –40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] RN-16
ADM3202ARN-REEL –40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] RN-16
ADM3202ARN-REEL7 –40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] RN-16
ADM3202ARNZ
ADM3202ARNZ-REEL
ADM3202ARNZ-REEL7
ADM3202ARU –40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADM3202ARU-REEL –40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADM3202ARU-REEL7 –40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADM3202ARUZ
ADM3202ARUZ-REEL
ADM3202ARUZ-REEL7
ADM3202ARW –40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_W] RW-16
ADM3202ARW-REEL –40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_W] RW-16
ADM3202ARW-REEL7 –40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_W] RW-16
ADM3202ARWZ
ADM3202ARWZ-REEL
ADM3202ARWZ-REEL7
ADM3222AN –40°C to +85°C 18-Lead Plastic Dual In-Line Package [PDIP] N-18
ADM3222ANZ
ADM3222ARS –40°C to +85°C 20-Lead Shrink Small Outline Package [SSOP] RS-20
ADM3222ARS-REEL –40°C to +85°C 20-Lead Shrink Small Outline Package [SSOP] RS-20
ADM3222ARS-REEL7 –40°C to +85°C 20-Lead Shrink Small Outline Package [SSOP] RS-20
ADM3222ARSZ
ADM3222ARSZ-REEL
ADM3222ARSZ-REEL7
ADM3222ARU –40°C to +85°C 20-Lead Thin Shrink Small Outline Package [TSSOP] RU-20
ADM3222ARU-REEL –40°C to +85°C 20-Lead Thin Shrink Small Outline Package [TSSOP] RU-20
ADM3222ARU-REEL7 –40°C to +85°C 20-Lead Thin Shrink Small Outline Package [TSSOP] RU-20
ADM3222ARUZ
ADM3222ARUZ-REEL
ADM3222ARUZ-REEL7
ADM3222ARW –40°C to +85°C 18-Lead Standard Small Outline Package [SOIC_W] RW-18
ADM3222ARW-REEL –40°C to +85°C 18-Lead Standard Small Outline Package [SOIC_W] RW-18
ADM3222ARW-REEL7 –40°C to +85°C 18-Lead Standard Small Outline Package [SOIC_W] RW-18
ADM3222ARWZ
ADM3222ARWZ-REEL
ADM3222ARWZ-REEL7
ADM1385ARS –40°C to +85°C 20-Lead Shrink Small Outline Package [SSOP] RS-20
ADM1385ARS-REEL –40°C to +85°C 20-Lead Shrink Small Outline Package [SSOP] RS-20
ADM1385ARS-REEL7 –40°C to +85°C 20-Lead Shrink Small Outline Package [SSOP] RS-20
ADM1385ARSZ
ADM1385ARSZ-REEL
ADM1385ARSZ-REEL7
1
Z = Pb-free part.
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
–40°C to +85°C 16-Lead Plastic Dual In-Line Package [PDIP] N-16
–40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] RN-16
–40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] RN-16
–40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_N] RN-16
–40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
–40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
–40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
–40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_W] RW-16
–40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_W] RW-16
–40°C to +85°C 16-Lead Standard Small Outline Package [SOIC_W] RW-16
–40°C to +85°C 18-Lead Plastic Dual In-Line Package [PDIP] N-18
–40°C to +85°C 20-Lead Shrink Small Outline Package [SSOP] RS-20
–40°C to +85°C 20-Lead Shrink Small Outline Package [SSOP] RS-20
–40°C to +85°C 20-Lead Shrink Small Outline Package [SSOP] RS-20
–40°C to +85°C 20-Lead Thin Shrink Small Outline Package [TSSOP] RU-20
–40°C to +85°C 20-Lead Thin Shrink Small Outline Package [TSSOP] RU-20
–40°C to +85°C 20-Lead Thin Shrink Small Outline Package [TSSOP] RU-20
–40°C to +85°C 18-Lead Standard Small Outline Package [SOIC_W] RW-18
–40°C to +85°C 18-Lead Standard Small Outline Package [SOIC_W] RW-18
–40°C to +85°C 18-Lead Standard Small Outline Package [SOIC_W] RW-18
–40°C to +85°C 20-Lead Shrink Small Outline Package [SSOP] RS-20
–40°C to +85°C 20-Lead Shrink Small Outline Package [SSOP] RS-20
–40°C to +85°C 20-Lead Shrink Small Outline Package [SSOP] RS-20
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C00071-0-8/06(D)
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Rev. D | Page 12 of 12
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