ANALOG DEVICES ADM3070E, ADM3071E, ADM3072E, ADM3073E, ADM3074E Service Manual

...
3.3 V, ±15 kV ESD-Protected, Half- and
V
V
V
www.BDTIC.com/ADI
Full-Duplex, RS-485/RS-422 Transceivers
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E

FEATURES

TIA/EIA RS-485/RS-422 compliant ±15 kV ESD protection on RS-485 input/output pins Data rates
ADM3070E/ADM3071E/ADM3072E: 250 kbps ADM3073E/ADM3074E/ADM3075E: 500 kbps
ADM3076E/ADM3077E/ADM3078E: 16 Mbps Half- and full-duplex options True fail-safe receiver inputs Up to 256 nodes on the bus
−40°C to +125°C temperature option Hot-swap input structure on DE and Reduced slew rates for low EMI Low power shutdown current (all except ADM3071E/
ADM3074E/ADM3077E) Outputs high-Z when disabled or powered off Common-mode input range: −7 V to +12 V Thermal shutdown and short-circuit protection 8-lead and 14-lead narrow SOIC packages
RE
pins

FUNCTIONAL BLOCK DIAGRAMS

CC
ADM3070E/ ADM3073E/ ADM3076E
RO
RE
DE
DI
RO
R
D
GND
Figure 1.
CC
ADM3071E/ ADM3074E/
ADM3077E
R
A
B
Z
Y
06285-001
A
B

APPLICATIONS

Power/energy metering Industrial control Lighting systems Telecommunications Security systems Instrumentation

GENERAL DESCRIPTION

The ADM307xE are 3.3 V, low power data transceivers with ±15 kV ESD protection suitable for full- and half-duplex communication on multipoint bus transmission lines. They are designed for balanced data transmission, and they comply with TIA/EIA standards: RS-485 and RS-422.
The devices have a ⅛ unit load receiver input impedance, which allows up to 256 transceivers on a bus. Because only one driver should be enabled at any time, the output of a disabled or powered­down driver is tristated to avoid overloading the bus.
The receiver inputs have a true fail-safe feature, which eliminates the need for external bias resistors and ensures a logic high output level when the inputs are open or shorted. This guar­antees that the receiver outputs are in a known state before communication begins and when communication ceases.
DI
RO
RE
DE
DI
D
GND
Figure 2.
CC
ADM3072E/ ADM3075E/
ADM3078E
R
D
GND
Figure 3.
Z
Y
6285-002
A
B
06285-003
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006–2008 Analog Devices, Inc. All rights reserved.
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
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TABLE OF CONTENTS

Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 4
Timing Specifications—ADM3070E/ADM3071E/
ADM3072E .................................................................................... 5
Timing Specifications—ADM3073E/ADM3074E/
ADM3075E .................................................................................... 6
Timing Specifications—ADM3076E/ADM3077E/
ADM3078E .................................................................................... 7
Absolute Maximum Ratings ............................................................ 8
ESD Caution .................................................................................. 8
Pin Configurations and Function Descriptions ........................... 9
Test Circuits and Switching Characteristics ................................ 10

REVISION HISTORY

8/08—Rev. A to Rev. B
Changes to Table 3 ............................................................................ 5
Changes to Figure 36 ...................................................................... 18
Updated Package Drawings ........................................................... 19
Changes to Ordering Guide .......................................................... 20
10/06—Rev. 0 to Rev. A
Added ADM3077E and ADM3078E ............................... Universal
Changes to Figure 2 and Figure 3 ................................................... 1
Changes to Figure 5 and Figure 6 ................................................... 9
Changes to Figure 34 and Figure 35 ............................................. 17
Updated Outline Dimensions ....................................................... 19
Changes to Ordering Guide .......................................................... 20
8/06—Revision 0: Initial Version
Typical Performance Characteristics ........................................... 12
Circuit Description......................................................................... 15
Function Tables ........................................................................... 15
Receiver Fail-Safe ....................................................................... 15
Hot-Swap Capability .................................................................. 16
Line Length vs. Data Rate ......................................................... 16
±15 kV ESD Protection ............................................................. 16
Human Body Model .................................................................. 16
256 Transceivers on the Bus ...................................................... 16
Reduced EMI and Reflections .................................................. 16
Low Power Shutdown Mode ..................................................... 17
Driver Output Protection .......................................................... 17
Typical Applications ................................................................... 17
Outline Dimensions ....................................................................... 19
Ordering Guide .......................................................................... 20
Rev. B | Page 2 of 20
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
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The driver outputs of the 250 kbps and 500 kbps devices are slew rate limited to reduce EMI and data errors caused by reflections from improperly terminated buses. Excessive power dissipation caused by bus contention or by output shorting is prevented with a thermal shutdown circuit.
Table 1. Selection Table
Half/Full
Part No.
ADM3070E Full 0.25 Yes Yes Yes 256 Yes 14 ADM3071E Full 0.25 Yes No No 256 Yes 8 ADM3072E Half 0.25 Yes Yes Yes 256 Yes 8 ADM3073E Full 0.5 Yes Yes Yes 256 Yes 14 ADM3074E Full 0.5 Yes No No 256 Yes 8 ADM3075E Half 0.5 Yes Yes Yes 256 Yes 8 ADM3076E Full 16 No Yes Yes 256 Yes 14 ADM3077E Full 16 No No No 256 Yes 8 ADM3078E Half 16 No Yes Yes 256 Yes 8
Duplex
Data Rate (Mbps)
Slew Rate Limited
Driver/Receiver Enable
The parts are fully specified over the industrial temperature ranges and are available in 8-lead and 14-lead narrow SOIC packages.
Low Power Shutdown
Nodes on Bus
±15 kV ESD on Bus Pins
Pin Count
Rev. B | Page 3 of 20
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SPECIFICATIONS

VCC = 3.3 V ± 10%, TA = T
Table 2. ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DRIVER
Differential Outputs
Differential Output Voltage VOD 2.0 VCC V RL = 100 Ω (RS-422) (see Figure 7)
1.5 VCC V RL = 54 Ω (RS-485) (see Figure 7) V Δ|VOD| for Complementary Output States1ΔVOD Common-Mode Output Voltage VOC V Δ|VOC| for Complementary Output States Short-Circuit Output Current I
250 40 mA 7 V < V Short-Circuit Foldback Output Current I
20 mA 7 V < V Output Leakage (Y, Z) Full Duplex IO 125 μA
100 μA
Logic Inputs
Input High Voltage VIH 2.0 V Input Low Voltage VIL 0.8 V Input Hysteresis V Logic Input Current IIN ±1 μA
Input Impedance First Transition 1 10 DE Thermal Shutdown Threshold TTS 175 °C Thermal Shutdown Hysteresis T
RECEIVER
Differential Inputs
Differential Input Threshold Voltage VTH 200 125 50 mV 7 V < VCM < +12 V
Input Hysteresis
Input Resistance (A, B) RIN 96 kΩ 7 V < VCM < +12 V
Input Current (A, B)
100 μA DE = 0 V, VCC = 0 V or 3.6 V, VIN = −7 V RO Logic Output
Output High Voltage VOH VCC 0.6 V I Output Low Voltage VOL 0.4 V I Short-Circuit Output Current I Tristate Output Leakage Current I
POWER SUPPLY
Supply Current ICC 0.8 1.5 mA
Shutdown Current
ESD PROTECTION
A, B, Y, Z Pins ±15 kV Human body model All Pins Except A, B, Y, Z Pins ±4 kV Human body model
1
Δ|VOD| and Δ|VOC| are the changes in VOD and VOC, respectively, when the DI input changes state.
MIN
to T
, unless otherwise noted.
MAX
V No load
CC
0.2 V RL = 54 Ω or 100 Ω (see Figure 7) /2 3 V RL = 54 Ω or 100 Ω (see Figure 7)
1
ΔV
0.2 V RL = 54 Ω or 100 Ω (see Figure 7)
OC
40 250 mA 0 V < V
OSD
20 mA (VCC 1 V) < V
OSDF
100 mV
HYS
15 °C
TSH
CC
< 12 V
OUT
< VCC
OUT
< 12 V
OUT
< +1 V
OUT
DE = 0 V, RE DE = 0 V, RE
DE, DI, RE DE, DI, RE DE, DI, RE DE, DI, RE
= 0 V, VCC = 0 V or 3.6 V, VIN = 12 V = 0 V, VCC = 0 V or 3.6 V, VIN = −7 V
ΔVTH
I
A, IB
OSR
OZR
15 mV VA + VB = 0 V
125 μA DE = 0 V, VCC = 0 V or 3.6 V, VIN = 12 V
= −1 mA
OUT
= 1 mA
OUT
±80 mA 0 V < VRO < VCC
±1 μA VCC = 3.6 V, 0 V < V
OUT
< VCC
CC
CC
= VCC
, RE = 0 V , RE = VCC
= 0 V
I
SHDN
0.8 1.5 mA
0.8 1.5 mA
0.05 10 μA
No load, DE = V No load, DE = V No load, DE = 0 V, RE DE = 0 V, RE
Rev. B | Page 4 of 20
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TIMING SPECIFICATIONS—ADM3070E/ADM3071E/ADM3072E

VCC = 3.3 V ± 10%, TA = T
Table 3.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DRIVER
Maximum Data Rate 250 kbps Propagation Delay, Low-to-High Level t Propagation Delay, High-to-Low Level t Rise Time/Fall Time tDR/tDF 350 1600 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9) |t
− t
DPLH
| Differential Driver Output Skew t
DPHL
Enable to Output High t Enable to Output Low t Disable Time from Low t Disable Time from High t Enable Time from Shutdown to High t Enable Time from Shutdown to Low t
RECEIVER
Maximum Data Rate 250 kbps Propagation Delay, Low-to-High Level t Propagation Delay, High-to-Low Level t |t
− t
RPLH
| Output Skew t
RPHL
Enable to Output High t Enable to Output Low t Disable Time from Low t Disable Time from High t Enable Time from Shutdown to High t Enable Time from Shutdown to Low t
TIME TO SHUTDOWN t
1
VCC = 3.3 V.
MIN
to T
, unless otherwise noted.
MAX
250 1500 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
DPLH
250 1500 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
DPHL
200 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
DSKEW
2500 ns See Figure 10
DZH
2500 ns See Figure 11
DZL
100 ns See Figure 11
DLZ
100 ns See Figure 10
DHZ
5500 ns See Figure 10
DZH(SHDN)
5500 ns See Figure 11
DZL(SHDN)
200 ns CL = 15 pF (see Figure 12 and Figure 13)
RPLH
200 ns CL = 15 pF (see Figure 12 and Figure 13)
RPHL
30 ns CL = 15 pF (see Figure 12 and Figure 13)
RSKEW
50 ns See Figure 14
RZH
50 ns See Figure 14
RZL
50 ns See Figure 14
RLZ
50 ns See Figure 14
RHZ
4000 ns See Figure 14
RZH(SHDN)
4000 ns See Figure 14
RZL(SHDN)
50 200 600 ns
SHDN
1
Rev. B | Page 5 of 20
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TIMING SPECIFICATIONS—ADM3073E/ADM3074E/ADM3075E

VCC = 3.3 V ± 10%, TA = T
Table 4.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DRIVER
Maximum Data Rate 500 kbps Propagation Delay, Low-to-High Level t Propagation Delay, High-to-Low Level t Rise Time/Fall Time tDR/tDF 200 800 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9) |t
− t
DPLH
| Differential Driver Output Skew t
DPHL
Enable to Output High t Enable to Output Low t Disable Time from Low t Disable Time from High t Enable Time from Shutdown to High t Enable Time from Shutdown to Low t
RECEIVER
Maximum Data Rate 500 kbps Propagation Delay, Low-to-High Level t Propagation Delay, High-to-Low Level t |t
− t
RPLH
| Output Skew t
RPHL
Enable to Output High t Enable to Output Low t Disable Time from Low t Disable Time from High t Enable Time from Shutdown to High t Enable Time from Shutdown to Low t
TIME TO SHUTDOWN t
MIN
to T
, unless otherwise noted.
MAX
180 800 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
DPLH
180 800 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
DPHL
DSKEW
2500 ns See Figure 10
DZH
2500 ns See Figure 11
DZL
100 ns See Figure 11
DLZ
100 ns See Figure 10
DHZ
DZH(SHDN)
DZL(SHDN)
200 ns CL = 15 pF (see Figure 12 and Figure 13)
RPLH
200 ns CL = 15 pF (see Figure 12 and Figure 13)
RPHL
RSKEW
50 ns See Figure 14
RZH
50 ns See Figure 14
RZL
50 ns See Figure 14
RLZ
50 ns See Figure 14
RHZ
RZH(SHDN)
RZL(SHDN)
50 200 600 ns
SHDN
100 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
4500 ns See Figure 10
4500 ns See Figure 11
30 ns CL = 15 pF (see Figure 12 and Figure 13)
4000 ns See Figure 14
4000 ns See Figure 14
Rev. B | Page 6 of 20
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TIMING SPECIFICATIONS—ADM3076E/ADM3077E/ADM3078E

VCC = 3.3 V ± 10%, TA = T
Table 5.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DRIVER
Maximum Data Rate 16 Mbps Propagation Delay, Low-to-High Level t Propagation Delay, High-to-Low Level t Rise Time/Fall Time tDR/tDF 15 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9) |t
− t
DPLH
| Differential Driver Output Skew t
DPHL
Enable to Output High t Enable to Output Low t Disable Time from Low t Disable Time from High t Enable Time from Shutdown to High t Enable Time from Shutdown to Low t
RECEIVER
Maximum Data Rate 16 Mbps Propagation Delay, Low-to-High Level t Propagation Delay, High-to-Low Level t |t
− t
RPLH
| Output Skew t
RPHL
Enable to Output High t Enable to Output Low t Disable Time from Low t Disable Time from High t Enable Time from Shutdown to High t Enable Time from Shutdown to Low t
TIME TO SHUTDOWN t
MIN
to T
, unless otherwise noted.
MAX
50 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
DPLH
50 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
DPHL
8 ns CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
DSKEW
150 ns See Figure 10
DZH
150 ns See Figure 11
DZL
100 ns See Figure 11
DLZ
100 ns See Figure 10
DHZ
1250 1800 ns See Figure 10
DZH(SHDN)
1250 1800 ns See Figure 11
DZL(SHDN)
40 75 ns CL = 15 pF (see Figure 12 and Figure 13)
RPLH
40 75 ns CL = 15 pF (see Figure 12 and Figure 13)
RPHL
8 ns CL = 15 pF (see Figure 12 and Figure 13)
RSKEW
50 ns See Figure 14
RZH
50 ns See Figure 14
RZL
50 ns See Figure 14
RLZ
50 ns See Figure 14
RHZ
1800 ns See Figure 14
RZH(SHDN)
1800 ns See Figure 14
RZL(SHDN)
50 200 600 ns
SHDN
Rev. B | Page 7 of 20
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ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.
Table 6.
Parameter Rating
VCC to GND −0.3 V to +6 V Digital Input/Output Voltage (DE, RE, DI) Receiver Output Voltage (RO) −0.3 V to (VCC + 0.3 V) Driver Output (A, B, Y, Z)/Receiver
Input (A, B) Voltage −8 V to +13 V Driver Output Current ±250 mA Operating Temperature Range
ADM307xEA −40°C to +85°C ADM307xEY −40°C to +125°C
Storage Temperature Range −65°C to +150°C θJA Thermal Impedance
8-Lead SOIC_N 158°C/W 14-Lead SOIC_N 120°C/W
Lead Temperature, Soldering (20 sec) 260°C
−0.3 V to +6 V
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ESD CAUTION

Rev. B | Page 8 of 20
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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

1
NC
RO
2
ADM3070E/
RE
3
ADM3073E/
ADM3076E
4
DE
GND
GND
TOP VIEW
DI
5
(Not to Scale)
6
7
NC = NO CONNECT
Figure 4. ADM3070E/ADM3073E/ADM3076E
Pin Configuration
14
V
CC
NC
13
A
12
11
B
Z
10
Y
9
NC
8
06285-004
V
RO
GND
CC
1
2
DI
3
4
ADM3071E/ ADM3074E/
ADM3077E
TOP VIEW
(Not to Scale)
Figure 5. ADM3071E/ADM3074E/ADM3077E
Pin Configuration
8
A
B
7
Z
6
5
Y
06285-005
RO
RE
DE
DI
1
ADM3072E/ ADM3075E/
2
ADM3078E
3
TOP VIEW
4
(Not to Scale)
V
8
CC
B
7
6
A
GND
5
06285-006
Figure 6. ADM3072E/ADM3075E/ADM3078E
Pin Configuration
Table 7. Pin Function Descriptions
ADM3070E/ ADM3073E/ ADM3076E Pin No.
2 2 1 RO
ADM3071E/ ADM3074E/ ADM3077E Pin No.
ADM3072E/ ADM3075E/ ADM3078E Pin No. Mnemonic Description
Receiver Output. When enabled, if (A − B) ≥ −50 mV, RO is high. If (A − B) ≤ −200 mV, RO is low.
3 N/A 2
Receiver Output Enable. A low level enables the receiver output.
RE
A high level places it in a high impedance state. If RE
is high and DE
is low, the device enters a low power shutdown mode.
4 N/A 3 DE
Driver Output Enable. A high level enables the driver differential A and B outputs. A low level places it in a high impedance state. If
is high and DE is low, the device enters a low power shutdown mode.
RE
5 3 4 DI
Driver Input. With a half-duplex part when the driver is enabled, a logic low on DI forces A low and B high; a logic high on DI forces A high and B low. With a full-duplex part when the driver is enabled, a logic low on DI forces Y low and Z high; a logic high on DI forces
Y high and Z low. 6, 7 4 5 GND 9 5 N/A Y N/A N/A 6 A 12 8 N/A A 10 6 N/A Z N/A N/A 7 B 11 7 N/A B 14 1 8 V
CC
Ground.
Noninverting Driver Output.
Noninverting Receiver Input A and Noninverting Driver Output A.
Noninverting Receiver Input A.
Inverting Driver Output.
Inverting Receiver Input B and Inverting Driver Output B.
Inverting Receiver Input B.
Power Supply, 3.3 V ± 10%. Bypass VCC to GND with a 0.1 μF capacitor. 1, 8, 13 N/A N/A NC No Connect. Not internally connected; can be connected to GND.
Rev. B | Page 9 of 20
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
V
V
V
A
V
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TEST CIRCUITS AND SWITCHING CHARACTERISTICS

CC
R
t
DLZ
0.25V
, t
DZL
DLZ
RECEIVER OUTPUT
R
L
500
VCC/2
, t
DZL(SHDN)
)
06285-012
Y
/2
R
V
Z
L
OD
RL/2
V
OC
06285-007
0V OR 3V
GENERATOR
D
50
S1
+
C
L
50pF
Figure 7. Driver DC Test Load
3
DE
Y
C
R
V
DI
OD
Z
L
L
06285-008
Figure 8. Driver Timing Test Circuit
CC
DI
V
/2
CC
0V
Z
V
O
Y
1/2V
+V
O
V
0V
DIFF
–V
10%
O
t
DPLH
O
V
90% 90%
t
DR
t
DSKEW
= V (Y) – V (Z)
DIFF
= |
t
DPLH
t
DPHL
t
DPHL
1/2V
O
10%
t
DF
|
06285-009
Figure 9. Driver Propagation Delays
DE
V
OUT
CC
t
,
t
DZL
DZL(SHDN)
V
OL
VOM = (VOL + VCC)/2
Figure 11. Driver Enable and Disable Times (t
ATE
V
ID
Figure 12. Receiver Propagation Delay Test Circuit
B
A
OUT
V
0V
CC
06285-011
S1
DZH(SHDN)
)
OUT
V
0V
V
0V
CC
OH
06285-010
GENERATOR
DE
OUT
0V OR 3V
t
DZH
50
,
t
DZH(SHDN)
VOM = (0 + VOH)/2
D
Figure 10. Driver Enable and Disable Times (t
+
C
L
50pF
DHZ
R
L
500
VCC/2
0.25V
t
DHZ
, t
, t
DZH
Rev. B | Page 10 of 20
B
V
OH
1.5V
V
RO
NOTES
1. THE RISE TIME AND FAL L TIME OF INP UT A AND INPUT B < 4ns.
OL
t
RPLH
Figure 13. Receiver Propagation Delays
t
RPHL
+1
–1V
06285-013
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
V
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S2 CLOSED
S3 = +1.5V
RE
t
,
RZH
RO
S1 OPEN
S2 CLOSED
S3 = +1.5V
RE
RO
1.5V
t
RHZ
0
.
2
5
V
S1 OPEN
t
RZH(SHDN)
+1.5
–1.5V
GENERATOR
S3
+
t
C 15pF
RLZ
1k
L
VOH/2
V
ID
50
3V
RE
0V
V
OH
RO
0V
3V
RE
0V
V
OH
RO
0V
S1
S2
S1 CLOSED
S2 OPEN
S3 = –1.5V
t
,
t
RZL
RZL(SHDN)
S1 CLOSED
1.5V
0
.
2
5
V
S2 OPEN
S3 = –1.5V
V
CC
3V
1.5V
0V
V
CC
(VOL + VCC)/2
V
OL
3V
0V
V
CC
V
OL
06285-014
Figure 14. Receiver Enable and Disable Times
Rev. B | Page 11 of 20
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TYPICAL PERFORMANCE CHARACTERISTICS

1.2
1.1
3.30
3.25
IRO = –1mA
1.0
0.9
0.8
0.7
SUPPLY CURRENT (mA)
0.6
0.5 –40
–10 20 50 80
TEMPERATURE ( °C)
110
06285-020
3.20
3.15
3.10
OUTPUT HIG H VOLTAG E (V)
3.05
3.00 –50 125
–25 0 25 50 75 100
TEMPERATURE ( °C)
Figure 15. Supply Current vs. Temperature Figure 18. Receiver Output High Voltage vs. Temperature
18
–16
–14
–12
–10
–8
–6
OUTPUT CURRENT (mA)
–4
–2
0
03
0.5 1.0 1.5 2.0 2.5 3.0
OUTPUT HIG H VOLTAG E (V)
.5
06285-021
0.7
0.6
0.5
0.4
0.3
0.2
OUTPUT LOW VOLTAGE (V)
0.1
0 –50 125
–25 0 25 50 75 100
TEMPERATURE ( °C)
IRO = 1mA
Figure 16. Output Current vs. Receiver Output High Voltage Figure 19. Receiver Output Low Voltage vs. Temperature
25
20
15
10
OUTPUT CURRENT ( mA)
5
0
03
0.5 1.0 1.5 2.0 2.5 3.0
OUTPUT LOW VOLTAGE (V)
.5
06285-022
100
90
80
70
60
50
40
30
OUTPUT CURRENT ( mA)
20
10
0
03
0.5 1.0 1.5 2.0 2.5 3.0
DIFFERENTIAL OUTP UT VOLTAGE (V)
Figure 17. Output Current vs. Receiver Output Low Voltage Figure 20. Driver Output Current vs. Differential Output Voltage
06285-023
06285-024
.5
06285-025
Rev. B | Page 12 of 20
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
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2.6
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
DIFFERENTIAL OUTPUT VOLTAGE (V)
1.7
1.6 –50 125
–25 0 25 50 75 100
TEMPERATURE ( °C)
RL = 54
Figure 21. Driver Differential Output Voltage vs. Temperature
120
06285-026
0.9
0.8
0.7
0.6
0.5
0.4
0.3
SHUTDOWN CURRENT (µA)
0.2
0.1
0 –50 125
–25 0 25 50 75 100
TEMPERATURE ( °C)
Figure 24. Shutdown Current vs. Temperature
1200
06285-029
100
80
60
40
OUTPUT CURRENT (mA)
20
0
7–6–5–4–3–2–101234
OUTPUT HIG H VOLTAG E (V)
Figure 22. Output Current vs. Driver Output High Voltage
120
100
80
60
40
OUTPUT CURRENT (mA)
20
1000
t
800
600
400
PROPAG ATIO N DELAY (ns)
200
0
06285-027
–40 25 125
TEMPERATURE ( °C)
DPHL
t
DPLH
06285-030
Figure 25. ADM3070E/ADM3071E/ADM3072E Driver
Propagation Delay vs. Temperature (250 kbps)
700
600
t
500
400
300
200
PROPAG ATIO N DELAY (ns)
100
DPHL
t
DPLH
0
024681012
OUTPUT LOW VOLTAGE (V)
06285-028
Figure 23. Output Current vs. Driver Output Low Voltage
Rev. B | Page 13 of 20
0
–40 25
TEMPERATURE ( °C)
Figure 26. ADM3073E/ADM3074E/ADM3075E Driver
Propagation Delay vs. Temperature (500 kbps)
125
06285-031
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
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35
t
30
25
20
t
DPLH
DPHL
DI
3
15
10
PROPAGATI ON DELAY (n s)
5
0
–50 125
–25 0 25 50 75 100
TEMPERATURE ( °C)
Figure 27. ADM3076E/ADM3077E/ADM3078E Driver
Propagation Delay vs. Temperature (16 Mbps)
70
60
50
40
30
20
PROPAGATI ON DELAY (n s)
10
0
–50 125
–25 0 25 50 75 100
TEMPERATURE ( °C)
t
DPLH
t
DPHL
Figure 28. Receiver Propagation Delay vs. Temperature
M1
VY– V
Z
CH3 2.0V 8ns/p t
06285-032
MATH1 2.01V 400ns
M400s 125MS/s A CH2 1.24V
06285-036
Figure 30. ADM3073E/ADM3074E/ADM3075E Driver
Propagation Delay (500 kbps)
VY– V
M1
3
CH3 2.0V IT 400p s/pt
06285-033
MATH1 1.0V 20ns
Z
DI
M20ns 1.25G S/s A CH3 1.64V
06285-037
Figure 31. ADM3076E/ADM3077E/ADM3078E Driver
Propagation Delay (16 Mbps)
3
M1
DI
VY– V
Z
CH3 2.0V 20ns/p t
MATH1 2.01V 1.0µs
M1.0µs 50MS/s A CH2 1.24V
06285-034
Figure 29. ADM3070E/ADM3071E/ADM3072E Driver
Propagation Delay (250 kbps)
Rev. B | Page 14 of 20
VA– V
B
M1
RO
3
CH3 2.0V 4ns/p t
MATH1 2.01V 200ns
M200ns 250MS/ s A CH2 1.24V
Figure 32. Receiver Propagation Delay
06285-035
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
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CIRCUIT DESCRIPTION

The ADM307xE series are high speed transceivers for RS485 and RS-422 communications. Each device contains one driver and one receiver. All devices feature fail-safe circuitry, which guarantees a logic high receiver output when the receiver inputs are open or shorted or when they are connected to a terminated transmission line with all drivers disabled (see the Receiver Fail­Safe section). The ADM307xE also feature a hot-swap capability, allowing line insertion without erroneous data transfer (see the Hot-Swap Capability section). The ADM3070E/ADM3071E/ ADM3072E feature reduced slew rate drivers that minimize EMI and reduce reflections caused by improperly terminated cables, allowing for error-free data transmission at rates up to 250 kbps.
The ADM3073E/ADM3074E/ADM3075E also offer slew rate limits, allowing transmit speeds up to 500 kbps. The ADM3076E/ ADM3077E/ADM3078E driver slew rates are not limited, making possible transmit speeds of up to 16 Mbps. The ADM3072E/ ADM3075E/ADM3078E are half-duplex transceivers; the ADM3070E/ADM3071E/ADM3073E/ADM3074E/ADM3076E/ ADM3077E are each full-duplex transceivers. All devices operate from a single 3.3 V supply. Drivers are output short-circuit current limited, and thermal shutdown circuitry protects drivers against excessive power dissipation. When activated, the thermal shutdown circuitry places the driver outputs into a high impedance state.

FUNCTION TABLES

ADM3070E/ADM3073E/ADM3076E

Table 8. Transmitting Truth Table
Transmitting Inputs Transmitting Outputs
RE
X1 1 1 1 0 X1 1 0 0 1 0 0 X1 High-Z2 High-Z2 1 0 X1 Shutdown Shutdown
1
X = don't care.
2
High-Z = high impedance.
Table 9. Receiving Truth Table
RE
0 X1 ≥ −50 mV 1 0 X1 ≤ −200 mV 0 0 X1 Open/shorted 1 1 1 X1 High-Z2
1 0 X1 Shutdown
1
X = don't care.
2
High-Z = high impedance.
DE DI Y Z
Receiving Inputs Receiving Outputs
DE A − B RO

ADM3071E/ADM3074E/ADM3077E

Table 10. Transmitting Truth Table
Transmitting Input Transmitting Outputs
DI Y Z
1 1 0 0 0 1
Table 11. Receiving Truth Table
Receiving Input Receiving Output
A − B RO
≥ −50 mV 1 ≤ −200 mV 0 Open/shorted 1

ADM3072E/ADM3075E/ADM3078E

Table 12. Transmitting Truth Table
Transmitting Inputs Transmitting Outputs
RE
DE DI A, Y B, Z
X1 1 1 1 0 X1 1 0 0 1 0 0 X1 High-Z2 High-Z2 1 0 X1 Shutdown Shutdown
1
X = don't care.
2
High-Z = high impedance.
Table 13. Receiving Truth Table
Receiving Inputs Receiving Output
RE
DE A − B RO
0 0 ≥ −50 mV 1 0 0 ≤ −200 mV 0 0 0 Open/shorted 1
1 1 X1 High-Z2
1 0 X1 Shutdown
1
X = don't care.
2
High-Z = high impedance.

RECEIVER FAIL-SAFE

The ADM307xE family guarantees a logic high receiver output when the receiver inputs are shorted, open, or connected to a terminated transmission line with all drivers disabled. This is done by setting the receiver input threshold between −50 mV and −200 mV. If the differential receiver input voltage (A − B) is greater than or equal to −50 mV, RO is logic high. If A − B is less than or equal to −200 mV, RO is logic low. In the case of a terminated bus with all transmitters disabled, the receiver differential input voltage is pulled to 0 V by the termination. With the receiver thresholds of the ADM307xE family, this results in a logic high with a 50 mV minimum noise margin.
Rev. B | Page 15 of 20
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HOT-SWAP CAPABILITY (ALL EXCEPT ADM3071E/ADM3074E/ADM3077E)

Hot-Swap Inputs

When a circuit board is inserted into a hot (or powered) back­plane, differential disturbances to the data bus can lead to data errors. During this period, processor logic output drivers are high impedance and are unable to drive the DE and
RE
inputs of the RS-485 transceivers to a defined logic level. Leakage currents up to ±10 μA from the high impedance state of the processor logic drivers can cause standard CMOS enable inputs of a tran­sceiver to drift to an incorrect logic level. Additionally, parasitic circuit board capacitance can cause coupling of V
or GND to
CC
the enable inputs. Without the hot-swap capability, these factors can improperly enable the driver or receiver of the transceiver. When V RE
rises, an internal pull-down circuit holds DE low and
CC
high. After the initial power-up sequence, the pull-down
circuit becomes transparent, resetting the hot-swap tolerable input.

LINE LENGTH vs. DATA RATE

The RS-485/RS-422 standard covers line lengths up to 4000 feet. For line lengths greater than 4000 feet, Figure 37 illustrates an example line repeater.

±15 kV ESD PROTECTION

Two coupling methods are used for ESD testing: contact discharge and air-gap discharge. Contact discharge calls for a direct connection to the unit being tested. Air-gap discharge uses a higher test voltage but does not make direct contact with the test unit. With air-gap discharge, the discharge gun is moved toward the unit under test, developing an arc across the air gap, thus the term air-gap discharge. This method is influenced by humidity, temperature, barometric pressure, distance, and rate of closure of the discharge gun. The contact discharge method, while less realistic, is more repeatable and is gaining acceptance and preference over the air-gap method.
Although very little energy is contained within an ESD pulse, the extremely fast rise time, coupled with high voltages, can cause failures in unprotected semiconductors. Catastrophic destruc­tion can occur immediately as a result of arcing or heating. Even if catastrophic failure does not occur immediately, the device can suffer from parametric degradation that can result in degraded performance. The cumulative effects of continuous exposure can eventually lead to complete failure.
Input/output lines are particularly vulnerable to ESD damage. Simply touching or connecting an input/output cable can result in a static discharge that damages or completely destroys the interface product connected to the input/output port. It is extremely important, therefore, to have high levels of ESD protection on the input/output lines.
The ESD discharge can induce latch-up in the device under test, so it is important that ESD testing on the input/output pins be
carried out while device power is applied. This type of testing is more representative of a real-world input/output discharge, which occurs when equipment is operating normally.
The transmitter outputs and receiver inputs of the ADM307xE family are characterized for protection to a ±15 kV limit using the human body model.

HUMAN BODY MODEL

Figure 33 shows the human body model and the current waveform it generates when discharged into low impedance. This model consists of a 100 pF capacitor charged to the ESD voltage of interest, which is then discharged into the test device through a 1.5 kΩ resistor.
HIGH
VOLTAGE
GENERATOR
HUMAN BODY MODEL ESD ASSOC. STD 55.1
100%
90%
PEAK
I
36.8
10%
t
RL
Figure 33. Human Body Model and Current Waveform
R1
ESD TEST METHOD
t
DL
R2
C1
R2
1.5kC1100pF
DEVICE UNDER
TEST
TIME
t

256 TRANSCEIVERS ON THE BUS

The standard RS-485 receiver input impedance is 12 kΩ (1 unit load), and the standard driver can drive up to 32 unit loads. The ADM307xE family of transceivers has a ⅛ unit load receiver input impedance (96 kΩ), allowing up to 256 transceivers to be connected in parallel on one commu­nication line. Any combination of these devices and other RS-485 transceivers with a total of 32 unit loads or fewer can be connected to the line.

REDUCED EMI AND REFLECTIONS

The ADM3070E/ADM3071E/ADM3072E feature reduced slew rate drivers that minimize EMI and reduce reflections caused by improperly terminated cables, allowing for error­free data transmission at rates up to 250 kbps. The ADM3073E/ ADM3074E/ADM3075E offer higher driver output slew rate limits, allowing for transmit speeds of up to 500 kbps.
06285-015
Rev. B | Page 16 of 20
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
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LOW POWER SHUTDOWN MODE (ALL EXCEPT ADM3071E/ADM3074E/ADM3077E)
Low power shutdown mode is initiated by bringing both RE high and DE low. In shutdown mode, the device draws less than 1 μA of supply current.
RE
and DE can be driven simulta­neously, but the parts are guaranteed not to enter shutdown if RE
is high and DE is low for fewer than 50 ns. If the inputs are in this state for 600 ns or more, the parts are guaranteed to enter shutdown. Enable times t originally in a low power shutdown state (see the and Switching Characteristics and t
) assume that the part was originally shut down. It
ZL(SHDN)
and tZL assume that the part was not
ZH
Tes t Ci rcu its
section). Enable times (t
ZH(SHDN)
takes drivers and receivers longer to become enabled from low power shutdown mode (t receiver disable mode (t
ZH
ZH(SHDN)
, tZL).
, t
ZL(SHDN)
) than from driver/

DRIVER OUTPUT PROTECTION

The ADM307xE family features two methods to prevent
circuits over the whole common-mode voltage range (see Figure 22 and Figure 23). In addition, a thermal shutdown circuit forces the driver outputs into a high impedance state if the die temperature rises excessively.

TYPICAL APPLICATIONS

The ADM3072E/ADM3075E/ADM3078E transceivers are designed for bidirectional data communications on multipoint bus transmission lines. Figure 34 shows a typical network applications circuit. The ADM3071E/ADM3074E/ADM3077E transceivers are designed for point-to-point transmission lines (see Figure 35). The ADM3070E/ADM3073E/ADM3076E transceivers are designed for full-duplex RS-485 networks (see Figure 36).
To minimize reflections, terminate the line at both ends with a termination resistor (the value of the termination resistor should be equal to the characteristic impedance of the cable used) and keep stub lengths off the main line as short as possible.
excessive output current and power dissipation caused by faults or by bus contention. Current limit protection on the output stage provides immediate protection against short
ADM3072E/ ADM3075E/
ADM3078E
RO
RE
DE
DI
NOTES
1. MAXIMUM NUMBER OF NODES: 256.
2.
R
D
IS EQUAL TO THE CHARACTERI STIC IM PEDANCE OF THE CABLE USED.
T
A
R
T
B
ADM3072E/ ADM3075E/
ADM3078E
R
RO
A
B
DE
RE DI
D
RO
R
T
A
B
ADM3072E/ ADM3075E/
ADM3078E
R
RE
DE
D
DI
A
B
ADM3072E/ ADM3075E/
ADM3078E
R
D
RO
RE
DE
DI
06285-016
Figure 34. ADM3072E/ADM3075E/ADM3078E Typical Half-Duplex RS-485 Network
RO
MASTER
ADM3071E/ ADM3074E/
ADM3077E
R
A
B
Y
Z
SLAVE
ADM3071E/ ADM3074E/
ADM3077E
D
DI
DI
D
Z
Y
Figure 35. ADM3071E/ADM3074E/ADM3077E Full-Duplex Point-to-Point Applications
Rev. B | Page 17 of 20
B
A
R
RO
06285-017
ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
2. R
A
V
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ADM3070E/ ADM3073E/
RO
RE
DE
DI
ADM3076E
R
D
A
R
T
B
Z
Y
SLAVE
ADM3070E/ ADM3073E/
AB
R
Y
Z
D
ADM3076E
DE
DI
RO
NOTES
1. MAXIMUM NUMBER OF NODE S: 256. IS EQUAL TO THE CHARACTERISTIC I MPEDANCE OF T HE CABLE USED.
T
AB
R
RO
R
T
Y
Z
D
SLAVE
ADM3070E/ ADM3073E/ ADM3076E
DI
RERE
DE
ADM3070E/ ADM3073E/ ADM3076E
Y
Z
B
A
SL
EMASTER
DE
D
DI
R
RO
RE
06285-019
Figure 36. ADM3070E/ADM3073E/ADM3076E Full-Duplex RS-485 Network
ADM3070E/ ADM3073E/
RO
RE
DE
DI
ADM3076E
R
D
A
R
B
Z
R
Y
T
DATA IN
DATA OUT
T
NOTES
1. R
IS EQUAL TO THE CHARACTERI STIC
T
IMPEDANCE OF THE CABLE USED.
06285-018
Figure 37. Line Repeater for ADM3070E/ADM3073E/ADM3076E
Rev. B | Page 18 of 20
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OUTLINE DIMENSIONS

5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
CONTROLL ING DIMENSI ONS ARE IN MILLIMETERS; INCH DI MENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRI ATE FOR USE IN DESIGN.
85
1
1.27 (0.0500)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-A A
BSC
6.20 (0.2441)
5.80 (0.2284)
4
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
8° 0°
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
0.40 (0.0157)
45°
012407-A
Figure 38. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
8.75 (0.3445)
8.55 (0.3366)
BSC
8
7
6.20 (0.2441)
5.80 (0.2283)
1.75 (0.0689)
1.35 (0.0531)
SEATING PLANE
8° 0°
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0197)
0.25 (0.0098)
1.27 (0.0500)
0.40 (0.0157)
45°
4.00 (0.1575)
3.80 (0.1496)
0.25 (0.0098)
0.10 (0.0039)
COPLANARIT Y
0.10
14
1
1.27 (0.0500)
0.51 (0.0201)
0.31 (0.0122)
CONTROLL ING DIMENSIONS ARE IN MILLIMETERS; INCH DI MENSIONS (IN PARENTHESES) ARE ROUNDED-O FF MIL LIMETE R EQUIVALENTS FOR REFERENCE ON LY AND ARE NOT APPROPRI ATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AB
Figure 39. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-14)
Dimensions shown in millimeters and (inches)
Rev. B | Page 19 of 20
060606-A
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ORDERING GUIDE

Te mp e ra tu r e
Model
ADM3070EARZ
1
ADM3070EARZ-REEL7 ADM3070EYRZ
1
–40°C to +125°C 14-Lead Standard Small Outline Package (SOIC_N) R-14
ADM3070EYRZ-REEL7 ADM3071EARZ
1
–40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3071EARZ-REEL7 ADM3071EYRZ
1
–40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3071EYRZ-REEL7 ADM3072EARZ
1
–40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3072EARZ-REEL7 ADM3072EYRZ
1
–40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3072EYRZ-REEL7 ADM3073EARZ
1
–40°C to +85°C 14-Lead Standard Small Outline Package (SOIC_N) R-14
ADM3073EARZ-REEL7 ADM3073EYRZ
1
–40°C to +125°C 14-Lead Standard Small Outline Package (SOIC_N) R-14
ADM3073EYRZ-REEL7 ADM3074EARZ
1
–40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3074EARZ-REEL7 ADM3074EYRZ
1
–40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3074EYRZ-REEL7 ADM3075EARZ
1
–40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3075EARZ-REEL7 ADM3075EYRZ
1
–40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3075EYRZ-REEL7 ADM3076EARZ
1
–40°C to +85°C 14-Lead Standard Small Outline Package (SOIC_N) R-14
ADM3076EARZ-REEL7 ADM3076EYRZ
1
–40°C to +125°C 14-Lead Standard Small Outline Package (SOIC_N) R-14
ADM3076EYRZ-REEL7 ADM3077EARZ
1
–40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3077EARZ-REEL7 ADM3077EYRZ
1
–40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3077EYRZ-REEL7 ADM3078EARZ
1
–40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3078EARZ-REEL7 ADM3078EYRZ
1
–40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8
ADM3078EYRZ-REEL7
1
Z = RoHS Compliant Part.
Range Package Description Package Option Ordering Quantity
–40°C to +85°C 14-Lead Standard Small Outline Package (SOIC_N) R-14
1
–40°C to +85°C 14-Lead Standard Small Outline Package (SOIC_N) R-14 1,000
1
–40°C to +125°C 14-Lead Standard Small Outline Package (SOIC_N) R-14 1,000
1
–40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
1
–40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
1
–40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
1
–40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
1
–40°C to +85°C 14-Lead Standard Small Outline Package (SOIC_N) R-14 1,000
1
–40°C to +125°C 14-Lead Standard Small Outline Package (SOIC_N) R-14 1,000
1
–40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
1
–40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
1
–40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
1
–40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
1
–40°C to +85°C 14-Lead Standard Small Outline Package (SOIC_N) R-14 1,000
1
–40°C to +125°C 14-Lead Standard Small Outline Package (SOIC_N) R-14 1,000
1
–40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
1
–40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
1
–40°C to +85°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
1
–40°C to +125°C 8-Lead Standard Small Outline Package (SOIC_N) R-8 1,000
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Rev. B | Page 20 of 20
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