Quad UV/OV positive/negative supervisor
Supervises up to 2 negative rails
Adjustable UV and OV input thresholds
High threshold accuracy over temperature: ±1.5%
1 V buffered reference output
Open-drain
Adjustable reset timeout with disable option
Outputs guaranteed down to V
Glitch immunity
62 μA supply current
16-lead QSOP package
APPLICATIONS
Server supply monitoring
FPGA/DSP core and I/O voltage monitoring
Telecommunications equipment
Medical equipment
and OV reset outputs
UV
of 1 V
CC
VH1
VL1
VH2
VL2
VH3
VL3
VH4
VL4
Voltage Supervisor
FUNCTIONAL BLOCK DIAGRAM
CC
ADM2914
500mV
500mV
500mV
MUX
500mV
ADM2914
TIMER
TIMER
UV
OUTPUT
LOGIC
OV
LOGIC
REF
LATCH/DIS
REF
GENERAL DESCRIPTION
The ADM2914 is a quad voltage supervisory IC ideally suited
for monitoring multiple rails in a wide range of applications.
Each monitored rail has two dedicated input pins, VHx and VLx,
which allows each rail to be monitored for both overvoltage
(OV) and undervoltage (UV) conditions. A common active low
undervoltage (
of the monitored voltage rails.
The ADM2914 includes a 1 V buffered reference output, REF,
that acts as an offset when monitoring a negative voltage. The
three-state SEL pin determines the polarity of the third and
fourth inputs, that is, it configures the device to monitor
positive or negative supplies.
The device incorporates an internal shunt regulator that enables
the device to be used in higher voltage systems. This feature
requires a resistor to be placed between the main supply rail and
UV
) and overvoltage (OV) pin is shared by each
SELGND
Figure 1.
the V
pin to limit the current flow into the VCC pin to no
CC
greater than 10 mA. The ADM2914 uses the internal shunt
regulator to regulate V
if the supply line exceeds the absolute
CC
maximum ratings.
The ADM2914 is available in two models. The ADM2914-1
offers a latching overvoltage output that can be cleared by
toggling the
pin that can override and disable both the
LATCH
input pin. The ADM2914-2 has a disable
OV
and UV output
signals.
The ADM2914 is available in a 16-lead QSOP package. The
device operates over the extended temperature range of −40°C
to +125°C.
08170-001
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Changes to Figure 17 and Figure 18 ............................................... 9
12/09—Rev. 0: Rev. A
Changes to Shunt Regulator Section ............................................ 12
5/09—Revision 0: Initial Version
Rev. B | Page 2 of 16
ADM2914
http://www.BDTIC.com/ADI
SPECIFICATIONS
TA = −40°C to +85°C. Typical values at TA = 25°C, unless otherwise noted. VCC = 3.3 V, VLx = 0.45 V, VHx = 0.55 V,
SEL = V
, DIS = open, unless otherwise noted.
CC
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
SHUNT REGULATOR
VCC Shunt Regulator Voltage, V
SHUNT
6.2 6.6 7.0 V TA = −40°C to +125°C
VCC Shunt Regulator Load Regulation, ∆V
SHUNT
SUPPLY
Supply Voltage, V
Minimum VCC Output Valid, V
Supply Undervoltage Lockout, V
Supply Undervoltage Lockout Hysteresis, ∆V
Supply Current, I
1
CC
CCR(MIN)
CC(UVLO)
CC(HYST)
CC
REFERENCE OUTPUT
Reference Output Voltage, V
REF
0.985 1 1.020 V TA = −40°C to +125°C
UNDERVOLTAGE/OVERVOLTAGE CHARACTERISTICS
Undervoltage/Overvoltage Threshold, V
Undervoltage/Overvoltage Threshold to Output Delay, t
VHx, VLx Input Current, I
VHL
UOT
UOD
±30 nA TA = −40°C to +125°C
UV
/OV Timeout Period, t
UOTO
6 8.5 14 ms TA = −40°C to +125°C
OV
LATCH CLEAR INPUT (ADM2914-1)
OV
Latch Clear Threshold Input High, V
OV
Latch Clear Threshold Input Low, V
LATCH
Input Current, I
LATCH
LATCH
LATCH
(IH)
(IL)
DISABLE INPUT (ADM2914-2)
DIS Input High, V
DIS Input Low, V
DIS Input Current, I
DIS(IH)
DIS(IL)
DIS
TIMER CHARACTERISTICS
TIMER Pull-Up Current, I
TIMER(UP)
−1.2 −2.1 −2.8 A TA = −40°C to +125°C
TIMER Pull-Down Current, I
TIMER(DOWN)
1.2 2.1 2.8 A TA = −40°C to +125°C
TIMER Disable Voltage, V
TIMER(DIS)
OUTPUT VOLTAGE
Output Voltage High, UV/OV, V
Output Voltage Low, UV/OV, V
OH
OL
0.01 0.15 V
THREE-STATE INPUT SEL
Low Level Input Voltage, VIL 0.4 V
High Level Input Voltage, VIH 1.4 V
Pin Voltage When Left in High-Z State, V
Z
0.6 0.9 1.2 V TA = −40°C to +125°C
SEL High, Low Input Current, I
Maximum SEL Input Current, I
1
The maximum voltage on the VCC pin is limited by the input current. The VCC pin has an internal 6.5 V shunt regulator and, therefore, a low impedance supply greater
than 6 V may exceed the maximum allowed input current. When operating from a higher supply than 6 V, always use a dropper resistor.
SEL
SEL(MAX)
6.2 6.6 6.9 V ICC = 5 mA
200 300 mV ICC = 2 mA to 10 mA
2.3 V
V
SHUNT
1 V DIS = 0 V
1.9 2 2.1 V DIS = 0 V, VCC rising
5 25 50 mV DIS = 0 V
62 100 A VCC = 2.3 V to 6 V
0.985 1 1.015 V I
= ±1 mA
VREF
492.5 500 507.5 mV
50 125 500 s VHx = V
UOT
±15 nA
6 8.5 12.5 ms C
TIMER
= 1 nF
1.2 V
0.8 V
> 0.5 V
±1 A
V
LATCH
1.2 V
0.8 V
1 2 3 A V
−1.3 −2.1 −2.8 A V
1.3 2.1 2.8 A V
> 0.5 V
DIS
TIMER
TIMER
= 0 V
= 1.6 V
−180 −270 mV Referenced to VCC
= 2.3 V; I
1 V
0.1 0.3 V
0.7 0.9 1.1 V I
V
CC
= 2.3 V; I
V
CC
= 1 V; IUV = 100 A
V
CC
= ±10 A
SEL
±25 A
±30 A SEL tied to VCC or GND
LATCH
− 5 mV or VLx = V
= −1 A
/
OV
UV
= 2.5 mA
/
OV
UV
= VCC,
+ 5 mV
UOT
Rev. B | Page 3 of 16
ADM2914
http://www.BDTIC.com/ADI
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
VCC −0.3 V to +6 V
UV, OV
TIMER −0.3 V to (VCC + 0.3 V)
VLx, VHx, LATCH, DIS, SEL
ICC 10 mA
Reference Load Current (I
IUV, IOV 10 mA
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Lead Temperature (Soldering, 10 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Voltage High Input 1 and Voltage High Input 2. If the voltage monitored by VH1 or VH2 drops
below 0.5 V, an undervoltage condition is detected. Connect to V
Voltage Low Input 1 and Voltage Low Input 2. If the voltage monitored by VL1 or VL2 rises above
0.5 V, an overvoltage condition is detected. Tie to GND when not in use.
Voltage High Input 3 and Voltage High Input 4. The polarity of these inputs is determined by the
state of the SEL pin (see Table 5). When the monitored input is configured as a positive voltage
and the voltage monitored by VH3 or VH4 drops below 0.5 V, an undervoltage condition is
detected. Conversely, when the input is configured as a negative voltage and the input drops
below 0.5 V, an overvoltage condition is detected. Connect to V
6 VL3 VL3
8 VL4 VL4
Voltage Low Input 3 and Voltage Low Input 4. The polarity of these inputs is determined by the
state of the SEL pin (see Table 5). When the monitored input is configured as a positive voltage
and the voltage monitored by VL3 or VL4 rises above 0.5 V, an overvoltage condition is detected.
Conversely, when the input is configured as a negative voltage and the input rises above 0.5 V, an
undervoltage condition is detected. Tie to GND when not in use.
9 GND GND Device Ground.
10 REF REF
Buffered Reference Output. This pin is a 1 V reference that is used as an offset when monitoring
negative voltages. This pin can source or sink 1 mA, and drive loads up to 1 nF. Larger capacitive
loads may lead to instability. Leave unconnected when not in use.
11
OV
OVOvervoltage Reset Output. OV is asserted low if a negative polarity input voltage drops below its
associated threshold or if a positive polarity input voltage exceeds its threshold. The ADM2914-1
allows OV to be latched low. The ADM2914-2 holds OV low for an adjustable timeout period
determined by the TIMER capacitor. This pin has a weak pull-up to VCC and can be pulled up to
16 V externally. Leave this pin unconnected when not in use.
12
UV
UVUndervoltage Reset Output. UV is asserted low if a negative polarity input voltage exceeds its
associated threshold or if a positive polarity input voltage drops below its threshold. UV
low for an adjustable timeout period set by the external capacitor tied to the TIMER pin. The UV
pin has a weak pull-up to V
resistor. Leave this pin unconnected when not in use.
13
LATCH
DIS
OV Latch Bypass Input/Clear Pin. When pulled high, the OV latch is cleared. When held high, the
output has the same delay and output characteristics as the UV output. When pulled low, the
OV
OV
output is latched when asserted. (Applies only to the ADM2914-1.)
OV and UV Disable Input. When pulled high, the OV and UV outputs are held high irrespective of
the state of the VHx and VLx input pins. However, if a UVLO condition occurs, the OV
outputs are asserted. This pin has a weak internal pull-down (2 µA) to GND. Leave this pin
unconnected when not in use. (Applies only to the ADM2914-2.)
14 SEL SEL
Input Polarity Select. This three-state input pin allows the polarity of VH3, VL3, VH4, and VL4 to be
configured. Connect to V
configurations (see Table 5).
15 TIMER TIMER
Adjustable Reset Delay Timer. Connect an external capacitor to the TIMER pin to program the
reset timeout delay. Refer to Figure 15 in the Typical Performance Characteristics section.
16 V
V
CC
CC
Connect this pin to V
Supply Voltage. V
CC
operates as a direct supply for voltages up to 6 V. For voltages greater than
CC
6 V, it operates as a shunt regulator. A dropper resistor must be used in this configuration to limit
the current to less than 10 mA. When used without the resistor, the voltage at this pin must not
exceed 6 V. A 0.1 F bypass capacitor or greater should be used.
Rev. B | Page 5 of 16
VH1
1
VL1
2
VH2
3
ADM2914-2
4
VL2
VH3
VL3
VH4
VL4
and can be pulled up to 16 V externally via an external pull-up
CC
or GND, or leave open to select one of three possible input polarity
CC
5
6
7
8
TOP VIEW
(Not to Scale)
CC
to bypass the timer.
V
16
CC
15
TIMER
SEL
14
DIS
13
UV
12
OV
11
REF
10
9
GND
08170-011
when not in use.
CC
when not in use.
is held
and UV
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