Half-duplex, isolated RS-485 transceiver
PROFIBUS® compliant
ANSI EIA/TIA 485-A and ISO 8482: 1987(E) compliant
20 Mbps data rate
5 V or 3 V operation (V
High common-mode transient immunity: >25 kV/μs
Isolated DE status output
Receiver open-circuit, fail-safe design
Thermal shutdown protection
50 nodes on bus
Safety and regulatory approvals
UL recognition—2500 V
CSA Component Acceptance Notice #5A
VDE Certificate of Conformity
DIN EN 60747-5-2 (VDE 0884 Part 2): 2003-01
DIN EN 60950 (VDE 0805): 2001-12; EN 60950: 2000
= 560 V peak
V
IORM
Operating temperature range: −40°C to +85°C
Wide body, 16-lead SOIC package
APPLICATIONS
Isolated RS-485/RS-422 interfaces
PROFIBUS networks
Industrial field networks
Multipoint data transmission systems
GENERAL DESCRIPTION
)
DD1
for 1 minute per UL 1577
RMS
Isolated RS-485 Transceiver
ADM2486
FUNCTIONAL BLOCK DIAGRAM
V
DD1
RTS
TxD
LOGIC SIDE
PV
RxD
RE
GND
GALVANIC ISOLATION
1
Figure 1.
The ADM2486 driver has an active-high enable feature. The
driver differential outputs and the receiver differential inputs
are connected internally to form a differential input/output port
that imposes minimal loading on the bus when the driver is
disabled or when VDD1 or VDD2 = 0 V. Also provided is an
active-high receiver disable feature that causes the receive
output to enter a high impedance state.
The device has current-limiting and thermal shutdown features
o protect against output short circuits and situations where bus
t
contention may cause excessive power dissipation. The part is
fully specified over the industrial temperature range and is
available in a 16-lead, wide body SOIC package.
V
DD2
ADM2486
GND
2
DE
A
B
BUS SIDE
04604-001
The ADM2486 differential bus transceiver is an integrated,
galvanically isolated component designed for bidirectional
data communication on multipoint bus transmission lines. It
is designed for balanced transmission lines and complies with
ANSI EIA/TIA-485-A and ISO 8482: 1987(E).
The device employs Analog Devices iC
oupler® technology to
combine a 3-channel isolator, a three-state differential line
driver, and a differential input receiver into a single package.
The logic side of the device is powered with either a 5 V or a
3 V supply, and the bus side uses an isolated 5 V supply.
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Changes to Ordering Guide.......................................................... 18
Rev. D | Page 2 of 20
ADM2486
www.BDTIC.com/ADI
SPECIFICATIONS
2.7 V ≤ V
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Differential Outputs
Driver Enable Output, DE Pin
Logic Inputs
RECEIVER
Differential Inputs
RxD Logic Output
POWER SUPPLY CURRENT
≤ 5.5 V, 4.75 V ≤ V
DD1
Differential Output Voltage, V
≤ 5.25 V, TA = T
DD2
OD
MIN
to T
, unless otherwise noted.
MAX
5 V R = ∞, see Figure 3
2.1 5 V R = 50 Ω (RS-422), see Figure 3
2.1 5 V R = 27 Ω (RS-485), see Figure 3
2.1 5 V
= −7 V to +12 V, V
V
TST
DD1
≥ 4.7,
see Figure 4
Δ |VOD| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, see Figure 3
Common-Mode Output Voltage, V
OC
3 V R = 27 Ω or 50 Ω, see Figure 3
Δ |VOC| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, see Figure 3
Output Short-Circuit Current, V
Output Short-Circuit Current, V
Output High Voltage V
V
V
Output Low Voltage 0.1 V I
0.1 0.3 V I
0.2 0.4 V I
Input High Voltage 0.7 V
Input Low Voltage 0.25 V
CMOS Logic Input Current (TxD, RTS, RE, PV)
Differential Input Threshold Voltage, V
= High 60 200 mA −7 V ≤ V
OUT
= Low 60 200 mA −7 V ≤ V
OUT
− 0.1 V I
DD2
− 0.3 V
DD2
− 0.4 V
DD2
DD1
− 0.1 V I
DD2
− 0.2 V I
DD2
V
V
DD1
−10 +0.01 +10 μA
ODE
ODE
ODE
ODE
ODE
ODE
TxD, RTS, RE
TxD, RTS, RE
TxD, RTS, RE, PV = V
TH
−200 +200 mV −7 V ≤ VCM ≤ +12 V
≤ +12 V
OUT
≤ +12 V
OUT
= 20 μA
= 1.6 mA
= 4 mA
= −20 μA
= −1.6 mA
= −4 mA
, PV
, PV
DD1
or 0 V
Input Hysteresis 70 mV −7 V ≤ VCM ≤ +12 V
Input Resistance (A, B) 20 30 kΩ −7 V ≤ VCM ≤ +12 V
Input Current (A, B)
Output High Voltage V
V
Output Low Voltage 0.1 V I
0.2 0.4 V I
Output Short-Circuit Current 7 85 mA V
Three-State Output Leakage Current ±1 μA 0.4 V ≤ V
Logic Side 1.3 mA RTS = 0 V, V
1.0 mA 2 Mbps, V
4.0 mA 20 Mbps, V
0.8 mA RTS = 0 V, V
1.1 mA 2 Mbps, V
2.1 mA 20 Mbps, V
0.6 mA VIN = + 12 V
−0.35 mA VIN = −7 V
− 0.1 V I
DD1
− 0.4 V
DD1
− 0.2 V I
DD1
= 20 μA, VA − VB = 0.2 V
OUT
= 4 mA, VA − VB = 0.2 V
OUT
= −20 μA, VA − VB = −0.2 V
OUT
= −4 mA, VA − VB = −0.2 V
OUT
= GND or V
OUT
CC
≤ 2.4 V
OUT
= 5.5 V
DD1
= 5.5 V, see Figure 5
DD1
= 5.5 V, see Figure 5
DD1
= 3 V
DD1
= 3 V, see Figure 5
DD1
= 3 V, see Figure 5
DD1
Bus Side 3.0 mA RTS = 0 V
43.0 mA 2 Mbps, RTS = V
58.0 mA 20 Mbps, RTS = V
, see Figure 5
DD1
, see Figure 5
DD1
Rev. D | Page 3 of 20
ADM2486
www.BDTIC.com/ADI
Parameter Min Typ Max Unit Test Conditions/Comments
COMMON-MODE TRANSIENT IMMUNITY
HIGH FREQUENCY, COMMON-MODE NOISE IMMUNITY 100 mV
1
Common-mode transient immunity is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation.
VCM is the common-mode potential difference between the logic and bus sides. The transient magnitude is the range over which the common-mode is slewed. The
common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.
1
25 kV/μs
= 1 kV,
V
CM
transient magnitude = 800 V
= +5 V, −2 V < V
V
HF
1 MHz < f
< +7 V,
TEST2
< 50 MHz, see Figure 6
TEST
Rev. D | Page 4 of 20
ADM2486
www.BDTIC.com/ADI
TIMING SPECIFICATIONS
2.7 V ≤ V
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Maximum Data Rate 20 Mbps
Propagation Delay, t
RTS-to-DE Propagation Delay 20 35 55 ns See Figure 8
Pulse Width Distortion, t
Switching Skew, t
Rise/Fall Time, tR, tF 5 15 ns R
Enable Time 43 53 ns See Figure 9 and Figure 14
Disable Time 43 55 ns See Figure 9 and Figure 14
Enable Skew, |t
Disable Skew, |t
RECEIVER
Propagation Delay, t
Differential Skew, t
Enable Time 3 13 ns RL = 1 kΩ, CL = 15 pF, see Figure 11 and Figure 15
Disable Time 3 13 ns RL = 1 kΩ, CL = 15 pF, see Figure 11 and Figure 15
POWER_VALID INPUT
Enable Time 1 2 μs
Disable Time 3 5 μs
≤ 5.5 V, 4.75 V ≤ V
DD1
PLH
SKEW
− t
AZH
BZL
− t
AHZ
BLZ
PLH
SKEW
, t
, t
|, |t
|, |t
PHL
PWD
PHL
≤ 5.25 V, TA = T
DD2
− t
AZL
BZH
− t
ALZ
BHZ
to T
MIN
25 45 55 ns R
5 ns R
2 5 ns R
, unless otherwise noted.
MAX
LDIFF
LDIFF
LDIFF
LDIFF
= 54 Ω, CL1 = CL2 = 100 pF, see Figure 7
= 54 Ω, CL1 = CL2 = 100 pF, see Figure 7 and Figure 12
= 54 Ω, CL1 = CL2 = 100 pF, see Figure 7 and Figure 12
= 54 Ω, CL1 = CL2 = 100 pF, see Figure 7 and Figure 12
| 1 3 ns See Figure 9 and Figure 14
| 2 5 ns See Figure 9 and Figure 14
25 45 55 ns CL = 15 pF, see Figure 10 and Figure 13
5 ns CL = 15 pF, see Figure 10 and Figure 13
Rev. D | Page 5 of 20
ADM2486
www.BDTIC.com/ADI
ADM2486 CHARACTERISTICS
PACKAGE CHARACTERISTICS
Table 3.
Parameter Symbol Min Typ Max Unit Test Conditions
Resistance (Input-to-Output)
Capacitance (Input-to-Output)
Input Capacitance
Input IC Junction-to-Case Thermal Resistance θ
Output IC Junction-to-Case Thermal Resistance θ
1
Device considered a 2-terminal device: Pin 1 through Pin 8 shorted together, and Pin 9 through Pin 16 shorted together.
2
Input capacitance is from any input data pin to ground
2
REGULATORY INFORMATION
The ADM2486 has been approved by the following organizations:
Table 4.
Organization Approval Type Notes
UL Recognized under 1577 component recognition program. File E214100.
CSA Approved under CSA Component Acceptance Notice #5A. File 205078.
VDE Certified according to DIN EN 60747-5-2 (VDE 0884 Part 2): 2003-01.
Complies with DIN EN 60747-5-2 (VDE 0884 Part 2): 2003-01,
DIN EN 60950 (VDE 0805): 2001-12; EN 60950: 2000
File 2471900-4880-0001.
1
1
R
I-O
C
I-O
C
I
JCI
JCO
10
3 pF f = 1 MHz
4 pF
33 °C/W
28 °C/W
12
Ω
In accordance with UL1577, each ADM2486
is proof tested b
test voltage ≥3000 V rms for 1 sec (current
leakage detection limit = 5 μA).
In accordance with VDE 0884, each ADM2486
is proof tested b
test voltage ≥1050 V
(partial discharge detection limit = 5 pC).
Thermocouple located at center
of pack
age underside
y applying an insulation
y applying an insulation
for 1 sec
PEAK
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 5.
Parameter Symbol Value Unit Conditions
Rated Dielectric Insulation Voltage 2500 V rms 1-minute duration.
Minimum External Air Gap (Clearance) L(I01) 7.45 minimum mm
Minimum External Tracking (Creepage) L(I02) 8.1 minimum mm
Minimum Internal Gap (Internal Clearance) 0.017 minimum mm Insulation distance through insulation.
Tracking Resistance (Comparative Tracking Index) CTI >175 V DIN IEC 112/VDE 0303 Part 1.
Isolation Group IIIa Material Group (DIN VDE 0110, 1/89, Table 1).
Measured from input terminals to output
minals, shortest distance through air.
ter
Measured from input terminals to output
minals, shortest distance along body.
ter
Rev. D | Page 6 of 20
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