ANALOG DEVICES ADM2485 Service Manual

High Speed, Isolated RS-485 Transceiver

V

www.BDTIC.com/ADI

FEATURES

Half-duplex, isolated RS-485 transceiver Integrated oscillator driver for external transformer PROFIBUS® compliant Complies with ANSI/TIA/EIA RS-485-A-98 and

ISO 8482:198 Data rate: 16 Mbps 5 V or 3.3 V operation (V 50 nodes on bus High common-mode transient immunity: >25 kV/μs Isolated DE OUT status output Thermal shutdown protection Safety and regulatory approvals

UL recognition: 2500 V rms for 1 minute per UL 1577

VDE Certificate of Conformity

DIN V VDE V 0884-10 (VDE V 0884-10):2006-12

Reinforced insulation, V Operating temperature range: –40°C to +85°C Wide-body, 16-lead SOIC package

7(E)

DD1

)

= 560 V peak

IORM

with Integrated Transformer Driver

ADM2485

FUNCTIONAL BLOCK DIAGRAM

D1 D2

RTS

TxD

RxD

RE

V

DD1

OSC

GALVANIC IS OLATIO N

GND

1

Figure 1.

DD2

ADM2485

GND

2

DE OUT

A

B

06021-001

APPLICATIONS

Isolated RS-485/RS-422 interfaces PROFIBUS networks Industrial field networks Multipoint data transmission systems

GENERAL DESCRIPTION

The ADM2485 differential bus transceiver is an integrated, galvanically isolated component designed for bidirectional data communication on multipoint bus transmission lines. It is designed for balanced transmission lines and complies with ANSI/TIA/EIA RS-485-A-98 and ISO 8482:1987(E).

The device employs Analog Devices, Inc., iC to combine a 3-channel isolator, a three-state differential line driver, and a differential input receiver into a single package. An on-chip oscillator outputs a pair of square waveforms that drive an external transformer to provide isolated power with an external transformer. The logic side of the device can be powered with either a 5 V or a 3.3 V supply, and the bus side is powered with an isolated 5 V supply.

oupler® technology

The ADM2485 driver has an active high enable. The driver dif

ferential outputs and the receiver differential inputs are connected internally to form a differential input/output port that imposes minimal loading on the bus when the driver is disabled or when V

DD1

or V

= 0 V. Also provided is an active

DD2

high receiver disable that causes the receive output to enter a high impedance state.

The device has current-limiting and thermal shutdown features

o protect against output short circuits and situations where bus

t contention might cause excessive power dissipation. The part is fully specified over the industrial temperature range and is available in a 16-lead, wide-body SOIC package.

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

ADM2485

www.BDTIC.com/ADI

REVISION HISTORY

12/07—Rev. 0 to Rev. A

Updated Format..................................................................Universal

Changes to Features Section............................................................ 1

Changes to Table 4............................................................................ 6

Changes to VDE 0884-2 Insulation Characteristics Section ...... 7

Changes to PCB Section and Figure 34 ....................................... 16

Updated Outline Dimensions....................................................... 17

1/07—Revision 0: Initial Version

Rev. A | Page 2 of 20

ADM2485

www.BDTIC.com/ADI

SPECIFICATIONS

2.7 V ≤ V

Table 1.

Parameter Min Typ Max Unit Test Conditions/Comments

DRIVER

Differential Outputs

Bus Enable Output

Logic Inputs

RECEIVER

Differential Inputs

RxD Logic Output

TRANSFORMER DRIVER

Oscillator Frequency 400 500 600 kHz V 230 330 430 kHz V Switch-On Resistance 0.5 1.5 Ω Start-Up Voltage 2.2 2.5 V

≤ 5.5 V, 4.75 V ≤ V

DD1

Differential Output Voltage, V

≤ 5.25 V, TA = T

DD2

OD

MIN

to T

, unless otherwise noted.

MAX

5 V R = ∞, see Figure 21

2.1 5 V R = 50 Ω (RS-422), see Figure 21

2.1 5 V R = 27 Ω (RS-485), see Figure 21

2.1 5 V V

= –7 V to +12 V, V

TST

≥ 4.75 V, see Figure 22

DD1

Δ|VOD| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, see Figure 21 Common-Mode Output Voltage, V

OC

3 V R = 27 Ω or 50 Ω, see Figure 21 Δ|VOC| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, see Figure 21 Output Short-Circuit Current, V Output Short-Circuit Current, V

Output High Voltage V V V Output Low Voltage 0.1 V I

0.1 0.3 V I

0.2 0.4 V I

Input High Voltage 0.7 V Input Low Voltage 0.25 V CMOS Logic Input Current (TxD, RTS, RE)

Differential Input Threshold Voltage, V

= High 60 200 mA −7 V ≤ V

OUT

= Low 60 200 mA −7 V ≤ V

OUT

− 0.1 V I

DD2

− 0.3 V

DD2

− 0.4 V

DD2

DD1

− 0.1 V I

DD2

− 0.2 V I

DD2

V

DD1

−10 +0.01 +10 μA

TH

−200 +200 mV −7 V ≤ VCM ≤ +12V

ODE

TxD, RTS, RE TxD, RTS, RE TxD, RTS, RE = V

≤ +12 V

OUT

≤ +12 V

OUT

= 20 μA = 1.6 mA = 4 mA = −20 μA = −1.6 mA = −4 mA

DD1

or 0 V

Input Hysteresis 70 mV −7 V ≤ VCM ≤ +12V Input Resistance (A, B) 20 30 kΩ −7 V ≤ VCM ≤ +12V Input Current (A, B) 0.6 mA VIN = +12 V

−0.35 mA VIN = −7 V

Output High Voltage V V Output Low Voltage 0.1 V I

0.2 0.4 V I Output Short-Circuit Current 7 85 mA V Tristate Output Leakage Current ±1 μA 0.4 V ≤ V

− 0.1 V I

DD1

− 0.4 V

DD1

− 0.2 V I

DD1

= +20 μA, VA − VB = +0.2 V

OUT

= +1.5 mA, VA − VB = +0.2 V

OUT

= −20 μA, VA − VB = −0.2 V

OUT

= −4 mA, VA − VB = −0.2 V

OUT

= GND or V

OUT

DD1

= 5.5 V = 3.3 V

≤ 2.4 V

OUT

CC

Rev. A | Page 3 of 20

ADM2485

www.BDTIC.com/ADI

Parameter Min Typ Max Unit Test Conditions/Comments

POWER SUPPLY CURRENT

Logic Side 2.5 mA RTS = 0 V, V

2.3 mA 2.5 Mbps, V

5.0 6.5 mA 16 Mbps, V

1.26 mA RTS = 0 V, V

1.5 mA 2.5 Mbps, V

2.9 mA 16 Mbps, V Bus Side 1.7 2.5 mA RTS = 0 V

49.0 mA

2.5 Mbps, RTS = V load conditions

55.0 75.0 mA

16 Mbps, RTS = V

load conditions COMMON-MODE TRANSIENT IMMUNITY HIGH FREQUENCY COMMON-MODE

NOISE IMMUNITY

1

CM is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. VCM is the common-mode potential

difference between the logic and bus sides. The transient magnitude is the range over which the common mode is slewed. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.

1

25 kV/μs Transient magnitude = 800 V, VCM = 1 kV 100 mV

VHF = +5 V, −2 V < V

1 MHz < f

= 5.5 V

DD1

= 5.5 V, see Figure 23

DD1

= 5.5 V, see Figure 23

DD1

= 3.3 V

DD1

= 3.3 V, see Figure 23

DD1

= 3.3 V, see Figure 23

DD1

, see Figure 23 for

DD1

, see Figure 23 for

DD1

< +7 V,

TEST2

< 50 MHz, see Figure 24

TEST

Rev. A | Page 4 of 20

ADM2485

+

–

A

V

www.BDTIC.com/ADI

TIMING SPECIFICATIONS

2.7 V ≤ V

Table 2.

Parameter Min Typ Max Unit Test Conditions/Comments

DRIVER

Maximum Data Rate 16 Mbps Propagation Delay Input-to-Output

RTS-to-DE OUT Propagation Delay 20 35 55 ns See Figure 26 Driver Output-to-Output, t Rise/Fall Time, tR, tF 5 15 ns R

Enable Time 43 53 ns See Figure 4 and Figure 27 Disable Time 43 55 ns See Figure 4 and Figure 27 Enable Skew, |t Disable Skew, |t

RECEIVER

Propagation Delay, t Differential Skew, t Enable Time 3 13 ns RL = 1 kΩ, CL = 15 pF, see Figure 5 and Figure 29 Disable Time 3 13 ns RL = 1 kΩ, CL = 15 pF, see Figure 5 and Figure 29

Timing Diagrams

3V

0V

B

A

V

OUT

0V

V

OUT

– B

≤ 5.5 V, 4.75 V ≤ V

DD1

t

, t

PLH

PHL

1/2V

OUT

V

OUT

90% POINT

10% POINT

t

AZH

AHZ

1.5V

PLH

− t

|, |t

BZL

− t

|, |t

BLZ

, t

PLH

PHL

SKEW

t

R

t

SKEW

AZL

ALZ

− t

= |t

DD2

BZH

PLH

≤ 5.25 V, TA = T

| 1 3 ns See Figure 4 and Figure 27

| 2 5 ns See Figure 4 and Figure 27

BHZ

– t

|

PHL

Figure 2. Driver Propagation Delay, Rise/Fall Timing

0V 0V

to T

MIN

25 45 55 ns R

2 5 ns R

, unless otherwise noted.

MAX

LDIFF

= 54 Ω, CL1 = CL2 = 100 pF, see Figure 25

= 54 Ω, CL1 = CL2 = 100 pF, see Figure 2 and Figure 25

25 45 55 ns CL = 15 pF, see Figure 3 and Figure 28 5 ns CL = 15 pF, see Figure 3 and Figure 28

1.5V

t

PHL

90% POINT

t

F

10% POINT

06021-012

RTS

– B

RE

0.5V

DD1

t

ZL

2.3V

t

ZH

2.3V

Figure 4. Driver Enable/Disable Timing

0.5V

DD1

t

ZL

t

LZ

t

HZ

t

0.5V

LZ

DD1

VOH + 0.5V

VOH – 0.5V

DD1

0.7V

0.3V

0.7

0.3V

DD1

V

OL

V

OH

0V

06021-014

RxD

t

PLH

1.5V 1.5V

t

SKEW

= |t

PLH

– t

PHL

t

PHL

V

OH

|

V

OL

06021-013

Figure 3. Receiver Propagation Delay

Rev. A | Page 5 of 20

RxD

1.5V OUTPUT LOW

t

ZH

0V

OUTPUT HIGH

1.5V

t

HZ

V

+ 0.5V

OH

VOH – 0.5V

V

OL

V

OH

06021-015

Figure 5. Receiver Enable/Disable Timing

ADM2485

www.BDTIC.com/ADI

PACKAGE CHARACTERISTICS

Table 3.

Parameter Symbol Min Typ Max Unit Test Conditions

Resistance (Input-to-Output) Capacitance (Input-to-Output) Input Capacitance

2

Input IC Junction-to-Case Thermal Resistance θ

Output IC Junction-to-Case Thermal Resistance θ

1

Device considered a 2-terminal device: Pin 1 to Pin 8 are shorted together and Pin 9 to Pin 16 are shorted together.

2

Input capacitance is from any input data pin to ground.

REGULATORY INFORMATION

Table 4. ADM2485 Approvals

Organization Approval Type Notes

UL

VDE

Recognized under the Component Recognition

rogram of Underwriters Laboratories, Inc.

P

Certified according to DIN V VDE V 0884-10

VDE V 0884-10): 2006-12

(

1

R

I-O

C

I-O

C

I

JCI

JCO

1012 Ω 3 pF f = 1 MHz 4 pF 33 °C/W

28 °C/W

Thermocouple located at center of

age underside

pack Thermocouple located at center of

age underside

pack

In accordance with UL 1577, each ADM2485 is proof tested by applying an insulation test voltage ≥3000 V rms for 1 second (current leakage detection limit = 5 μA).

In accordance with DIN V VDE V 0884-10, each ADM2485 is proof tested by applying an insulation test voltage ≥1050 V peak for 1 second (partial discharge detection limit = 5 pC).

INSULATION AND SAFETY-RELATED SPECIFICATIONS

Table 5.

Parameter Symbol Value Unit Conditions

Rated Dielectric Insulation Voltage 2500 V rms 1-minute duration Minimum External Air Gap (External Clearance) L(I01) 5.15 min mm

Measured from input terminals t shortest distance through air

Minimum External Tracking (Creepage) L(I02) 5.5 min mm

Measured from input terminals t

shortest distance along body Minimum Internal Gap (Internal Clearance) 0.017 min mm Insulation distance through insulation Tracking Resistance (Comparative Tracking Index) CTI >175 V DIN IEC 112/VDE 0303-1 Isolation Group IIIa Material Group (DIN VDE 0110: 1989-01, Table 1)

o output terminals,

Rev. A | Page 6 of 20

ANALOG DEVICES ADM2485 Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

FUNCTIONAL BLOCK DIAGRAM

APPLICATIONS

GENERAL DESCRIPTION

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

TIMING SPECIFICATIONS

Timing Diagrams

PACKAGE CHARACTERISTICS

REGULATORY INFORMATION

INSULATION AND SAFETY-RELATED SPECIFICATIONS