FEATURES
200 kB/s Transmission Rate
Small (0.1 F) Charge Pump Capacitors
Single 5 V Power Supply
Meets All EIA-232-E and V.28 Specifications
Two Drivers and Two Receivers
On-Board DC-DC Converters
9 V Output Swing with 5 V Supply
30 V Receiver Input Levels
The ADM222, ADM232A, ADM242 are a family of high-speed
RS-232 line drivers/receivers offering transmission rates up to
200 kB/s. Operating from a single 5 V power supply, a highly
efficient on-chip charge pump using small (0.1 µF) external
capacitors allows RS-232 bipolar levels to be developed. Two
RS-232 drivers and two RS-232 receivers are provided on
each device.
The devices are fabricated on BiCMOS, an advanced mixed
technology process that combines low power CMOS with highspeed bipolar circuitry. This allows for transmission rates up to
200 kB/s, yet minimizes the quiescent power supply current to
under 5 mA.
The ADM232A is a pin-compatible, high-speed upgrade for the
AD232 and for the ADM232L. It is available in 16-lead DIP
and in both narrow and wide surface-mount (SOIC) packages.
The ADM222 contains an additional shutdown (SHDN) function that may be used to disable the device, thereby reducing the
supply current to 0.1 µA. During shutdown, all transmit/receive
CMOS RS-232 Drivers/Receivers
ADM222/ADM232A/ADM242
FUNCTIONAL BLOCK DIAGRAM
5V INPUT
0.1F
V
CC
+5V TO +10V
+5V TO –10V
T1
T2
R1
R2
GND
*
ON EACH TTL/CMOS INPUT
**
ON EACH RS-232 INPUT
V+
V–
EN
SHDN
INTERNAL 400k PULL-UP RESISTOR
INTERNAL 5k PULL-DOWN RESISTOR
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
*
0.1F
0.1F
T1
T2
R1
R2
OUT
OUT
C1+
VOLTAGE DOUBLER
C1–
C2+
VOLTAGE INVERTER
C2–
IN
IN
ADM2xx
functions are disabled. The ADM222 is available in 18-lead
DIP and in a wide surface-mount (SOIC) package.
The ADM242 combines both shutdown (SHDN) and enable
(EN) functions. The shutdown function reduces the supply
c
urrent to 0.1 mA. During shutdown, the transmitters are disabled but the receivers continue to operate normally. The
enable function allows the receiver outputs to be disabled
thereby facilitating sharing a common bus. The ADM242 is
available in 18-lead DIP and in a wide surface-mount (SOIC)
package.
0.1F
0.1F
T1
OUT
RS-232
OUTPUTS
T2
OUT
R1
IN
RS-232
INPUTS
R2
IN
(ADM242)
(ADM222, ADM242)
**
REV.
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
Output Voltage Swing± 5± 9VAll Transmitter Outputs Loaded with
3 kΩ to Ground
Input Logic Threshold Low, V
Input Logic Threshold High, V
INL
INH
2.41.7VT
Logic Pull-Up Current1240µAT
1.70.8VT
IN
IN
= 0 V
IN
Data Rate200kB/s
Output Resistance300ΩV
= V+ = V– = 0 V, V
CC
OUT
= ± 2 V
Output Short Circuit Current (Instantaneous)± 10mA
RS-232 RECEIVERS
RS-232 Input Voltage Range–30+30V
RS-232 Input Threshold Low0.81.2V
RS-232 Input Threshold High1.62.4V
RS-232 Input Hysteresis0.20.41.0VV
RS-232 Input Resistance357kΩT
TTL/CMOS Output Voltage Low, V
TTL/CMOS Output Voltage High, V
OL
OH
3.5VI
0.050.4VI
TTL/CMOS Output Short-Circuit Current–2–85mASource Current (V
TTL/CMOS Output Short-Circuit Current1035mASink Current (V
TTL/CMOS Output Leakage Current± 0.05± 10µASHDN = GND/EN = V
EN Input Threshold Low, V
INL
EN Input Threshold High, V
INH
2.01.4V
1.40.8V
= 5 V
CC
= 0°C to 85°C
A
= 3.2 mA
OUT
= –1.0 mA
OUT
0 V ≤ V
OUT
≤ V
OUT
CC
= GND)*
OUT
= VCC)*
CC
POWER SUPPLY
Power Supply Current48mANo Load
13mA3 kΩ Load on Both Outputs
Shutdown Power Supply Current0.110µA
SHDN Input Leakage Current± 1µA
SHDN Input Threshold Low, V
INL
SHDN Input Threshold High, V
INH
2.01.4V
1.40.8V
AC CHARACTERISTICS
Transition Region Slew Rate38 30V/µsCL = 50 pF to 1000 pF, RL = 3 kΩ to 7 kΩ
Measured from +3 V to –3 V or –3 V to +3 V
Transmitter Propagation Delay TTL to RS-2320.853.5µst
*This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods of time may affect reliability.
Test Circuits
V
IN
t
PLHT
V
OUT
Figure 1. Transmitter Propagation Delay Timing
3V
EN
INPUT
RECEIVER
OUTPUT
Figure 2. Receiver Enable Timing
t
PHLT
0V
t
ER
3.5V
0.8V
3V
V+
0V
V–
V
IN
t
PHLR
V
OUT
3V
0V
t
PLHR
V
CC
50%
GND
Figure 3. Receiver Propagation Delay Timing
3V
EN
INPUT
0V
t
DR
V
OH
V
– 0.5V
OH
RECEIVER
OUTPUT
VOL + 0.5V
V
OL
Figure 4. Receiver Disable Timing
REV.
–3–
ADM222/ADM232A/ADM242
B
V
IN
SHDN
3k
50pF
Figure 5. Shutdown Test Circuit
3V
SHDN
INPUT
0V
t
DT
V+
+ 5V
TRANSMITTER
OUTPUT
– 5V
V–
Figure 6. Transmitter Shutdown Disable Timing
5V INPUT
C5
0.1F
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
*
0.1F
0.1F
T1
T2
R1
R2
C1
C2
OUT
OUT
6.3V
2
C1+
VOLTAGE DOUBLER
4
C1–
5
C2+
VOLTAGE INVERTER
6
C2–
12
IN
11
IN
13
10
ADM222
17
V
CC
+5V TO +10V
+5V TO –10V
T1
T2
R1
R2
GND
16
*
INTERNAL 400k PULL-UP RESISTOR
ON EACH TTL/CMOS INPUT
**
INTERNAL 5k PULL-DOWN RESISTOR
ON EACH RS-232 INPUT
3
V+
7
V–
15
T1
8
T2
14
R1
9
R2
18
SHDN
Figure 7. ADM222 Typical Operating Circuit
V
OUT
C3
0.1F
C4
0.1F
OUT
OUT
IN
IN
RS-232
OUTPUTS
RS-232
INPUTS
**
PIN FUNCTION DESCRIPTION
MnemonicFunction
V
CC
Power Supply Input, 5 V ± 10%.
V+Internally generated positive supply (+10 V
nominal).
V–Internally generated negative supply (–10 V
nominal).
GNDGround Pin. Must be connected to 0 V.
C1+External capacitor 1, (+ terminal) is connected
to this pin.
C1–External capacitor 1, (– terminal) is connected
to this pin.
C2+External capacitor 2, (+ terminal) is connected
to this pin.
C2–External capacitor 2, (– terminal) is connected
to this pin.
T
IN
Transmitter (Driver) Inputs. These inputs accept
TTL/CMOS levels. An internal 400 kΩ pull-up
T
OUT
resistor to V
Transmitter (Driver) Outputs. These are RS-232
is connected on each input.
CC
levels (typically ±9 V).
R
IN
Receiver Inputs. These inputs accept RS-232
signal levels. An internal 5 kΩ pull-down resistor
to GND is connected on each of these inputs.
R
OUT
Receiver Outputs. These are TTL/CMOS levels.
NCNo Connect. No connections are required to
this pin.
EN(ADM242 Only) Active Low Digital Input. May
be used to enable or disable (three-state) both
receiver outputs.
SHDN(ADM222 and ADM242) Active Low Digital
Input. May be used to disable the device so that
the power consumption is minimized. On the
ADM222 all drivers and receivers are disabled.
On the ADM242 the drivers are disabled but the
receivers remain enabled.
1
NC
2
C1+
V+
3
C1–
4
C2+
5
C2–
6
V–
7
T2
8
OUT
R2
9
IN
NC = NO CONNECT
ADM222
TOP VIEW
(Not to Scale)
18
SHDN
V
17
CC
GND
16
T1
15
OUT
R1
14
IN
R1
13
OUT
T1
12
IN
T2
11
IN
R2
10
OUT
Figure 8. ADM222 DIP and SOIC Pin Configurations
–4–
REV.
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