0.1 µF to 10 µF capacitors
120 kB/s data rate
Two receivers active in shutdown (ADM213)
On-board dc-to-dc converters
±9 V output swing with 5 V supply
Low power (15 mW)
Low power shutdown ≤ 5 µW
0.1
0.1
T1
µ
16V
µ
16V
12
+5VTO +10V
C1+
+
F
14
15
+
F
16
7
IN
C1–
C2+
C2–
VO LTAGE
DOUBLER
+10VTO –10V
VO LTAGE
INVERTER
T1
V
CC
V+
V–
±30 V receiver input levels
Latch-up free
Plug-in upgrade for MAX205-211/213
APPLICATIONS
Computers
Peripherals
Modems
Printers
Instruments
GENERAL DESCRIPTION
The ADM2xx family of line drivers/receivers is intended for all
EIA-232-E and V.28 communications interfaces, especially in
applications where ±12 V is not available. The ADM206,
ADM211, and ADM213 feature a low power shutdown mode
that reduces power dissipation to less than 5 µW, making them
ideally suited for battery-powered equipment. The ADM213
has an active low shutdown and an active high receiver-enable
control. Two receivers of the ADM213 remain active during
shutdown. This feature is useful for ring indicator monitoring.
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
T2
1
T3
T4
R1
OUT
R2
OUT
R3
OUT
R4
OUT
R5
OUT
NOTES
1
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
2
INTERNAL 5kΩ PULL-DOWN RESIST OR ON EACH RS-232 INPUT.
EN
6
IN
20
IN
21
IN
8
5
26
22
19
24
All members of the ADM2xx family, except the ADM209,
include two internal charge pump voltage converters that allow
operation from a single 5 V supply. These parts convert the 5 V
input power to the ±10 V required for RS-232 output levels.
The ADM209 is designed to operate from 5 V and 12 V supplies.
An internal +12 V to –12 V charge pump voltage converter
generates the –12 V supply.
T2
T3
T4
GND
10
Figure 1.
R1
R2
R3
R4
R5
ADM211
Table 1. Selection Table
Part
Number
Power Supply
Voltage
Number of RS232 Drivers
Number of
RS-232 Receivers
External
Capacitors
Low Power
Shutdown (SD)
ADM206 5 V 4 3 4 Yes Yes 0
ADM207 5 V 5 3 4 No No 0
ADM208 5 V 4 4 4 No No 0
ADM209 5 V and 9 V to
3 5 2 No Yes 0
13.2 V
ADM211 5 V 4 5 4 Yes Yes 0
ADM213 5 V 4 5 4
Yes (
SD
)
TTL Three-
EN
State
Yes (EN) 2
5V INPUT
11
+
13
17
+
2
3
1
28
9
4
27
23
18
25
0.1µF
6.3V
0.1
16V
T1
T2
T3
T4
R1
R2
R3
R4
R5
SD
µ
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
F
+
0.1
RS-232
OUTPUTS
RS-232
INPUTS
µ
F
2
Number of Receivers
Active in Shutdown
00067-0-001
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
VCC = 5 V ± 10% (ADM206, ADM207, ADM208, ADM209, ADM211, ADM213); V+ = 9 V to 13.2 V (ADM209); C1–C4 = 0.1 µF ceramic.
All specifications T
MIN
to T
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
Output Voltage Swing ±5 ±9 V All transmitter outputs loaded with 3 kΩ to ground
VCC Power Supply Current 5 13 mA No load
0.4 1 mA No load, ADM209
V+ Power Supply Current 3.5 5 mA No load, V+ = 12 V, ADM209 only
Shutdown Supply Current 1 10 µA
Input Logic Threshold Low, V
Input Logic Threshold High, V
Logic Pull-Up Current 10 25 µA TIN = 0 V
RS-232 Input Voltage Range1 –30 +30 V
RS-232 Input Threshold Low 0.8 1.25 V
RS-232 Input Threshold High 1.9 2.4 V
RS-232 Input Hysteresis 0.65 V
RS-232 Input Resistance 3 5 7 kΩ TA = 0°C to 85°C
TTL/CMOS Output Voltage Low, VOL 0.4 V I
TTL/CMOS Output Voltage High, VOH 3.5 V I
TTL/CMOS Output Leakage Current 0.05 ±10 µA
Output Enable Time (TEN) 115 ns ADM206, ADM209, ADM211 (Figure 24. CL = 150 pF)
Output Disable Time (T
Propagation Delay 0.5 5 µs RS-232 to TTL
Transition Region Slew Rate 8 V/µs RL = 3 kΩ, CL = 2500 pF; measured from +3 V to –3 V or –3 V to +3 V
Output Resistance 300 Ω VCC = V+ = V– = 0 V, V
RS-232 Output Short Circuit Current ±12 ±60 mA
VCC –0.3 V to +6 V
V+ (VCC – 0.3 V) to +14 V
V– +0.3 V to –14 V
Input Voltages
TIN –0.3 V to (VCC + 0.3 V)
RIN ±30 V
Output Voltages
T
(V+, +0.3 V) to (V–, –0.3 V)
OUT
R
–0.3 V to (VCC + 0.3 V)
OUT
Short-Circuit Duration
T
Continuous
OUT
Power Dissipation
N-24 PDIP (Derate 13.5 mW/°C
above 70°C)
R-24 SOIC (Derate 12 mW/°C
above 70°C)
R-28 SOIC (Derate 12.5 mW/°C
above 70°C)
RS-24 SSOP (Derate 12 mW/°C
above 70°C)
RS-28 SSOP (Derate 10 mW/°C
above 70°C)
Thermal Impedance, θ
N-24 PDIP 120°C/W
R-24 SOIC 85°C/W
R-28 SOIC 80°C/W
RS-24 SSOP 115°C/W
RS-28 SSOP 100°C/W
Operating Temperature Range
Industrial (A Version) –40°C to +85°C
Storage Temperature Range –65°C to +150°C
Lead Temperature, Soldering 300°C
Vapor Phase (60 s) 215°C
Infrared (15 s) 220°
JA
1000 mW
850 mW
900 mW
850 mW
900 mW
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods of
time may affect device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. C | Page 4 of 16
ADM206–ADM211/ADM213
PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
T3
T1
T2
R1
OUT
OUT
OUT
R1
OUT
T2
T1
GND
V
C1+
C1–
IN
IN
IN
CC
V+
1
2
3
4
5
ADM206
6
TOP VIEW
(Not to Scale)
7
8
9
10
11
12
24
T4
OUT
23
R2
IN
22
R2
OUT
21
SD
20
EN
19
T4
IN
18
T3
IN
17
R3
OUT
16
R3
IN
15
V–
14
C2–
13
C2+
00067-0-002
Figure 2. ADM206 PDIP/SOIC/SSOP Pin Configuration
5V INPUT
V
0.1µF
6.3V
12
13
+
0.1µF
16V
14
T1
T2
1
T3
T4
R1
R2
R3
OUT
OUT
OUT
EN
7
IN
6
IN
18
IN
19
IN
5
22
17
20
C1–
C2+
C2–
VOLTAGE
DOUBLER
+10VTO –10V
VOLTAGE
INVERTER
T1
T2
T3
T4
R1
R2
R3
ADM206
GND
8
+5VTO +10V
10
C1+
+
9
CC
V+
V–
0.1µF
+
6.3V
11
15
0.1µF
16V
+
T1
2
T2
3
T3
1
T4
24
R1
4
R2
23
16
R3
SD
21
OUT
OUT
OUT
OUT
IN
IN
IN
+
0.1µF
RS-232
OUTPUTS
RS-232
INPUTS
T3
T1
T2
R1
OUT
OUT
OUT
R1
OUT
T2
T1
GND
V
C1+
C1–
IN
IN
IN
CC
V+
1
2
3
4
5
ADM207
6
TOP VIEW
(Not to Scale)
7
8
9
10
11
12
24
T4
OUT
23
R2
IN
22
R2
OUT
21
T5
IN
20
T5
OUT
19
T4
IN
18
T3
IN
17
R3
OUT
16
R3
IN
15
V–
14
C2–
13
C2+
00067-0-004
Figure 4. ADM207 PDIP/SOIC/SSOP Pin Configuration
5V INPUT
R1
R2
R3
ADM207
V
9
CC
+
11
V+
V–
15
+
2
3
1
24
20
4
23
16
0.1
6.3V
0.1
16V
T1
T2
T3
T4
T5
R1
R2
R3
µF
µF
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
+
0.1
RS-232
OUTPUTS
RS-232
INPUTS
µF
2
10
+5VTO +10V
C1+
+
0.1
µF
6.3V
12
13
+
µF
0.1
16V
14
T1
7
IN
T2
6
IN
TTL/CMOS
INPUTS
2
TTL/CMOS
OUTPUTS
T3
18
IN
1
T4
19
IN
T5
5
IN
R1
R2
R3
OUT
OUT
OUT
22
17
20
C1–
C2+
C2–
VO LTA G E
DOUBLER
+10VTO –10V
VO LTA G E
INVERTER
T1
T2
T3
T4
T5
GND
8
NOTES
1
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
2
INTERNAL 5kΩPULL-DOWN RESISTOR ON EACH RS-232 INPUT.
Figure 3. ADM206 Typical Operating Circuit
00067-0-003
Rev. C | Page 5 of 16
NOTES
1
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
2
INTERNAL 5kΩPULL-DOWN RESISTOR ON EACH RS-232 INPUT.
Figure 5. ADM207 Typical Operating Circuit
00067-0-005
ADM206–ADM211/ADM213
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
24
T3
OUT
23
R3
IN
22
R3
OUT
21
T4
IN
20
T4
OUT
19
T3
IN
18
T2
IN
17
R4
OUT
16
R4
IN
15
V–
14
C2–
13
C2+
00067-0-006
R2
R1
T2
T1
OUT
OUT
R2
OUT
T1
OUT
R1
GND
V
C1+
C1–
IN
IN
IN
CC
V+
1
2
3
4
5
ADM208
6
TOP VIEW
(Not to Scale)
7
8
9
10
11
12
Figure 6. ADM208 PDIP/SOIC/SSOP Pin Configuration
5V INPUT
V
0.1
6.3V
12
13
+
µ
F
0.1
16V
14
T1
T2
1
T3
T4
R1
R2
R3
R4
OUT
OUT
OUT
OUT
5
IN
18
IN
19
IN
21
IN
6
4
22
17
C1–
C2+
C2–
VOLTAGE
DOUBLER
+10VTO –10V
VOLTAGE
INVERTER
T1
T2
T3
T4
R1
R2
R3
R4
ADM208
GND
8
10
+5VTO +10V
C1+
+
µ
F
9
CC
V+
V–
0.1
µ
+
11
6.3V
15
µ
0.1
16V
+
2
T1
OUT
T2
1
OUT
T3
24
OUT
T4
20
OUT
R1
7
IN
3
R2
IN
23
R3
IN
16
R4
IN
F
F
+
0.1
RS-232
OUTPUTS
RS-232
INPUTS
R1
R5
R4
OUT
R1
GND
V
R5
OUT
OUT
R4
IN
CC
V+
C+
C–
V–
IN
IN
1
2
3
4
5
ADM209
6
TOP VIEW
(Not to Scale)
7
8
9
10
11
12
24
T1
IN
23
T2
IN
22
R2
OUT
21
R2
IN
20
T2
OUT
19
T1
OUT
18
R3
IN
17
R3
OUT
16
T3
IN
15
NC
14
EN
13
T3
OUT
00067-0-008
Figure 8. ADM209 PDIP/SOIC/SSOP Pin Configuration
5V INPUT
0.1
µ
F
V
µ
F
0.1
T1
TTL/CMOS
INPUTS
T2
1
T3
R1
R2
TTL/CMOS
OUTPUTS
2
R3
R4
R5
16V
OUT
OUT
OUT
OUT
OUT
EN
6
C1+
7
24
23
16
1
22
17
11
10
14
C1–
+12VTO –12V
VOLTAGE
INVERTER
T1
T2
T3
GND
3
+
µ
F
IN
IN
IN
CC
V+
V–
R1
R2
R3
R4
R5
ADM209
+
4
9V TO 13.2V
5
INPUT
+
8
µ
F
0.1
16V
T1
19
OUT
RS-232
T2
20
OUT
OUTPUTS
T3
13
OUT
R1
2
IN
21
R2
IN
NC
RS-232
R3
IN
R4
IN
R5
IN
INPUTS
2
18
12
9
15
NOTES
1
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
2
INTERNAL 5kΩPULL-DOWN RESISTOR ON EACH RS-232 INPUT.
Figure 7. ADM208 Typical Operating Circuit
00067-0-007
Rev. C | Page 6 of 16
NOTES
1
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
2
INTERNAL 5kΩPULL-DOWN RESISTOR ON EACH RS-232 INPUT.
Figure 9. ADM209 Typical Operating Circuit
00067-0-009
ADM206–ADM211/ADM213
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
R1
T3
T1
T2
R2
OUT
OUT
OUT
R2
OUT
T2
T1
OUT
R1
GND
V
C1+
C1–
IN
IN
IN
IN
CC
V+
1
2
3
4
5
6
ADM211
7
TOP VIEW
(Not to Scale)
8
9
10
11
12
13
14
28
T4
OUT
27
R3
IN
26
R3
OUT
25
SD
24
EN
23
R4
IN
R4
22
OUT
21
T4
IN
T3
20
IN
R5
19
OUT
R5
18
IN
17
V–
16
C2–
15
C2+
00067-0-010
Figure 10. ADM211 SOIC/SSOP Pin Configuration
5V INPUT
R1
R2
R3
R4
R5
ADM211
V
11
CC
V+
V–
0.1
µ
F
+
6.3V
13
17
28
27
23
18
25
µ
F
0.1
16V
+
2
T1
OUT
3
T2
OUT
T3
1
OUT
T4
OUT
R1
9
IN
4
R2
IN
R3
IN
R4
IN
R5
IN
SD
12
+5VTO +10V
C1+
+
0.1
µ
F
16V
14
15
+
0.1
µ
F
16V
16
T1
T2
1
T3
T4
R1
OUT
R2
OUT
R3
OUT
R4
OUT
R5
OUT
NOTES
1
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
2
INTERNAL 5kΩPULL-DOWN RESISTOR ON EACH RS-232 INPUT.
EN
7
IN
6
IN
20
IN
21
IN
8
5
26
22
19
24
C1–
C2+
C2–
VOLTAGE
DOUBLER
+10VTO –10V
VOLTAGE
INVERTER
T1
T2
T3
T4
GND
10
Figure 11. ADM211 Typical Operating Circuit
+
0.1
RS-232
OUTPUTS
RS-232
INPUTS
1
T3
OUT
2
T1
OUT
3
T2
OUT
4
R2
IN
5
R2
OUT
6
T2
IN
ADM213
7
T1
IN
TOP VIEW
OUT
R1
GND
V
C1+
C1–
IN
CC
V+
(Not to Scale)
8
9
10
11
12
13
14
R1
*ACTIVE IN SHUTDOWN
28
T4
OUT
27
R3
IN
26
R3
OUT
25
SD
24
EN
23
R4
*
IN
22
R4
*
OUT
21
T4
IN
T3
20
IN
19
R5
*
OUT
18
*
R5
IN
17
V–
16
C2–
15
C2+
00067-0-012
Figure 12. ADM213 SOIC/SSOP Pin Configuration
5V INPUT
µ
F
TTL/CMOS
TTL/CMOS
OUTPUTS
2
NOTES
1
2
00067-0-011
3
0.1
0.1
1
INPUTS
R1
R2
R3
R4
R5
INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
INTERNAL 5kΩPULL-DOWN RESISTOR ON EACH RS-232 INPUT.
ACTIVE IN SHUTDOWN.
T1
T2
T3
T4
OUT
OUT
16V
16V
OUT
OUT
OUT
EN
14
15
+
µ
F
16
7
IN
6
IN
20
IN
21
IN
8
5
26
3
22
3
19
24
C1–
C2+
C2–
VOLTAGE
DOUBLER
+10VTO –10V
VO LTAG E
INVERTER
T1
T2
T3
T4
R1
R2
R3
R4
R5
ADM213
GND
10
12
+5VTO +10V
C1+
+
µ
F
11
V
CC
+
13
V+
17
V–
+
2
3
1
28
9
4
27
23
18
25
0.1µF
6.3V
0.1
16V
T1
T2
T3
T4
R1
R2
R3
R4
R5
SD
µ
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
F
3
3
+
µ
0.1
RS-232
OUTPUTS
RS-232
INPUTS
F
2
00067-0-013
Figure 13. ADM213 Typical Operating Circuit
Rev. C | Page 7 of 16
ADM206–ADM211/ADM213
Table 4. Pin Function Descriptions
Mnemonic Function
VCC Power Supply Input. 5 V ± 10%.
V+
V– Internally Generated Negative Supply (–10 V Nominal).
GND Ground Pin. Must be connected to 0 V.
C+ (ADM209 only) External capacitor (+ terminal) is connected to this pin.
C– (ADM209 only) External capacitor (– terminal) is connected to this pin.
C1+ (ADM206, ADM207, ADM208, ADM211, and ADM213) External Capacitor (+ terminal) is connected to this pin.
C1– (ADM206, ADM207, ADM208, ADM211, and ADM213) External Capacitor (– terminal) is connected to this pin.
C2+ (ADM206, ADM207, ADM208, ADM211, and ADM213) External Capacitor (+ terminal) is connected to this pin.
C2– (ADM206, ADM207, ADM208, ADM211, and ADM213) External Capacitor (– terminal) is connected to this pin.
TIN
T
Transmitter (Driver) Outputs. These are RS-232 levels (typically ± 10 V).
OUT
RIN
R
Receiver Outputs. These are TTL/CMOS levels.
OUT
EN/EN Enable Input. Active low on ADM206, ADM209, and ADM211. Active high on ADM213. This input is used to enable/disable the
SD/SD Shutdown Input. Active high on ADM206 and ADM211. Active low on ADM213. With SD = high on the ADM206 and ADM211,
NC No Connect. No connections are required to this pin.
Table 5. ADM206 and ADM211 Truth Table
SD
0 0 Normal Operation Enabled Enabled
0 1 Normal Operation Enabled Disabled
1 0 Shutdown Disabled Disabled
Internally Generated Positive Supply (10 V nominal) on all parts, except ADM209 . The ADM209 requires an external 9 V to
13.2 V supply.
Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels. An internal 400 kΩ pull-up resistor to V
is connected to
CC
each input.
Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kΩ pull-down resistor to GND is connected to each
input.
receiver outputs. With EN
= low (EN = high ADM213), the receiver outputs are enabled. With EN = high (EN = low ADM213),
the outputs are placed in a high impedance state. This is useful for connecting to microprocessor systems.
the charge pump is disabled, the receiver outputs are placed in a high impedance state, and the driver outputs are turned off.
With SD
= low on the ADM213, the charge pump is disabled, the driver outputs are turned off, and all receivers, except R4
and R5, are placed in a high impedance state. In shutdown, the power consumption reduces to 5 µW.
EN
Status Transmitters T1–T5 Receivers R1–R5
EN Status Transmitters T1–T4 Receivers R1–R3 Receivers R4, R5
Rev. C | Page 8 of 16
ADM206–ADM211/ADM213
TYPICAL PERFORMANCE CHARACTERISTICS
15
10
V+
5
0
V+/V– (V)
–
5
V
–
10
–
15
510
–
LOAD CURRENT (mA)
Figure 14. Charge Pump V+, V– vs. Load Current
50
45
40
35
30
25
20
SLEW RATE (V/µs)
15
10
5
0
POSITIVE
SLEW
0500
NEGATIVE
SLEW
1000
LOAD CAPACITANCE (pF)
1500200025003000
Figure 15. Transmitter Slew Rate vs. Load Capacitance
15
10
5
(V)
0
Tx O/P
–5
–10
15
200
00067-0-014
–15
02
Tx O/P HIGH
Tx O/P LOW
LOAD CURRENT (mA)
468
10
00067-0-017
Figure 17. Transmitter Output Voltage vs. Load Current
350
00067-0-015
300
250
)
Ω
200
150
IMPEDANCE (
100
50
0
4.54.7
V– IMP
V+ IMP
4.95.15.35.5
VCC (V)
Figure 18. Charge Pump Impedance vs. V
00067-0-018
CC
9
7
5
3
1
(V)
0
–1
Tx O/P
–3
–5
–7
–9
4.04.5
Tx O/P HIGH LOADED
Tx O/P LOW LOADED
5.05.56.0
VCC(V)
Figure 16. Transmitter Output Voltage vs. V
1
2
3
CH1
00067-0-016
CC
CH3
Figure 19. Charge Pump, V+, V– Exiting Shutdown
5.00V
5.00V
T
T
T
B
W
CH2 5.00V M50.0µs
V+, V– EXITING SHUTDOWN (SD)
CH1
3.1V
SD
V+
V–
00067-0-019
Rev. C | Page 9 of 16
ADM206–ADM211/ADM213
1
2
5.00V CH2 5.00V M1.00
CH1
T
T
µ
s CH1
Figure 20. Transmitter Output Loaded Slew Rate
800mV
Tx INPUT
Tx OUTPUT
00067-0-020
1
2
5.00V CH2 5.00V M1.00
CH1
Figure 21. Transmitter Output Unloaded Slew Rate
T
T
µ
s CH1
800mV
Tx INPUT
Tx OUTPUT
00067-0-021
Rev. C | Page 10 of 16
ADM206–ADM211/ADM213
GENERAL INFORMATION
The ADM206–ADM211/ADM213 family of RS-232 drivers/
receivers is designed to solve interface problems by meeting the
EIA-232-E specifications while using a single digital 5 V supply.
The EIA-232-E standard requires transmitters that will deliver
±5 V minimum on the transmission channel and receivers that
can accept signal levels down to ±3 V. The ADM206–ADM211/
ADM213 meet these requirements by integrating step-up voltage
converters and level shifting transmitters and receivers onto the
same chip. CMOS technology is used to keep the power dissipation to an absolute minimum. A comprehensive range of
transmitter/receiver combinations is available to cover most
communication needs. The ADM206–ADM211/ADM213 are
modifications, enhancements, and improvements to the AD230–
AD241 family and derivatives thereof. They are essentially plugin compatible and do not have materially different applications.
The ADM206, ADM211, and ADM213 are particularly useful in
battery-powered systems because they feature a low power shutdown mode that reduces power dissipation to less than 5 µW.
The ADM209 includes only a negative charge pump converter
and is intended for applications where a +12 V is available.
To facilitate sharing a common line or for connection to a
microprocessor data bus, the ADM206, the ADM209, the
ADM211, and the ADM213 feature an enable (
When the receivers are disabled, their outputs are placed in a
high impedance state.
CIRCUIT DESCRIPTION
The internal circuitry in the ADM206–ADM211/ADM213
consists of three main sections: (a) a charge pump voltage
converter; (b) RS-232-to-TTL/CMOS receivers; and
(c) TTL/CMOS-to-RS-232 transmitters.
Charge Pump DC-to-DC Voltage Converter
The charge pump voltage converter consists of an oscillator and
a switching matrix. The converter generates a ±10 V supply
from the 5 V input. This is done in two stages using a switched
capacitor technique, as illustrated in Figure 22 and Figure 23.
First, the 5 V input supply is doubled to 10 V using capacitor
C1 as the charge storage element. The 10 V level is then
inverted to generate –10 V using C2 as the storage element.
V
CC
GND
INTERNAL
OSCILLATOR
S1
S2
Figure 22. Charge Pump Voltage Doubler
S3
++
C1
S4
C3
) function.
EN
V+ = 2V
V
CC
CC
00067-0-022
FROM
VO LTAGE
DOUBLER
V+
GND
INTERNAL
OSCILLATOR
S1
S2
Figure 23. Charge Pump Voltage Inverter
S3
++
C2
S4
GND
C4
V– = –(V+)
00067-0-023
Capacitors C3 and C4 are used to reduce the output ripple.
Their values are not critical and can be reduced if higher levels
of ripple are acceptable. The charge pump capacitors C1 and C2
may also be reduced at the expense of higher output impedance
on the V+ and V– supplies.
The V+ and V– supplies may also be used to power external
circuitry if the current requirements are small.
Transmitters (Drivers)
The drivers convert TTL/CMOS input levels into EIA-232-E
output levels. With V
= +5 V and driving a typical EIA-232-E
CC
load, the output voltage swing is ±9 V. Even under worst-case
conditions, the drivers are guaranteed to meet the ±5 V EIA232-E minimum requirement.
The input threshold levels are both TTL- and CMOS-compatible
with the switching threshold set at V
/4. With a nominal VCC =
CC
5 V, the switching threshold is 1.25 V typical. Unused inputs
may be left unconnected, because an internal 400 kΩ pull-up
resistor pulls them high, forcing the outputs into a low state.
As required by the EIA-232-E standard, the slew rate is limited
to less than 30 V/µs, without the need for an external slew
limiting capacitor, and the output impedance in the power-off
state is greater than 300 Ω.
Receivers
The receivers are inverting level shifters that accept EIA-232-E
input levels (±5 V to ±15 V) and translate them into 5 V TTL/
CMOS levels. The inputs have internal 5 kΩ pull-down resistors
to ground and are also protected against overvoltages of up to
±30 V. The guaranteed switching thresholds are 0.8 V minimum
and 2.4 V maximum, well within the ±3 V EIA-232-E requirement. The low level threshold is deliberately positive, since it
ensures that an unconnected input will be interpreted as a
low level.
The receivers have Schmitt-trigger inputs with a hysteresis level
of 0.65 V. This ensures error-free reception for both noisy
inputs and inputs with slow transition times.
Shutdown (SD)
The ADM206–ADM211/ADM213 feature a control input that
may be used to disable the part and reduce the power consumpion to less than 5 ΩW. This is very useful in battery-operated
systems. During shutdown, the charge pump is turned off, the
transmitters are disabled, and all receivers except R4 and R5 on
the ADM213 are put into a high impedance disabled state.
Rev. C | Page 11 of 16
ADM206–ADM211/ADM213
Receivers R4 and R5 on the ADM213 remain enabled during
shutdown. This feature allows monitoring external activity
while the device is in a low power shutdown mode. The
shutdown control input is active high on all parts except the
ADM213, where it is active low. See Table 5 and Table 6.
Enable Input
The ADM209, ADM211, and ADM213 feature an enable input
used to enable or disable the receiver outputs. The enable input
is active low on the ADM209 and ADM211 and active high on
the ADM213. See Table 5 and Table 6. When the receivers are
disabled, their outputs are placed in a high impedance state.
This function allows the outputs to be connected directly to a
microprocessor data bus. It can also be used to allow receivers
from different devices to share a common data line. The timing
diagram for the enable function is shown in Figure 24.
3V
EN*
0V
R
OUT
*POLARITY OF
T
EN
3.5V
0.8V
EN IS REVERSED FOR ADM213.
Figure 24. Enable Timing
T
DIS
VOH– 0.1V
V
+ 0.1V
OL
00067-0-024
APPLICATION HINTS
Driving Long Cables
In accordance with the EIA-232-E standard, long cables are
permissible provided the total load capacitance does not exceed
2500 pF. For longer cables that do exceed this, it is possible to
trade off baud rate for cable length. Large load capacitances cause
a reduction in slew rate, and therefore the maximum transmission baud rate is decreased. The ADM206–ADM211/ADM213
are designed to minimize the slew rate reduction that occurs as
load capacitance increases.
For the receivers, it is important that a high level of noise
immunity be inbuilt so that slow rise and fall times do not
cause multiple output transitions as the signal passes slowly
through the transition region. The ADM206–ADM211/
ADM213 have 0.65 V of hysteresis to guard against this. This
ensures that even in noisy environments error-free reception
can be achieved.
High Baud Rate Operation
The ADM206–ADM211/ADM213 feature high slew rates,
permitting data transmission at rates well in excess of the EIA232-E specification. The drivers maintain ±5 V signal levels at
data rates up to 120 kB/s under worst-case loading conditions.
Rev. C | Page 12 of 16
ADM206–ADM211/ADM213
0
0
0
Y
OUTLINE DIMENSIONS
1.185 (30.01)
1.165 (29.59)
1.145 (29.08)
24
112
0.180
(4.57)
MAX
.150 (3.81)
.130 (3.30)
.110 (2.79)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 27. 24-Lead Shrink Small Outline Package [SSOP]
8.50
8.20
7.90
8.20
5.60
7.80
5.30
7.40
5.00
12
1.85
1.75
1.65
0.65
COMPLIANT TO JEDEC STANDARDS MO-150AG
0.38
0.22
SEATING
PLANE
COPLANARITY
0.10
0.25
0.09
(RS-24)
Dimensions shown in millimeters
8°
4°
0°
0.95
0.75
0.55
0.30 (0.0118)
0.10 (0.0039)
COPLANARIT
15.60 (0.6142)
15.20 (0.5984)
2413
1
1.27 (0.0500)
0.10
BSC
COMPLIANT TO JEDEC STANDARDS MS-013AD
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
0.51 (0.020)
0.31 (0.012)
7.60 (0.2992)
7.40 (0.2913)
12
2.65 (0.1043)
2.35 (0.0925)
SEATING
PLANE
10.65 (0.4193)
10.00 (0.3937)
0.33 (0.0130)
0.20 (0.0079)
0.75 (0.0295)
0.25 (0.0098)
8°
0°
Figure 26. 24-Lead Standard Small Outline Package [SOIC]
Wide Body
(R-24)
Dimensions shown in millimeters and (inches)
× 45°
1.27 (0.0500)
0.40 (0.0157)
18.10 (0.7126)
17.70 (0.6969)
2815
1
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
0.10
1.27 (0.0500)
COMPLIANT TO JEDEC STANDARDS MS-013AE
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
BSC
0.51 (0.0201)
0.33 (0.0130)
14
2.65 (0.1043)
2.35 (0.0925)
SEATING
PLANE
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10.00 (0.3937)
0.33 (0.0130)
0.20 (0.0079)
0.75 (0.0295)
0.25 (0.0098)
8°
0°
× 45°
1.27 (0.0500)
0.40 (0.0157)
Figure 28. 28-Lead Standard Small Outline Package [SOIC]
Wide Body
(R-28)
Dimensions shown in millimeters and (inches)
Rev. C | Page 13 of 16
ADM206–ADM211/ADM213
PIN 1
0.05 MIN
10.50
10.20
9.90
2815
5.60
8.20
5.30
7.80
5.00
1
2.00 MAX
0.65
BSC
14
1.85
1.75
1.65
0.38
0.22
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-150AH
7.40
COPLANARITY
0.10
0.25
0.09
Figure 29. 28-Lead Shrink Small Outline Package [SSOP]
(RS-28)
Dimensions shown in millimeters
8°
4°
0°
0.95
0.75
0.55
Rev. C | Page 14 of 16
ADM206–ADM211/ADM213
ORDERING GUIDE
Model Temperature Range Package Description Package Option
ADM206AN –40°C to +85°C 24-lead DIP N-24
ADM206AR –40°C to +85°C 24-lead SOIC R-24
ADM206AR-REEL –40°C to +85°C 24-lead SOIC R-24
ADM206ARS –40°C to +85°C 24-lead SSOP RS-24
ADM206ARS-REEL –40°C to +85°C 24-lead SSOP RS-24
ADM206ARZ1 –40°C to +85°C 24-lead SOIC R-24
ADM206ARZ-REEL1 –40°C to +85°C 24-lead SOIC R-24
ADM207AN –40°C to +85°C 24-lead DIP N-24
ADM207AR –40°C to +85°C 24-lead SOIC R-24
ADM207AR-REEL –40°C to +85°C 24-lead SOIC R-24
ADM207ARS –40°C to +85°C 24-lead SSOP RS-24
ADM207ARS-REEL –40°C to +85°C 24-lead SSOP RS-24
ADM208AN –40°C to +85°C 24-lead DIP N-24
ADM208AR –40°C to +85°C 24-lead SOIC R-24
ADM208AR-REEL –40°C to +85°C 24-lead SOIC R-24
ADM208ARS –40°C to +85°C 24-lead SSOP RS-24
ADM208ARS-REEL –40°C to +85°C 24-lead SSOP RS-24
ADM209AN –40°C to +85°C 24-lead DIP N-24
ADM209AR –40°C to +85°C 24-lead SOIC R-24
ADM209AR-REEL –40°C to +85°C 24-lead SOIC R-24
ADM209ARS –40°C to +85°C 24-lead SSOP RS-24
ADM209ARS-REEL –40°C to +85°C 24-lead SSOP RS-24
ADM211AR –40°C to +85°C 28-lead SOIC R-28
ADM211AR-REEL –40°C to +85°C 28-lead SOIC R-28
ADM211ARS –40°C to +85°C 28-lead SSOP RS-28
ADM211ARS-REEL –40°C to +85°C 28-lead SSOP RS-28
ADM211ARSZ1 –40°C to +85°C 28-lead SSOP RS-28
ADM211ARSZ-REEL1 –40°C to +85°C 28-lead SSOP RS-28
ADM213AR –40°C to +85°C 28-lead SOIC R-28
ADM213AR-REEL –40°C to +85°C 28-lead SOIC R-28
ADM213ARS –40°C to +85°C 28-lead SSOP RS-28
ADM213ARS-REEL –40°C to +85°C 28-lead SSOP RS-28
ADM213ARSZ1 –40°C to +85°C 28-lead SSOP RS-28
ADM213ARSZ-REEL1 –40°C to +85°C 28-lead SSOP RS-28