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ADM205
Datasheet (ANALOG DEVICES)
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Datasheet (ANALOG DEVICES)
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Datasheet ADM205 Datasheet (ANALOG DEVICES)

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0.1 ␮F, 5 V Powered
CMOS RS-232 Drivers/Receivers
ADM205–ADM211/ADM213
FEATURES
0.1 ␮F to 10 ␮F Capacitors 120 kB/s Data Rate Two Receivers Active in Shutdown (ADM213) On-Board DC-DC Converters ⴞ9 V Output Swing with 5 V Supply Low Power (15 mW) Low-Power Shutdown ≤5 ␮W ⴞ30 V Receiver Input Levels Latch-Up FREE Plug-In Upgrade for MAX205-211/213
APPLICATIONS Computers Peripherals Modems Printers Instruments
GENERAL DESCRIPTION
The ADM2xx family of line drivers/receivers is intended for all EIA-232-E and V.28 communications interfaces, especially in appli­cations where ±12 V is not available. The ADM205, ADM206, ADM211, and ADM213 feature a low power shutdown mode which reduces power dissipation to less than 5 µW, making them ideally suited for battery powered equipment. The ADM205 does not require any external components and is particularly useful in applications where printed circuit board space is critical. The ADM213 has an active-low shutdown and an active-high receiver enable control. Two receivers of the ADM213 remain active during shutdown. This feature is useful for ring indicator monitoring.
TYPICAL OPERATING CIRCUIT
5V INPUT
R1
R2
R3
R4
R5
ADM211
V
CC
V+
V–
+
+
0.1␮F
6.3V
0.1␮F 16V
T1
T2
T3
T4
R1
R2
R3
R4
R5
SD
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
+
0.1␮F
RS-232 OUTPUTS
RS-232 INPUTS
2
0.1␮F 16V
+
0.1␮F 16V
T1
IN
T2
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
IN
1
T3
IN
T4
IN
R1
OUT
R2
OUT
R3
OUT
R4
OUT
R5
OUT
EN
NOTES
1
INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
2
INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
C1–
C2+
C2–
VO LTAG E
DOUBLER
+10V TO –10V
VO LTAG E
INVERTER
T1
T2
T3
T4
GND
+5V TO +10V
C1+
+
All members of the ADM2xx family, except the ADM209, include two internal charge pump voltage converters which allow operation from a single 5 V supply. These converters convert the 5 V input power to the ±10 V required for RS-232 output levels. The ADM209 is designed to operate from 5 V and 12 V supplies. An internal +12 V to –12 V charge pump voltage converter generates the –12 V supply.
Table I. Selection Table
No. of No. of Low Power TTL No. of Receivers
Part Power RS-232 RS-232 External Shutdown Three-State Active in Number Supply Voltage Drivers Receivers Capacitors (SD) EN Shutdown
ADM205 5 V 5 5 None Yes Yes 0 ADM206 5 V 4 3 4 Yes Yes 0 ADM207 5 V 5 3 4 No No 0 ADM208 5 V 4 4 4 No No 0 ADM209 5 V and 9 V to 13.2 V 3 5 2 No Yes 0 ADM211 5 V 4 5 4 Yes Yes 0 ADM213 5 V 4 5 4 Yes (SD) Yes (EN) 2
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2001
ADM205–ADM211/ADM213–SPECIFICATIONS
WARNING!
ESD SENSITIVE DEVICE
to 13.2 V (ADM209); C1–C4 = 0.1 ␮F Ceramic. All Specifications T
MIN
to T
unless otherwise noted.)
MAX
213); VCC = 5 V ⴞ 5% (ADM205); V+ = 9 V
Parameter Min Typ Max Unit Test Conditions/Comments
Output Voltage Swing ± 5 ± 9 Volts All Transmitter Outputs Loaded with 3 kΩ to
Ground
(VCC = 5 V ⴞ 10% (206, 207, 208, 2O9, 211,
V
Power Supply Current 5 13 mA No Load
CC
0.4 1 mA No Load, ADM209 V+ Power Supply Current 3.5 5 mA No Load, V+ = 12 V ADM209 Only Shutdown Supply Current 1 10 µA Input Logic Threshold Low, V Input Logic Threshold High, V Logic Pull-Up Current 10 25 µAT RS-232 Input Voltage Range
INL
INH
1
2.4 V TIN, EN, SD, EN, SD
–30 +30 V
0.8 V TIN, EN, SD, EN, SD
= 0 V
IN
RS-232 Input Threshold Low 0.8 1.2 V RS-232 Input Threshold High 1.7 2.4 V RS-232 Input Hysteresis 0.25 V RS-232 Input Resistance 357kΩ T TTL/CMOS Output Voltage Low, V TTL/CMOS Output Voltage High, V
OL
OH
3.5 V I
0.4 V I
TTL/CMOS Output Leakage Current 0.05 ± 10 µA EN = V
= 0°C to 85°C
A
= 1.6 mA
OUT
= –1.0 mA
OUT
, EN = 0 V, 0 V ≤ R
CC
OUT
≤ V
CC
Output Enable Time (TEN) 115 ns ADM205, ADM206, ADM209, ADM211
Output Disable Time (T
(Figure 17. C
) 165 ns ADM205, ADM206, ADM209, ADM211
DIS
(Figure 17. R
= 150 pF)
L
= 1 kΩ)
L
Propagation Delay 0.5 5 µs RS-232 to TTL Transition Region Slew Rate 8 V/µsR
= 3 kΩ, CL = 2500 pF
L
Measured from +3 V to –3 V or –3 V to +3 V
Output Resistance 300 Ω V
= V+ = V– = 0 V, V
CC
OUT
= ±2 V
RS-232 Output Short Circuit Current ±12 ±60 mA
NOTES
1
Guaranteed by design.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
(TA = 25°C unless otherwise noted)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
V
CC
V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . (V
– 0.3 V) to +14 V
CC
V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –14 V
Input Voltages
. . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
T
IN
R
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 30 V
IN
Output Voltages
. . . . . . . . . . . . . . . . . . (V+, + 0.3 V) to (V–, –0.3 V)
T
OUT
R
. . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
OUT
Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
T
OUT
Power Dissipation
N-24 DIP (Derate 13.5 mW/°C above 70°C) . . . 1000 mW N-24A DIP (Derate 13.5 mW/°C above 70°C) . . . 500 mW
R-24 SOIC (Derate 12 mW/°C above 70°C) . . . . . 850 mW
R-28 SOIC (Derate 12.5 mW/°C above 70°C) . . . 900 mW
RS-28 SSOP (Derate 10 mW/°C above 70°C) . . . . 900 mW
Q-24 Cerdip (Derate 12.5 mW/°C above 70°C) . . . 1000 mW D-24 Ceramic (Derate 20 mW/°C above 70°C) . . . 1000 mW
Thermal Impedance, θ
N-24 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
N-24A DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110°C/W
R-24 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
R-28 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
RS-28 SSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
Q-14 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105°C/W
Q-16 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
Q-20 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
Q-24 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C/W
D-24 Ceramic . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50°C/W
Operating Temperature Range
Industrial (A Version) . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature, Soldering . . . . . . . . . . . . . . . . . . . 300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*This is a stress rating only; functional operation of the device at these or any other
conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADM205–ADM211/ADM213 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
–2–
JA
REV. A
ADM205–ADM211/ADM213
ORDERING GUIDE
Temperature Package Temperature Package Temperature Package
Model Range Option* Model Range Option* Model Range Option*
ADM205 ADM206 ADM207
ADM205AN –40°C to +85°C N-24A ADM206AN –40°C to +85°C N-24 ADM207AN –40°C to +85°C N-24
ADM206AR –40°C to +85°C R-24 ADM207AR –40°C to +85°C R-24 ADM206ARS –40°C to +85°C RS-24 ADM207ARS –40°C to +85°C RS-24
ADM208 ADM209 ADM211
ADM208AN –40°C to +85°C N-24 ADM209AN –40°C to +85°C N-24 ADM211AR –40° C to +85°C R-28 ADM208AR –40°C to +85°C R-24 ADM209AR –40°C to +85°C R-24 ADM211ARS –40°C to +85°C RS-28 ADM208ARS –40°C to +85°C RS-24 ADM209ARS –40°C to +85°C RS-24
ADM213
ADM213AR –40°C to +85°C R-28 ADM213ARS –40°C to +85°C RS-28
*N = Plastic DIP; R = Small Outline IC (SOIC); RS = Small Shrink Outline Package (SSOP).
5V INPUT
0.1␮F +
V
T1
IN
CC
T1
T1
OUT
24
R3
IN
23
R3
OUT
22
T5
IN
21
SD
20
EN
19
T5
OUT
18
R4
IN
17
R4
OUT
16
T4
IN
15
T3
IN
14
R5
OUT
13
R5
IN
R2
R1
T4
T3
T1
T2
OUT
OUT
OUT
OUT
R2
OUT
T2
T1
OUT
R1
GND
V
IN
IN
IN
10
IN
11
12
CC
1
2
3
4
5
ADM205
6
TOP VIEW
(Not to Scale)
7
8
9
Figure 1. ADM205 DIP Pin Configuration
T2
IN
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
T3
IN
1
T4
IN
T5
IN
R1
OUT
R2
OUT
R3
OUT
R4
OUT
R5
OUT
EN
NOTES
1
INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
2
INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
GND
T2
T3
T4
T5
R1
R2
R3
R4
R5
ADM205
Figure 2. ADM205 Typical Operating Circuit
T2
T3
T4
T5
R1
R2
R3
R4
R5
SD
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
RS-232 OUTPUTS
RS-232 INPUTS
2
REV. A
–3–
ADM205–ADM211/ADM213
TOP VIEW
(Not to Scale)
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
ADM207
C1–
V+
C1+
V
CC
GND
T3
OUT
T1
OUT
T2
OUT
R1
IN
T1
IN
T2
IN
R1
OUT
C2+
C2–
V–
R3
IN
R3
OUT
T4
OUT
R2
IN
R2
OUT
T5
IN
T3
IN
T4
IN
T5
OUT
24
T4
OUT
23
R2
IN
22
R2
OUT
21
SD
20
EN
19
T4
IN
18
T3
IN
17
R3
OUT
16
R3
IN
15
V–
14
C2–
13
C2+
R1
T3
T1
T2
OUT
OUT
OUT
R1
OUT
T2
T1
GND
V
C1+
C1–
IN
IN
IN
CC
V+
1
2
3
4
5
ADM206
6
TOP VIEW
(Not to Scale)
7
8
9
10
11
12
Figure 3. ADM206 DIP/SOIC/SSOP Pin Configuration
5V INPUT
R1
R2
R3
ADM206
V
CC
V+
V–
+
+
0.1␮F
6.3V
0.1␮F 16V
T1
OUT
T2
OUT
T3
OUT
T4
OUT
R1
IN
R2
IN
R3
IN
RS-232 INPUTS
SD
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
0.1␮F
6.3V
+
0.1␮F 16V
T1
IN
T2
IN
1
T3
IN
T4
IN
R1
OUT
R2
OUT
R3
OUT
EN
C1–
C2+
C2–
VO LTAG E
DOUBLER
+10V TO –10V
VO LTAG E
INVERTER
T1
T2
T3
T4
GND
+5V TO +10V
C1+
+
+
0.1␮F
RS-232 OUTPUTS
2
Figure 5. ADM207 DIP/SOIC/SSOP Pin Configuration
5V INPUT
R1
R2
R3
ADM207
V
CC
V+
V–
+
+
0.1␮F
6.3V
0.1␮F 16V
T1
OUT
T2
OUT
T3
OUT
T4
OUT
T5
OUT
R1
IN
R2
IN
R3
IN
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
0.1␮F
6.3V
+
0.1␮F 16V
T1
IN
T2
IN
T3
IN
1
T4
IN
T5
IN
R1
OUT
R2
OUT
R3
OUT
C1–
C2+
C2–
VO LTAG E
DOUBLER
+10V TO –10V
VO LTAG E
INVERTER
T1
T2
T3
T4
T5
+5V TO +10V
C1+
+
GND
+
0.1␮F
RS-232 OUTPUTS
RS-232 INPUTS
2
NOTES
1
INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
2
INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
Figure 4. ADM206 Typical Operating Circuit
–4–
NOTES
1
INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
2
INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
Figure 6. ADM207 Typical Operating Circuit
REV. A
ADM205–ADM211/ADM213
24
T3
OUT
23
R3
IN
22
R3
OUT
21
T4
IN
20
T4
OUT
19
T3
IN
18
T2
IN
17
R4
OUT
16
R4
IN
15
V–
14
C2–
13
C2+
R2
R1
T2
T1
OUT
OUT
R2
OUT
T1
OUT
R1
GND
V
C1+
C1–
IN
IN
IN
CC
V+
1
2
3
4
5
ADM208
6
TOP VIEW
(Not to Scale)
7
8
9
10
11
12
Figure 7. ADM208 DIP/SOIC/SSOP Pin Configuration
5V INPUT
R1
R2
R3
R4
ADM208
V
CC
V+
V–
0.1␮F
+
6.3V
0.1␮F 16V
+
T1
T2
T3
T4
R1
R2
R3
R4
OUT
OUT
OUT
OUT
IN
IN
IN
IN
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
1
0.1␮F
0.1␮F
R1
R2
R3
R4
6.3V
16V
T1
T2
T3
T4
OUT
OUT
OUT
OUT
+
+
IN
IN
IN
IN
C1–
C2+
C2–
VO LTAG E
DOUBLER
+10V TO –10V
VO LTAG E
INVERTER
T1
T2
T3
T4
+5V TO +10V
C1+
GND
+
0.1␮F
RS-232 OUTPUTS
RS-232 INPUTS
R1
R5
R4
OUT
R1
GND
V
R5
OUT
OUT
R4
IN
CC
V+
C+
C–
V–
IN
IN
1
2
3
4
5
ADM209
6
TOP VIEW
(Not to Scale)
7
8
9
10
11
12
24
T1
IN
23
T2
IN
22
R2
OUT
21
R2
IN
20
T2
OUT
19
T1
OUT
18
R3
IN
17
R3
OUT
16
T3
IN
15
NC
14
EN
13
T3
OUT
Figure 9. ADM209 DIP/SOIC/SSOP Pin Configuration
5V INPUT
0.1␮F
0.1␮F 16V
+
9V TO 13.2V INPUT
+
T1
OUT
T2
OUT
T3
OUT
R1
IN
R2
IN
R3
IN
R4
IN
R5
IN
NC
RS-232 OUTPUTS
RS-232 INPUTS
2
V
C1+
C1–
+12V TO –12V
VO LTAG E
INVERTER
T1
T2
T3
ADM209
GND
+
0.1␮F 16V
T1
IN
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
2
T2
IN
1
T3
IN
R1
OUT
R2
OUT
R3
OUT
R4
OUT
R5
OUT
EN
CC
V+
V–
R1
R2
R3
R4
R5
REV. A
NOTES
1
INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
2
INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
Figure 8. ADM208 Typical Operating Circuit
–5–
NOTES
1
INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
2
INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
Figure 10. ADM209 Typical Operating Circuit
ADM205–ADM211/ADM213
R2
R1
T3
T1
T2
OUT
OUT
OUT
R2
OUT
T2
T1
OUT
R1
GND
V
C1+
C1–
IN
IN
IN
IN
CC
V+
1
2
3
4
5
6
ADM211
7
TOP VIEW
(Not to Scale)
8
9
10
11
12
13
14
28
T4
OUT
27
R3
IN
26
R3
OUT
25
SD
24
EN
23
R4
IN
R4
22
OUT
21
T4
IN
T3
20
IN
R5
19
OUT
R5
18
IN
17
V–
16
C2–
15
C2+
Figure 11. ADM211 SOIC/SSOP Pin Configuration
5V INPUT
0.1␮F 16V
0.1␮F 16V
T1
+
+
IN
C1–
C2+
C2–
VO LTAG E
DOUBLER
+10V TO –10V
VO LTAG E
INVERTER
T1
+5V TO +10V
C1+
V
CC
V+
+
V–
+
0.1␮F
6.3V
0.1␮F 16V
T1
OUT
+
0.1␮F
1
T3
OUT
2
T1
OUT
3
T2
OUT
4
R2
IN
5
R2
OUT
6
T2
IN
ADM213
7
T1
IN
TOP VIEW
OUT
R1
GND
V
C1+
C1–
IN
CC
V+
(Not to Scale)
8
9
10
11
12
13
14
R1
28
T4
OUT
27
R3
IN
26
R3
OUT
25
SD
24
EN
23
*
R4
IN
22
R4
*
OUT
21
T4
IN
T3
20
IN
19
R5
*
OUT
18
*
R5
IN
17
V–
16
C2–
15
C2+
*ACTIVE IN SHUTDOWN
Figure 13. ADM213 SOIC/SSOP Pin Configuration
5V INPUT
0.1␮F 16V
0.1␮F 16V
T1
+
+
IN
C1–
C2+
C2–
VO LTAG E
DOUBLER
+10V TO –10V
VO LTAG E
INVERTER
T1
+5V TO +10V
C1+
V
CC
V+
+
V–
+
0.1␮F
6.3V
0.1␮F 16V
T1
OUT
+
0.1␮F
T2
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
IN
1
T3
IN
T4
IN
R1
OUT
R2
OUT
R3
OUT
R4
OUT
R5
OUT
EN
NOTES
1
INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
2
INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
GND
T2
T3
T4
R1
R2
R3
R4
R5
ADM211
Figure 12. ADM211 Typical Operating Circuit
R1
R2
R3
R4
R5
SD
T2
OUT
RS-232 OUTPUTS
T3
OUT
T4
OUT
IN
IN
RS-232
IN
IN
IN
INPUTS
2
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
T2
IN
1
T3
IN
T4
IN
R1
OUT
R2
OUT
R3
OUT
3
R4
OUT
3
R5
OUT
EN
NOTES
1
INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
2
INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
3
ACTIVE IN SHUTDOWN
GND
T2
T3
T4
R1
R2
R3
R4
R5
ADM213
T2
T3
T4
R1
R2
R3
R4
R5
SD
OUT
OUT
OUT
IN
IN
IN
IN
IN
3
3
RS-232 OUTPUTS
RS-232 INPUTS
2
Figure 14. ADM213 Typical Operating Circuit
–6–
REV. A
ADM205–ADM211/ADM213
PIN FUNCTION DESCRIPTIONS
Mnemonic Function
V
CC
V+ Internally generated positive supply (10 V nominal) on all parts except ADM209.
V– Internally generated negative supply (–10 V nominal).
GND Ground Pin. Must be connected to 0 V.
C+ (ADM209 only) External capacitor (+ terminal) is connected to this pin.
C– (ADM209 only) External capacitor (– terminal) is connected to this pin.
C1+ (ADM206, ADM207, ADM208, ADM211, ADM213) External capacitor (+ terminal) is connected to this pin.
C1– (ADM206, ADM207, ADM208, ADM211, ADM213) External capacitor (– terminal) is connected to this pin.
C2+ (ADM206, ADM207, ADM208, ADM211, ADM213) External capacitor (+ terminal) is connected to this pin.
C2– (ADM206, ADM207, ADM208, ADM211, ADM213) External capacitor (– terminal) is connected to this pin.
T
IN
T
OUT
R
IN
R
OUT
EN/EN Enable Input. Active low on ADM205, ADM206, ADM209, ADM211. Active high on ADM213. This input is
SD/SD Shutdown Input. Active high on ADM205, ADM206, ADM211. Active low on ADM213. With SD = high on the
NC No Connect. No connections are required to this pin.
Power Supply Input 5 V ± 10% (5 V ± 5% ADM205).
ADM209 requires external 9 V to 13.2 V supply.
Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels. An internal 400 kΩ pull-up resistor to VCC is connected on each input.
Transmitter (Driver) Outputs. These are RS-232 levels (typically ±10 V).
Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kΩ pull-down resistor to GND is con- nected on each input.
Receiver Outputs. These are TTL/CMOS levels.
used to enable/disable the receiver outputs. With EN = Low (EN = High ADM213), the receiver outputs are enabled. With EN = High (EN = Low ADM213), the outputs are placed in a high impedance state. This facility is useful for connecting to microprocessor systems.
ADM205, ADM206, ADM211, the charge pump is disabled, the receiver outputs are placed in a high impedance state and the driver outputs are turned off. With SD low on the ADM213, the charge pump is disabled, the driver outputs are turned off and all receivers except R4 and R5 are placed in a high impedance state. In shutdown, the power consumption reduces to 5 µW.
REV. A
Table II. ADM205, ADM206, ADM211 Truth Table
SD EN Status Transmitters T1–T5 Receivers R1–R5
0 0 Normal Operation Enabled Enabled 0 1 Normal Operation Enabled Disabled 1 0 Shutdown Disabled Disabled
Table III. ADM213 Truth Table
SD EN Status Transmitters T1-T4 Receivers R1-R3 Receivers R4, R5
0 0 Shutdown Disabled Disabled Disabled 0 1 Shutdown Disabled Disabled Enabled 1 0 Normal Operation Enabled Disabled Disabled 1 1 Normal Operation Enabled Enabled Enabled
–7–
ADM205–ADM211/ADM213
15
10
V+
5
0
V+/V– – V
–5
–10
–15
V–
510
LOAD CURRENT – mA
15
200
TPC 1. Charge Pump V+, V– vs. Load Current
50
45
40
35
30
25
20
SLEW RATE – V/␮s
15
10
5
0
POSITIVE
SLEW
0 500
NEGATIVE
SLEW
1000
LOAD CAPACITANCE – pF
1500 2000 2500 3000
TPC 2. Transmitter Slew Rate vs. Load Capacitance
9
7
5
3
1 0
–1
Tx O/P – V
–3
–5
–7
–9
4.0 4.5
TPC 3. Transmitter Output Voltage vs. V
15
10
5
0
Tx O/P – V
–5
–10
–15
02
Tx O/P HI LOADED
Tx O/P LO LOADED
5.0 5.5 6.0
VCC – V
Tx O/P HI
Tx O/P LO
468
LOAD CURRENT – mA
CC
10
TPC 4. Transmitter Output Voltage vs. Load Current
350
300
250
200
150
IMPEDANCE – ⍀
100
50
0
4.5 4.7
V– IMP
V+ IMP
4.9 5.1 5.3 5.5 VCC – V
TPC 5. Charge Pump Impedance vs. V
–8–
CC
REV. A
1
+ +
V+
GND
S1
S2
C2
S3
S4
C4
GND
V– = –(V+)
INTERNAL
OSCILLATOR
FROM
VO LTAG E
DOUBLER
2
3
T
T
T
CH1
5.00V
CH3
5.00V
B
W
CH2 5.00V M50.0␮s
V+, V– EXITING SD
CH1
TPC 6. Charge Pump, V+, V– Exiting Shutdown
1
2
T
T
5.00V CH2 5.00V M1.00␮s CH1
CH1
800mV
TPC 7. Transmitter Output Loaded Slew Rate
1
2
T
T
SD V+
V–
3.1V
Tx INPUT
Tx OUTPUT
Tx INPUT
Tx OUTPUT
ADM205–ADM211/ADM213
thereof. They are essentially plug-in compatible and do not have materially different applications.
The ADM205, ADM206, ADM211, and ADM213 are particu­larly useful in battery-powered systems as they feature a low power shutdown mode which reduces power dissipation to less than 5 µW.
The ADM205 is designed for applications where space saving is important as the charge pump capacitors are molded into the package.
The ADM209 includes only a negative charge pump converter and are intended for applications where a positive 12 V is available.
To facilitate sharing a common line or for connection to a micro­processor data bus, the ADM205, ADM206, ADM209, ADM211, and ADM213 feature an enable (EN) function. When disabled, the receiver outputs are placed in a high impedance state.
CIRCUIT DESCRIPTION
The internal circuitry in the ADM205-ADM211 and ADM213 consists of three main sections. These are:
(a) A charge pump voltage converter (b) RS-232 to TTL/CMOS receivers (c) TTL/CMOS to RS-232 transmitters
Charge Pump DC-DC Voltage Converter
The charge pump voltage converter consists of an oscillator and a switching matrix. The converter generates a ± 10 V supply from the input 5 V level. This is done in two stages using a switched capacitor technique as illustrated in Figures 15 and 16. First, the 5 V input supply is doubled to 10 V using capacitor C1 as the charge storage element. The 10 V level is then inverted to generate –10 V using C2 as the storage element.
V
CC
GND
INTERNAL
OSCILLATOR
S1
S2
S3
+ +
C1
S4
V+ = 2V
CC
C3
V
CC
5.00V CH2 5.00V M1.00␮s CH1
CH1
800mV
TPC 8. Transmitter Output Unloaded Slew Rate
GENERAL INFORMATION
The ADM205-ADM211 and ADM213 family of RS-232 driv­ers/receivers are designed to solve interface problems by meeting the EIA-232-E specifications while using a single digital 5 V supply. The EIA-232-E standard requires transmitters which will deliver ± 5 V minimum on the transmission channel and receivers which can accept signal levels down to ±3 V. The ADM205-ADM211 and ADM213 meet these requirements by integrating step up voltage converters and level shifting trans­mitters and receivers onto the same chip. CMOS technology is used to keep the power dissipation to an absolute minimum. A comprehensive range of transmitter/receiver combinations is available to cover most communications needs. The ADM205– ADM211 and ADM213 are modifications, enhancements and improvements to the AD230–AD241 family and derivatives
REV. A
Figure 15. Charge-Pump Voltage Doubler
Figure 16. Charge-Pump Voltage Inverter
Capacitors C3 and C4 are used to reduce the output ripple. Their values are not critical and can be reduced if higher levels of ripple are acceptable. The charge pump capacitors C1 and C2 may also be reduced at the expense of higher output imped­ance on the V+ and V– supplies.
The V+ and V– supplies may also be used to power external circuitry if the current requirements are small.
–9–
ADM205–ADM211/ADM213
Transmitter (Driver) Section
The drivers convert TTL/CMOS input levels into EIA-232-E output levels. With V
= 5 V and driving a typical EIA-232-E
CC
load, the output voltage swing is ±9 V. Even under worst-case conditions the drivers are guaranteed to meet the ±5 V EIA-232-E minimum requirement.
The input threshold levels are both TTL- and CMOS-compatible with the switching threshold set at V
/4. With a nominal VCC =
CC
5 V the switching threshold is 1.25 V typical. Unused inputs may be left unconnected, as an internal 400 kΩ pull-up resistor pulls them high, forcing the outputs into a low state.
As required by the EIA-232-E standard, the slew rate is limited to less than 30 V/µs without the need for an external slew limit- ing capacitor and the output impedance in the power-off state is greater than 300 Ω.
Receiver Section
The receivers are inverting level shifters which accept EIA-232-E input levels (± 5 V to ± 15 V) and translate them into 5 V TTL/ CMOS levels. The inputs have internal 5 kΩ pull-down resistors to ground and are also protected against overvoltages of up to ± 30 V. The guaranteed switching thresholds are 0.8 V minimum and 2.4 V maximum which are well within the ±3 V EIA-232-E requirement. The low level threshold is deliberately positive as it ensures that an unconnected input will be interpreted as a low level.
The receivers have Schmitt trigger inputs with a hysteresis level of 0.5 V. This ensures error-free reception for both noisy inputs and for inputs with slow transition times.
Shutdown (SD)
The ADM205, ADM206, ADM211, and ADM213 feature a control input which may be used to disable the part and reduce the power consumption to less than 5 µW. This is very useful in battery operated systems. During shutdown the charge pump is turned off, the transmitters are disabled and all receivers except R4 and R5 on the ADM213 are put into a high-impedance dis­abled state. Receivers R4 and R5 on the ADM213 remain enabled during shutdown. This feature allows monitoring external activ­ity such as ring indicator monitoring while the device is in a low power shutdown mode. The shutdown control input is active high on all parts except the ADM213 where it is active low. Refer to Tables II and III.
Enable Input
The ADM205, ADM209, ADM211, and ADM213 feature an enable input used to enable or disable the receiver outputs. The enable input is active low on the ADM205, ADM209, ADM211 and active-high on the ADM213. Refer to Tables II and III. When disabled, all receiver outputs are placed in a high impedance state. This function allows the outputs to be connected directly to a microprocessor data bus. It can also be used to allow receivers from different devices to share a common data line. The timing diagram for the enable function is shown in Figure 17.
3V
EN*
0V
T
EN
R
OUT
*POLARITY OF EN IS REVERSED FOR ADM213.
3.5V
0.8V
T
DIS
VOH – 0.1V
+ 0.1V
V
OL
Figure 17. Enable Timing
APPLICATION HINTS Driving Long Cables
In accordance with the EIA-232-E standard, long cables are permissible provided that the total load capacitance does not exceed 2500 pF. For longer cables which do exceed this, then it is possible to trade off baud rate vs. cable length. Large load capacitances cause a reduction in slew rate, and hence the maximum transmission baud rate is decreased. The ADM205–ADM211 and ADM213 are designed so that the slew rate reduction with increasing load capacitance is minimized.
For the receivers, it is important that a high level of noise immu­nity be inbuilt so that slow rise and fall times do not cause multiple output transitions as the signal passes slowly through the transi­tion region. The ADM205–ADM211 and ADM213 have 0.5 V of hysteresis to guard against this. This ensures that, even in noisy environments, error-free reception can be achieved.
High Baud Rate Operation
The ADM205–ADM211 and ADM213 feature high slew rates permitting data transmission at rates well in excess of the EIA­232-E specification. The drivers maintain ±5 V signal levels at data rates up to 120 kB/s under worst-case loading conditions.
–10–
REV. A
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
ADM205–ADM211/ADM213
PIN 1
0.02 (0.5)
0.016 (0.41)
PIN 1
0.2
(5.08)
MAX
0.175 (4.45)
0.12 (3.05)
24-Lead Plastic DIP
(N-24)
0.07 (1.78)
0.05 (1.27)
13
0.260 ± 0.001 (6.61 ± 0.03)
12
0.130 (3.30)
0.128 (3.25)
SEATING PLANE
24
1
1.228 (31.19)
1.226 (31.14)
0.11 (2.79)
0.09 (2.28)
NOTES
1. LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH
2. PLASTIC LEADS WILL BE EITHER SOLDER DIPPED OR TIN PLATED IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
24-Lead Plastic DIP
(N-24A)
0.065 (1.66)
0.045 (1.15)
13
12
SEATING PLANE
0.55 (13.97)
0.53 (13.47)
0.16 (4.07)
0.14 (3.56)
24
1
0.02 (0.508)
0.015 (0.381)
1.25 (31.75)
1.24 (31.5)
0.105 (2.67)
0.095 (2.42)
0.32 (8.128)
0.30 (7.62)
15
0
0.606 (15.4)
0.594 (15.09)
15ⴗ
0ⴗ
ⴗ
0.011 (0.28)
0.009 (0.23)
0.012 (0.305)
0.008 (0.203)
PIN 1
0.225
(5.715)
MAX
0.125
(3.175)
PIN 1
MIN
24-Lead Cerdip
(Q-24)
24
1
1.290 (32.77) MAX
0.021 (0.533)
0.015 (0.381)
0.110 (2.794)
0.090 (2.286)
TYP
TYP
NOTES
1. LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH.
2. CERDIP LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
0.065 (1.651)
0.055 (1.397) TYP
13
0.295 (7.493) MAX
12
0.070 (1.778)
0.020 (0.508)
24-Lead SOIC
(R-24)
24
0.608 (15.45)
0.596 (15.13)
13
121
0.299 (7.6)
0.291 (7.39)
0.414 (10.52)
0.398 (10.10)
0.096 (2.44)
0.089 (2.26)
0.180 (4.572) MAX
SEATING PLANE
0.320 (8.128)
0.290 (7.366)
15
ⴗ
0
ⴗ
0.03 (0.76)
0.02 (0.51)
0.012 (0.305)
0.008 (0.203) TYP
24
PIN 1
1
0.008 (0.203)
0.002 (0.050)
0.01 (0.254)
0.006 (0.15)
0.05 (1.27)
NOTES
1. LEAD NO. 1 IDENTIFIED BY A DOT.
2. SOIC LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
24-Lead SSOP
(RS-24)
13
0.212 (5.38)
0.205 (5.207)
0.311 (7.9)
0.301 (7.64)
12
0.328 (8.33)
0.318 (8.08)
0.0256 (0.65) BSC
NOTES
1. LEAD NO. 1 IDENTIFIED BY A DOT.
2. LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
0.07 (1.78)
0.066 (1.67)
0.009 (0.229)
0.005 (0.127)
8ⴗ 0ⴗ
BSC
0.037 (0.94)
0.022 (0.559)
0.019 (0.49)
0.014 (0.35)
0.013 (0.32)
0.009 (0.23)
0.042 (1.067)
6ⴗ 0ⴗ
0.018 (0.447)
REV. A
–11–
ADM205–ADM211/ADM213
PIN 1
1
28-Lead SOIC
(R-28)
1528
0.299 (7.6)
0.291 (7.39)
14
0.414 (10.52)
0.398 (10.10)
0.01 (0.254)
0.006 (0.15)
PIN 1
0.008 (0.203)
0.002 (0.050)
0.708 (18.02)
0.696 (17.67)
0.05 (1.27) BSC
NOTES
1. LEAD NO. 1 IDENTIFIED BY A DOT.
2. SOIC LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
0.019 (0.49)
0.014 (0.35)
0.096 (2.44)
0.089 (2.26)
28-Lead SSOP
(RS-28)
28
1
0.407 (10.34)
0.397 (10.08)
0.0256 (0.65) BSC
NOTES
1. LEAD NO. 1 IDENTIFIED BY A DOT.
2. LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
15
0.212 (5.38)
0.205 (5.207)
14
0.066 (1.67)
0.009 (0.229)
0.005 (0.127)
0.07 (1.78)
0.013 (0.32)
0.009 (0.23)
0.311 (7.9)
0.301 (7.64)
8
ⴗ
0
ⴗ
6
ⴗ
0
ⴗ
0.03 (0.76)
0.02 (0.51)
0.042 (1.067)
0.018 (0.457)
0.037 (0.94)
0.022 (0.559)
C00067–0–4/01(A)
ADM205–ADM211/ADM213–Revision History
Location Page
Data Sheet changed from REV. 0 to REV. A.
Updated Figures.
Changes to numbers in Min/Typ/Max column of Specification page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
–12–
REV. A
PRINTED IN U.S.A.
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