Analog Devices ADM202E 1181A c Datasheet
EMI/EMC-Compliant, ±15 kV, ESD-Protected
O
O
FEATURES
Complies with 89/336/EEC EMC directive
ESD protection to IEC1000-4-2 (801.2)
±8 kV: contact discharge
±15 kV: air-gap discharge
±15 kV: human body model
EFT fast transient/burst immunity (IEC1000-4-4)
Low EMI emissions (EN55022)
230 kbits/s data rate guaranteed
TSSOP package option
Upgrade for MAX202E, 232E, LT1181A
APPLICATIONS
General-purpose RS-232 data link
Portable instruments
PDAs
GENERAL DESCRIPTION
The ADM202E and ADM1181A are robust, high speed,
2-channel RS-232/V.28 interface devices that operate from a
single 5 V power supply. Both products are suitable for operation
in harsh electrical environments and are compliant with the EU
directive on EMC (89/336/EEC). Both the level of electromagnetic
emissions and immunity are in compliance. EM immunity
includes ESD protection in excess of ±15 kV on all I/O lines,
fast transient/burst protection (1000-4-4), and radiated
immunity (1000-4-3). EM emissions include radiated and
conducted emissions as required by Information Technology
Equipment EN55022, CISPR22.
The ADM202E and ADM1181A conform to the EIA-232E
and CCITT V.28 specifications and operate at data rates up
to 230 kbps.
RS-232 Line Drivers/Receivers
ADM202E/ADM1181A
FUNCTIONAL BLOCK DIAGRAMS
+5V TO +10V
OUT
OUT
OUT
OUT
C1+
VOLTAGE
C1–
DOUBLER
+10V TO –10V
C2+
VOLTAGE
C2–
INVERTER
GND
T1
T2
R1
R2
ADM202E
IN
IN
Figure 1.
+5V TO +10V
C1+
VOLTAGE
C1–
DOUBLER
+10V TO –10V
C2+
VOLTAGE
C2–
INVERTER
IN
IN
T1
T2
GND
R1
R2
ADM1181A
Figure 2.
0.1µF
10V
0.1µF
10V
CMOS
INPUTS
CMOS
UTPUTS
CMOS
INPUTS
CMOS
UTPUTS
T1
T2
R1
R2
*
INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
0.1µF
10V
0.1µF
10V
T1
T2
R1
R2
*
INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
The ADM202E provides a robust pin-compatible upgrade for
existing ADM202, ADM232L, or MAX202E/MAX232E sockets.
It is available in a 16-lead PDIP, a wide SOIC, a narrow SOIC,
and a space-saving TSSOP package that is 44% smaller than the
SOIC package.
V
V
CC
V+
V–
CC
V+
V–
5V INPUT
T1
T2
R1
R2
5V INPUT
T1
T2
R1
R2
C3
0.1µF
6.3V
C4
0.1µF
10V
OUT
OUT
IN
IN
C4
0.1µF
10V
OUT
OUT
IN
IN
EIA/TIA-232
OUTPUTS
EIA/TIA-232
INPUTS
C3
0.1µF
10V
EIA/TIA-232
OUTPUTS
EIA/TIA-232
INPUTS
C5
0.1µF
*
C5
0.1µF
10V
*
00066-001
00066-002
Four external 0.1 µF charge-pump capacitors are used for the
voltage doubler/inverter, permitting operation from a single
5 V supply.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
The ADM1181A provides a robust pin-compatible upgrade for
the LTC1181A, and it is available in a 16-lead PDIP package
and a wide 16-lead SOIC package.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.326.8703 © 2005 Analog Devices, Inc. All rights reserved.
ADM202E/ADM1181A
TABLE OF CONTENTS
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
General Description ......................................................................... 6
Circuit Description....................................................................... 6
Charge-Pump DC-to-DC Voltage Converter....................... 6
Transmitter (Driver) Section .................................................. 6
Receiver Section ....................................................................... 6
High Baud Rate............................................................................. 6
ESD/EFT Transient Protection Scheme .................................... 7
REVISION HISTORY
2/05—Rev. B to Rev. C.
Updated Format..................................................................Universal
Changed Hysteresis Level..................................................Universal
Change to Specifications.................................................................. 3
Added ESD Caution......................................................................... 4
Change to Receiver Section............................................................. 6
Updated Outline Dimensions....................................................... 14
Changes to Ordering Guide.......................................................... 15
Typical Performance Characteristics..............................................8
ESD Testing (IEC1000-4-2) ...................................................... 10
Fast Transient/Burst Testing (IEC1000-4-4)........................... 11
IEC1000-4-3 Radiated Immunity ............................................ 12
Emissions/Interference.............................................................. 12
Conducted Emissions ................................................................ 12
Radiated Emissions.................................................................... 13
Outline Dimensions....................................................................... 14
Ordering Guide .......................................................................... 15
2/01—Rev. A to Rev. B.
Deletion of one ESD Rating in
ABSOLUTE MAXIMUM RATINGS............................................. 4
Removal of one column in Table II ................................................ 8
Rev. C | Page 2 of 16
ADM202E/ADM1181A
SPECIFICATIONS
VCC = 5.0 V ± 10%, C1 to C4 = 0.1 µF. All specifications T
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
DC CHARACTERISTICS
Operating Voltage Range 4.5 5.0 5.5 V
VCC Power Supply Current 2.5 6.0 mA No load
13 18 mA RL = 3 kΩ to GND
LOGIC
Input Logic Threshold Low, V
Input Logic Threshold High, V
0.8 V TIN
INL
2.4 V TIN
INH
CMOS Output Voltage Low, VOL 0.4 V I
CMOS Output Voltage High, VOH 3.5 V I
Logic Pull-Up Current +12 ±25 µA TIN = 0 V
RS-232 RECEIVER
EIA-232 Input Voltage Range −30 +30 V
EIA-232 Input Threshold Low 0.4 1.2 V
EIA-232 Input Threshold High 1.6 2.4 V
EIA-232 Input Hysteresis 0.65 V
EIA-232 Input Resistance 3 5 7 kΩ TA = 0°C to 85°C
RS-232 TRANSMITTER
Output Voltage Swing ±5.0 ±9.0 V
Transmitter Output Resistance 300 Ω VCC = 0 V, V
RS-232 Output Short-Circuit Current ±10 ±60 mA
TIMING CHARACTERISTICS
Maximum Data Rate 230
Receiver Propagation Delay
T
0.1 1 µs
PHL
T
0.3 1 µs
PLH
Transmitter Propagation Delay 1.0 1.5 µs RL = 3 kΩ, CL = 1000 pF
Transition Region Slew Rate 3 8 30 V/µs RL = 3 kΩ, CL = 1000 pF
Measured from +3 V to −3 V, or −3 V to +3 V
EM IMMUNITY
ESD Protection (I/O Pins) ±15 kV Human body model
±15 kV IEC1000-4-2 air discharge
±8 kV kV IEC1000-4-2 contact discharge
EFT Protection (I/O Pins) ±2 kV IEC1000-4-4
EMI Immunity 10 V/m IEC1000-4-3
MIN
to T
, unless otherwise noted.
MAX
= 3.2 mA
OUT
= −1 mA
OUT
All transmitter outputs loaded with 3 kΩ to
ground
= ±2 V
OUT
kbps RL = 3 kΩ to 7 kΩ, CL = 50 pF to 1000 pF
Rev. C | Page 3 of 16
ADM202E/ADM1181A
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 2.
Parameter Values
V
CC
V+ (VCC − 0.3 V) to +14 V
V– +0.3 V to −14 V
Input Voltages
T
IN
R
IN
Output Voltages
T
OUT
R
OUT
Short-Circuit Duration
T
OUT
Power Dissipation N-16 450 mW
(Derate 6 mW/°C Above 50°C)
θJA, Thermal Impedance 117°C/W
Power Dissipation R-16 450 mW
(Derate 6 mW/°C Above 50°C)
θJA, Thermal Impedance 158°C/W
Power Dissipation RU-16 500 mW
(Derate 6 mW/°C Above 50°C)
θJA, Thermal Impedance 158°C/W
Operating Temperature Range
Industrial (A Version) –40°C to +85°C
Storage Temperature Range –65°C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
ESD Rating (MIL-STD-883B) (I/O Pins) ±15 kV
ESD Rating (IEC1000-4-2 Air) (I/O Pins) ±15 kV
ESD Rating (IEC1000-4-2 Contact)
(I/O Pins)
EFT Rating (IEC1000-4-4) (I/O Pins) ±2 kV
−0.3 V to +6 V
0.3 V to (V+, +0.3 V)
±30 V
±15 V
–0.3 V to (VCC + 0.3 V)
Continuous
±8 kV
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may
affect device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. C | Page 4 of 16
ADM202E/ADM1181A
O
O
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
T2
C1+
V+
C1–
C2+
C2–
V–
OUT
R2
1
2
3
4
5
6
7
IN
ADM202E
ADM1181A
TOP VIEW
(Not to Scale)
V
16
CC
15
GND
14
T1
OUT
R1
13
IN
12
R1
OUT
T1
11
IN
T2
10
IN
R2
98
OUT
00066-003
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
16 VCC Power Supply Input: 5 V ± 10%.
2 V+ Internally Generated Positive Supply (+9 V nominal).
6 V− Internally Generated Negative Supply (−9 V nominal).
15 GND Ground Pin. Must be connected to 0 V.
1, 3 C1+, C1−
External Capacitor 1 is connected between these pins. A 0.1 µF capacitor is recommended, but larger
capacitors of up to 47 µF can be used.
4, 5 C2+, C2−
External Capacitor 2 is connected between these pins. A 0.1 µF capacitor is recommended, but larger
capacitors of up to 47 µF can be used.
10, 11 TIN Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels.
7, 14 T
8, 13 RIN
Transmitter (Driver) Outputs. These are RS-232 signal levels (typically ±9 V).
OUT
Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kΩ pull-down resistor to GND is
connected on each input.
9, 12 R
Receiver Outputs. These are CMOS output logic levels.
OUT
+5V TO +10V
1
0.1µF
10V
0.1µF
10V
CMOS
INPUTS
CMOS
UTPUTS
T1
T2
R1
OUT
R2
OUT
*
INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
C1+
VOLTAGE
3
C1–
DOUBLER
+10V TO –10V
4
C2+
VOLTAGE
5
C2–
INVERTER
11
IN
IN
T1
T2
10
12
9
GND
15
R1
R2
ADM202E
V
CC
V+
V–
Figure 4. ADM202E Typical Operating Circuit
5V INPUT
16
2
6
14
7
13
8
C4
0.1µF
10V
T1
T2
R1
R2
C3
0.1µF
6.3V
OUT
OUT
IN
IN
C5
0.1µF
EIA/TIA-232
OUTPUTS
EIA/TIA-232
INPUTS
*
00066-004
5V INPUT
+5V TO +10V
1
OUT
OUT
C1+
VOLTAGE
3
C1–
DOUBLER
+10V TO –10V
4
C2+
VOLTAGE
5
C2–
INVERTER
T1
11
IN
T2
10
IN
12
9
GND
15
R1
R2
ADM1181A
0.1µF
10V
0.1µF
10V
CMOS
INPUTS
CMOS
UTPUTS
T1
T2
R1
R2
*
INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
16
V
CC
2
V+
6
V–
C4
0.1µF
10V
14
T1
OUT
7
T2
OUT
13
R1
IN
8
R2
IN
C3
0.1µF
10V
EIA/TIA-232
OUTPUTS
EIA/TIA-232
INPUTS
C5
0.1µF
10V
*
00066-005
Figure 5. ADM1181A Typical Operating Circuit
Rev. C | Page 5 of 16
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