Controls supply rails from 2.7 V to 16.5 V
Allows protected board removal and insertion to a live
backplane
External sense resistor provides adjustable analog current
limit with circuit breaker
Peak fault current limited with fast response
Charge pumped gate drive for external N-FET switch
Power-fail comparator
Automatic retry or latch-off during current fault
Undervoltage lockout
8-lead, TSOT package
APPLICATIONS
Hot swap board insertion: line cards, raid systems
Industrial high-side switches/circuit breakers
Electronic circuit breakers
The ADM1172 is a hot swap controller that safely enables a
printed circuit board to be removed and inserted to a live
backplane. This is achieved using an external N-channel power
MOSFET with a current control loop that monitors the load
current through a sense resistor. An internal charge pump is
used to enhance the gate of the N-channel FET. When an overcurrent condition is detected, the gate voltage of the FET is
reduced to limit the current flowing through the sense resistor.
During an overcurrent condition, the TIMER pin capacitor
determines the amount of time the FET remains at a current
limiting mode of operation until it is shut down. The ON
CLR
(ON-
) pin is the enable input for the device and can be
used to monitor the input supply voltage. The ADM1172
operates with a supply voltage ranging from 2.7 V to 16.5 V.
The ADM1172 also features a power-fail comparator. The
voltage on the PFI pin is compared with an internal 0.6 V
reference, and the output of this comparator is presented on
the PFO pin. This device is available in two options: the
ADM1172-1 with automatic retry for overcurrent fault and the
ADM1172-2 with latch-off for an overcurrent fault. Toggling
the ON (ON-
CLR
) pin resets a latched fault. The ADM1172 is
packaged in an 8-lead TSOT.
ADM1172
FUNCTIONAL BLOCK DIAGRAM
= 5VV
IN
GNDGND
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
VCC = 2.7 V to 16.5 V, TA = −40°C to +85°C, typical values at TA = 25°C, unless otherwise noted.
Table 1.
Parameter Symbol Min Typ Max Unit Conditions
VCC PIN
Operating Voltage Range VCC 2.7 16.5 V
Supply Current ICC 0.65 0.8 mA
Undervoltage Lockout V
Undervoltage Lockout Hysteresis V
ON (ON-CLR) PIN
Input Current
Threshold VON 1.22 1.3 1.38 V ON rising
Threshold Hysteresis V
SENSE PIN
Hot Swap Operating Range 2.7 16.5 V
Input Current
Circuit Breaker Limit Voltage VCB 44 50 56 mV VCB = (VCC – V
GATE PIN
Drive Voltage V
6.0 8 12 V V
8.75 10 12 V V
7.5 9 12 V V
5.56 8 12 V V
Pull-Up Current −6.5 −12 −14.5 A V
Pull-Down Current 4 mA
Pull-Down Current
TIMER PIN
Pull-Up Current I
−25 −60 −100 µA During current fault, V
Pull-Down Current I
100 µA Normal operation, V
Threshold High V
Threshold Low V
PFI PIN
Threshold Rising 0.58 0.6 0.62 V
Threshold Hysteresis 10 mV
Input Current −1 0 +1 µA
PFO PIN
Pull-Up Current −5 µA
Output Low Voltage 0.4 V I
t
OFF
Turn-Off Time (TIMER Rise to GATE Fall) 2 µs V
Turn-Off Time (ON Fall to GATE Fall) 40 µs VON = 5 V to 0 V step, VCC = 5 V
Turn-Off Time (VCC Fall to IC Reset) 40 µs VCC = 5 V to 2 V step, VON = 5 V
2.4 2.525 2.65 V VCC rising
UVLO
40 mV
UVLOHYS
I
−1 0 +1 µA
INON
50 mV
ONHYST
I
5 10 15 µA
INSENSE
4.6 7.5 10 V V
GATE
25 mA V
− VCC, VCC = 3.0 V
GATE
− VCC, VCC = 3.3 V
GATE
− VCC, VCC = 5 V
GATE
− VCC, VCC = 12 V
GATE
− VCC, VCC = 15 V
GATE
= 0 V
GATE
= 3 V, VCC = 5 V, ON (ON-CLR) = low
V
GATE
= 3 V, VCC < UVLO
GATE
−2 −5 −8.5 µA Initial cycle, V
TIMERUP
2 3.5 µA After Cct breaker tip, V
TIMERDN
1.22 1.3 1.38 V TIMER rising
TIMERH
0.15 0.2 0.25 V TIMER falling
TIMERL
= 200 µA
LOAD
= 0 V to 2 V step, VCC = VON = 5 V
TIMER
SENSE
TIMER
)
= 1 V
TIMER
TIMER
TIMER
= 1 V
= 1 V
= 1 V
Rev. 0 | Page 3 of 16
ADM1172
www.BDTIC.com/ADI
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
VCC Pin −0.3 V to +20 V
SENSE Pin −0.3 V to +20 V
VCC − SENSE ±5 V
TIMER Pin −0.3 V to (VCC + 0.3 V)
ON (ON-CLR
PFI Pin −0.3 V to +20 V
PFO Pin −0.3 V to +20 V
GATE Pin −0.3 V to (VCC + 11 V)
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +85°C
Lead Temperature (10 sec) 300°C
Junction Temperature 150°C
) Pin
−0.3 V to +20 V
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL CHARACTERISTICS
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type θ
8-Lead TSOT 152.9 °C/W
Unit
JA
Rev. 0 | Page 4 of 16
ADM1172
A
www.BDTIC.com/ADI
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
ADM1172-1AUJ
TIMER
GND
PFO
ON
1
2
TOP VIEW
(Not to Scale)
3
4
8
7
6
5
V
CC
SENSE
PFI
GATE
Figure 2. Pin Configuration, 1AUJ Model Figure 3. Pin Configuration, 2AUJ Model
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 TIMER
Timer Input Pin. The initial and circuit breaker timing cycles a
delay is 272.9 ms/F, and 21.7 ms/µF for a circuit breaker delay. When the TIMER pin is pulled beyond the upper