FEATURES
Allows Safe Board Insertion and Removal from a Live
–48 V Backplane
Typically Operates from –36 V to –80 V
Tolerates Transients up to –200 V (Limited by External
Components)
Accurate Programmable Linear Current Limit for
In-Rush Control and Short Circuit Protection
Programmable Timeout in Current Limit
Limited Consecutive Retry:
Auto-Restart after Current Limit Timeout
Shutdown after Seven Consecutive Auto Restarts
Provides Immunity from Step Induced Current Spikes
Default Timing Provided with no TIMER Capacitor
Single Pin Undervoltage/Overvoltage Detection
Programmable Operating Voltage Window
Programmable Undervoltage/Overvoltage Time Filter
Small 6-Lead SOT-23 Package
APPLICATIONS
Central Office Switching
–48 V Distributed Power Systems
Negative Power Supply Control
Hot Board Insertion
Electronic Circuit Breaker
High Availability Servers
Programmable Current Limiting Circuit
–48 V Power Supply Modules
0V
V
DD
R1
R2
–48V
V
EE
FUNCTIONAL BLOCK DIAGRAM
16k⍀
R
DROP
V
IN
VCC AND
REFERENCE
GENERATOR
100mV
ADM1070
UV/OV
TIMER
()*
12V
OVER-UNDER
VOLTAGE DETECTION
CIRCUIT
FAULT TIMER AND
CONTROL
OSCILLATOR
*OPTIONAL TIMER CAPACITOR
EN
C
V
CC
V
REF
V
IN
45A
GATE
SENSE
V
EE
LOAD
Q1
R
SENSE
V
OUT
GENERAL DESCRIPTION
The ADM1070 is a negative voltage hot swap controller that
allows a board to be safely inserted and removed from a live
–48 V backplane. The part achieves this by providing robust
current limiting, protection against transient and nontransient
short circuits and overvoltage and undervoltage conditions. The
ADM1070 typically operates from a negative voltage of up to
–80 V and can tolerate transient voltages of up to –200 V.
In-rush current is limited to a programmable value by controlling the gate drive of an external N-channel FET. The current
limit can be controlled by the choice of the sense resistor,
R
. Added control of the in-rush current is provided by an
SENSE
on-chip timer that uses pulsewidth modulation to allow the
maximum current to flow for only 3% of the time. An autorestart
occurs after a current limit timeout. After seven successive
autorestarts, the fault will be latched and the part goes into
shutdown with the result that the external FET is disabled until
the power is reset.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
The ADM1070 also features single-pin undervoltage and overvoltage detection. The FET is turned off if a nontransient
voltage less than the undervoltage threshold, typically –36 V, or
greater than the overvoltage threshold, typically –77 V, is detected
on the UV/OV Pin. The operating voltage window of the
ADM1070 is programmable and is determined by the ratio R1/R2.
Time filtering on the undervoltage and overvoltage detection
and current limiting is programmable via the TIMER Pin. An
external capacitor connected between the TIMER Pin and V
EE
determines the undervoltage/overvoltage time filter and the
timeout in current limit. If the pin is tied to V
, the time filter
EE
values and the current limit timeout revert to default figures.
The ADM1070 is fabricated using BiCMOS technology for minimal power consumption. The part is available in a small
6-Lead SOT-23 package.
Storage Temperature Range . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C
*This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods of time may affect reliability.
ORDERING GUIDE
TemperaturePackagePackage
ModelRangeDescriptionOption
ADM1070ART–40ºC to +85ºC6-LeadRT-6
THERMAL CHARACTERISTICS
6-Lead SOT-23 Package:
= 226.6°C/W, JC = 91.99°C/W
JA
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADM1070 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
REV. 0
–3–
ADM1070
PIN CONFIGURATION
SENSE
V
EE
V
1
ADM1070ART
2
3
IN
TOP VIEW
(Not to Scale)
6
5
4
GATE
UV/OV
TIMER
PIN FUNCTION DESCRIPTION
Pin No.MnemonicFunction
1SENSEConnection to External FET Source Voltage. A sense resistor is connected in the supply path
between the SENSE Pin and V
, and the voltage across this resistor is monitored to detect current
EE
faults. This voltage is fed as an input to the linear current regulator. When it reaches 100 mV for
a specified period, t
, the regulator reduces the gate voltage and drives the FET as a linear pass
ON
device. If current monitoring is not required, this feature can be turned off by shorting the
SENSE Pin and VEE together.
2V
EE
Device Negative Supply Voltage. This pin should be connected to the lower potential of the
power supply.
3V
IN
Shunt Regulated On-Chip Supply, Nominally V
EE
+ 12.3 V. This pin should be current fed
through a dropper resistor that is connected to the higher potential of the power supply inputs.
4TIMER
Allows User Control over Timing Functions by Determining Frequency of Oscillator. Frequency set by connecting external capacitor to VEE. Tying pin directly to VEE causes oscillator to
default to internally set value.
5UV/OVInput Pin for Overvoltage and Undervoltage Detection Circuitry. The voltage appearing on the
UV/OV Pin is proportional to board supply and is determined by external resistors. When the
voltage on UV/OV falls below the undervoltage threshold of 0.86 V, the GATE Pin is driven low.
When the voltage appearing at the UV/OV Pin rises above the overvoltage threshold of 1.97 V,
the GATE Pin is also driven low. If the external resistor ratio of R1/R2 = 40 is used, then this
gives an operating range of –36 V to –77 V.
6GATEOutput to External FET Gate Drive. Controlled by linear current regulator. The gate is driven
low if an overvoltage or undervoltage fault occurs or if a current fault lasts for longer than the
time, t
. When in linear regulation, the GATE Pin voltage is controlled as part of the servo loop.
ON
No external compensation is required. When the FET is fully enhanced and the load capacitance
has been charged, the GATE Pin reaches a high level of typically 12 V.
REV. 0–4–
2.0
TEMPERATURE – ⴗC
–45
V
Z
– V
14.5
14.0
13.5
13.0
12.5
12.0
11.5
11.0
–35 –25 –15 –5 5 15 25 35 45 55 65 75 85
1.8
1.6
1.4
1.2
1.0
– mA
IN
I
0.8
0.6
0.4
0.2
0
–50 –35
Typical Performance Characteristics–
–20–51025405570
TEMPERATURE – ⴗC
ADM1070
85
1000
100
– mA
IN
I
10
1
0.1
10
9
8
TPC 1. IIN vs. Temperature
+85ⴗC
+25ⴗC
02
468101214
VIN – V
TPC 2. IIN vs. V
TPC 4. VZ vs. Temperature
12
11
10
– V
9
LKO
V
8
–40ⴗC
16
IN
7
6
–50
–35 –20–5102540557085
TEMPERATURE – ⴗC
TPC 5. Undervoltage Lockout, V
100
95
90
vs. Temperature
LKO
RISING
7
– V
6
Z
R
5
4
REV. 0
3
2
–45
–35 –25 –15 –5 5 15 25 35 45 55 65 75 85
TPC 3. RZ vs. Temperature
TEMPERATURE – ⴗC
–5–
85
– mV
80
CB
V
75
70
65
60
–35 –20–5102540557085
–50
TEMPERATURE – ⴗC
FALLING
TPC 6. Circuit Breaker Current Limit Voltage,
vs. Temperature
V
CB
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