Analog Devices ADM1070 Datasheet

a
–48 V Hot Swap Controller
ADM1070
FEATURES Allows Safe Board Insertion and Removal from a Live
–48 V Backplane Typically Operates from –36 V to –80 V Tolerates Transients up to –200 V (Limited by External
Components) Accurate Programmable Linear Current Limit for
In-Rush Control and Short Circuit Protection Programmable Timeout in Current Limit Limited Consecutive Retry:
Auto-Restart after Current Limit Timeout
Shutdown after Seven Consecutive Auto Restarts
Provides Immunity from Step Induced Current Spikes Default Timing Provided with no TIMER Capacitor Single Pin Undervoltage/Overvoltage Detection Programmable Operating Voltage Window Programmable Undervoltage/Overvoltage Time Filter Small 6-Lead SOT-23 Package
APPLICATIONS Central Office Switching –48 V Distributed Power Systems Negative Power Supply Control Hot Board Insertion Electronic Circuit Breaker High Availability Servers Programmable Current Limiting Circuit –48 V Power Supply Modules
0V
V
DD
R1
R2
–48V
V
EE

FUNCTIONAL BLOCK DIAGRAM

16k
R
DROP
V
IN
VCC AND REFERENCE GENERATOR
100mV
ADM1070
UV/OV
TIMER
()*
12V
OVER-UNDER
VOLTAGE DETECTION
CIRCUIT
FAULT TIMER AND
CONTROL
OSCILLATOR
*OPTIONAL TIMER CAPACITOR
EN
C
V
CC
V
REF
V
IN
45A
GATE
SENSE
V
EE
LOAD
Q1
R
SENSE
V
OUT

GENERAL DESCRIPTION

The ADM1070 is a negative voltage hot swap controller that allows a board to be safely inserted and removed from a live –48 V backplane. The part achieves this by providing robust current limiting, protection against transient and nontransient short circuits and overvoltage and undervoltage conditions. The ADM1070 typically operates from a negative voltage of up to –80 V and can tolerate transient voltages of up to –200 V.
In-rush current is limited to a programmable value by control­ling the gate drive of an external N-channel FET. The current limit can be controlled by the choice of the sense resistor, R
. Added control of the in-rush current is provided by an
SENSE
on-chip timer that uses pulsewidth modulation to allow the maximum current to flow for only 3% of the time. An autorestart occurs after a current limit timeout. After seven successive autorestarts, the fault will be latched and the part goes into shutdown with the result that the external FET is disabled until the power is reset.
REV. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
The ADM1070 also features single-pin undervoltage and over­voltage detection. The FET is turned off if a nontransient voltage less than the undervoltage threshold, typically –36 V, or greater than the overvoltage threshold, typically –77 V, is detected on the UV/OV Pin. The operating voltage window of the ADM1070 is programmable and is determined by the ratio R1/R2.
Time filtering on the undervoltage and overvoltage detection and current limiting is programmable via the TIMER Pin. An external capacitor connected between the TIMER Pin and V
EE
determines the undervoltage/overvoltage time filter and the timeout in current limit. If the pin is tied to V
, the time filter
EE
values and the current limit timeout revert to default figures.
The ADM1070 is fabricated using BiCMOS technology for mini­mal power consumption. The part is available in a small 6-Lead SOT-23 package.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002
ADM1070–SPECIFICATIONS
(VDD = 0 V, VEE = –48 V, R wise noted.)
= 16 k, TA = –40C to +85C, unless other-
DROP
Parameter Min Typ Max Unit Test Conditions
BOARD SUPPLY (not connected directly to device)
Maximum Voltage Range –200 –48 –20 V Limited by Voltage Capability of
External Components*
Typical Operating Voltage Range –77 –48 –36 V R
= 16 k, R1/R2 = 40*
DROP
VIN PIN––SHUNT REGULATOR
Operating Supply Voltage Range, V Quiescent Supply Current, I Maximum Shunt Supply Voltage, V Undervoltage Lockout, V
LKO
SS
SS
SS
11.5 12.3 13 V ISS = 1.5 mA to 4.25 mA
0.4 0.85 1.3 mA VSS = 11.5 V
12.5 14 V ISS = 20 mA
7 8.5 10.5 V
UV/OV PIN––UNDERVOLTAGE AND OVERVOLTAGE DETECTION
Undervoltage Falling Threshold, V Undervoltage Rising Threshold, V Undervoltage Hysteresis, V
UVH
Overvoltage Falling Threshold, V Overvoltage Rising Threshold, V Overvoltage Hysteresis V Power-On Reset Delay, t
Voltage Fault Filter Time (UV/OV Out of
Voltage
Input Current, I
Window), t
VMON
OVH
POR
FLT
UVF
UVR
OVF
OVR
0.81 0.86 0.91 V
0.86 0.91 0.96 V 45 mV
1.85 1.93 2.01 V
1.89 1.97 2.05 V –45 mV
1.10 1.70 2.30 ms TIMER Pin Tied to V
(V
< UV/OV < V
0.90 1.21 1.51 ms C
UVR
= 470 pF
TIMER
(V
< UV/OV < V
UVR
OVF
OVF
1.10 1.70 2.30 ms TIMER Pin Tied to V
(V
< UV/OV < V
0.90 1.21 1.51 ms C
UVR
= 470 pF
TIMER
< UV/OV < V
(V
UVR
OVF
OVF
1.0 µA
EE
)
)
EE
)
)*
GATE PIN––FET DRIVER
Maximum Gate Voltage, V Minimum Gate Voltage, V Pull-Up Current, I
GUP
Pull-Down Current, I Hold-off Impedance, R
GMAX
GMIN
GDP
GOFF
11 12 13 V I 050mVI –20 –40 –55 µAV 10 30 mA V
10 k V 30 k V
= –1 µA
GATE
= 1 µA
GATE
= 0 V to 9 V, V
GATE
= V
GATE
GATE
GATE
SS
< 2 V, VSS > 11 V < 2 V, VSS > 2 V
SENSE
= 0
SENSE PIN––CURRENT SENSE
Analog Current Limit Voltage (Rising),V
LIM
90 100 110 mV I
= 0 µA to –15 µA
GATE
Circuit Breaker Limit Voltage (Rising) 75 88 100 mV Circuit Breaker Limit Voltage (Rising) –12 mV (With Respect to V
LIM
), V
LIMITON
Circuit Breaker Limit Voltage (Falling) 60 79 95 mV Circuit Breaker Limit Voltage (Falling) –21 mV (With Respect to V
LIM
), V
LIMITOFF
Fast Current Limit Voltage 107 126 145 mV Fast Current Limit Voltage 26 mV (With Respect to V Control Loop Transconductance, 1.5 2.75 4 µA/mV I
/dV
(dI
GATE
SENSE
Maximum Current Limit On Time, t
Current Limit PWM Off Time 320 450 580 ms TIMER Pin Tied to V
)
LIM
< 30 µA, TA = 25°C
GATE
)
LIMITON
10 14 18 ms TIMER Pin Tied to V
(V
< UV/OV < V
7.4 9.9 12.4 ms C
240 320 400 ms C
UVR
= 470 pF
TIMER
(V
< UV/OV < V
UVR
(V
< UV/OV < V
UVR
= 470 pF
TIMER
(V
< UV/OV < V
UVR
OVF
OVF
OVF
OVF
EE
)
)*
EE
)*
)*
Current Limit PWM Duty Cycle 3 % (Typical Only) Number of Consecutive PWM Retry Cycles 7 (Typical Only)
REV. 0–2–
Parameter Min Typ Max Unit Test Conditions
WARNING!
ESD SENSITIVE DEVICE
SENSE PIN––CURRENT SENSE (continued)
Continuous Short Circuit Time before Latched 2100 2800 3500 ms TIMER Pin Tied to V
Shutdown, t
SHORT
Operating Sense Voltage Range, V Input Current, I
TIMER PIN
SENSE
––
TIMING CONTROL
SOP
1500 2000 2500 ms C
0 0.11 V –500 +500 µAV
(V
< UV/OV < V
UVR
= 470 pF
TIMER
(V
< UV/OV < V
UVR
= –2 V to +2 V
SENSE
Internal Oscillator Default Frequency, 9.0 kHz TIMER Pin Tied to V
f
TIMERINT
External/Internal Selection Threshold, V High Trip Threshold, V Low Trip Threshold, V Pull-Down Current, I Pull-Up Current, I Start-Up Current, I
*Not production tested. Guaranteed by design.
Specifications subject to change without notice.
(Not Seen at Pin)
TIMERTHH
TIMERTHL
TIMERDN
TIMERUP
TIMERSTART
TIMERTHEI
0.3 0.45 0.6 V
3.0 3.5 4.0 V
1.2 1.5 1.8 V 15 24 31 µAV –15 –24 –31 µAV –12 –19 –26 µAV
TIMER
TIMERTHEI
< V
TIMER
> V
TIMERTHH
< V
TIMERTHEI
TIMER
ADM1070
EE
)
OVF
)*
OVF
EE
< V
TIMERTHL

ABSOLUTE MAXIMUM RATINGS*

(All voltages referred to VEE, unless otherwise noted. TA = 25°C, unless other-
wise noted.)
Supply Voltage (VDD–VEE) . . . . . . . . . . . . . –0.3 V to –200.0 V
Maximum Shunt Supply Voltage, V
. . . . . . . . . . . . . . . 16 V
SS
SENSE Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . –2 V to +16 V
GATE Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +16 V
UV/OV Pin . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +15 V
TIMER Pin . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +10 V
Maximum Junction Temperature . . . . . . . . . . . . . . . . . 125°C
Temperature Range . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Continuous Power Dissipation . . . . . . . . . . . . . . . . . 282 mW
Storage Temperature Range . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C
*This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operation sections of this specifica­tion is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.

ORDERING GUIDE

Temperature Package Package
Model Range Description Option
ADM1070ART –40ºC to +85ºC 6-Lead RT-6

THERMAL CHARACTERISTICS

6-Lead SOT-23 Package:
= 226.6°C/W, JC = 91.99°C/W
JA
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADM1070 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
REV. 0
–3–
ADM1070

PIN CONFIGURATION

SENSE
V
EE
V
1
ADM1070ART
2
3
IN
TOP VIEW
(Not to Scale)
6
5
4
GATE
UV/OV
TIMER

PIN FUNCTION DESCRIPTION

Pin No. Mnemonic Function
1 SENSE Connection to External FET Source Voltage. A sense resistor is connected in the supply path
between the SENSE Pin and V
, and the voltage across this resistor is monitored to detect current
EE
faults. This voltage is fed as an input to the linear current regulator. When it reaches 100 mV for a specified period, t
, the regulator reduces the gate voltage and drives the FET as a linear pass
ON
device. If current monitoring is not required, this feature can be turned off by shorting the SENSE Pin and VEE together.
2V
EE
Device Negative Supply Voltage. This pin should be connected to the lower potential of the power supply.
3V
IN
Shunt Regulated On-Chip Supply, Nominally V
EE
+ 12.3 V. This pin should be current fed
through a dropper resistor that is connected to the higher potential of the power supply inputs.
4TIMER
Allows User Control over Timing Functions by Determining Frequency of Oscillator. Fre­quency set by connecting external capacitor to VEE. Tying pin directly to VEE causes oscillator to default to internally set value.
5 UV/OV Input Pin for Overvoltage and Undervoltage Detection Circuitry. The voltage appearing on the
UV/OV Pin is proportional to board supply and is determined by external resistors. When the voltage on UV/OV falls below the undervoltage threshold of 0.86 V, the GATE Pin is driven low. When the voltage appearing at the UV/OV Pin rises above the overvoltage threshold of 1.97 V, the GATE Pin is also driven low. If the external resistor ratio of R1/R2 = 40 is used, then this gives an operating range of –36 V to –77 V.
6 GATE Output to External FET Gate Drive. Controlled by linear current regulator. The gate is driven
low if an overvoltage or undervoltage fault occurs or if a current fault lasts for longer than the time, t
. When in linear regulation, the GATE Pin voltage is controlled as part of the servo loop.
ON
No external compensation is required. When the FET is fully enhanced and the load capacitance has been charged, the GATE Pin reaches a high level of typically 12 V.
REV. 0–4–
2.0
TEMPERATURE – ⴗC
–45
V
Z
– V
14.5
14.0
13.5
13.0
12.5
12.0
11.5
11.0 –35 –25 –15 –5 5 15 25 35 45 55 65 75 85
1.8
1.6
1.4
1.2
1.0
– mA
IN
I
0.8
0.6
0.4
0.2
0 –50 –35
Typical Performance Characteristics–
–20 –5 10 25 40 55 70
TEMPERATURE – ⴗC
ADM1070
85
1000
100
– mA
IN
I
10
1
0.1
10
9
8
TPC 1. IIN vs. Temperature
+85C
+25C
02
4681012 14
VIN – V
TPC 2. IIN vs. V
TPC 4. VZ vs. Temperature
12
11
10
– V
9
LKO
V
8
–40C
16
IN
7
6
–50
–35 –20 –5 10 25 40 55 70 85
TEMPERATURE – ⴗC
TPC 5. Undervoltage Lockout, V
100
95
90
vs. Temperature
LKO
RISING
7
– V
6
Z
R
5
4
REV. 0
3
2
–45
–35 –25 –15 –5 5 15 25 35 45 55 65 75 85
TPC 3. RZ vs. Temperature
TEMPERATURE – ⴗC
–5–
85
– mV
80
CB
V
75
70
65
60
–35 –20 –5 10 25 40 55 70 85
–50
TEMPERATURE – ⴗC
FALLING
TPC 6. Circuit Breaker Current Limit Voltage,
vs. Temperature
V
CB
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