ANALOG DEVICES ADM1063 Service Manual

Multisupply Supervisor/Sequencer with

A

www.BDTIC.com/ADI

FEATURES

Complete supervisory and sequencing solution for up to

10 supplies

10 supply fault detectors enable supervision of supplies to

<0.5% ac
<1.0% accuracy across all voltages and temperatures

5 selectable input attenuators allow supervision of supplies to

14.4 V
6 V on VP1 to VP4 (VPx)

5 dual-function inputs, VX1 to VX5 (VXx)

High impedance input to supply fault detector with

General-purpose logic input

10 programmable driver outputs, PDO1 to PDO10 (PDOx)

Open-collector with external pull-up
Push/pull output, driven to VDDCAP or VPx
Open collector with weak pull-up to VDDCAP or VPx
Internally charge-pumped high drive for use with external

Sequencing engine (SE) implements state machine control

of PDO

Complete voltage margining solution for 6 voltage rails
12-bit ADC for readback of all supervised voltages
1 internal and 2 external temperature sensors
Reference input (REFIN) has 2 input options

Driven directly from 2.048 V (±0.25%) REFOUT pin
More accurate external reference for improved

Device powered by the highest of VPx, VH for improved

re
User EEPROM: 256 bytes
Industry-standard, 2-wire bus interface (SMBus)
Guaranteed PDO low with VH, VPx = 1.2 V
Available in 40-lead, 6 mm × 6 mm LFCSP and

48-lead

For more information about the ADM1063 register map,

ref

curacy at all voltages at 25°C

on VH

thresholds bet

N-FE

T (PDO1 to PDO6 only)

ween 0.573 V and 1.375 V

x outputs
State changes conditional on input events
Enables complex control of boards
Power-up and power-down sequence control
Fault event handling
Interrupt generation on warnings
Watchdog function can be integrated in SE
Program software control of sequencing through SMBus

ADC per

formance

dundancy

, 7 mm × 7 mm TQFP packages

er to the AN-698 Application Note at

www.analog.com.

ADC and Temperature Monitoring

ADM1063

FUNCTIONAL BLOCK DIAGRAM

SDASCLA1A0

SMBus

INTERFACE

EEPROM

CONFIG URABLE

OUTPUT

DRIVERS

(HV CAPABLE OF

DRIVING GATES

OF N-FET)

CONFIG URABLE

OUTPUT

DRIVERS

(LV CAPABLE

OF DRIVING

LOGIC SIGNALS)

VDD

ARBITR ATOR

GNDVCCP

PDO1

PDO2

PDO3

PDO4

PDO5

PDO6

PDO7

PDO8

PDO9

PDO10

PDOGND

VDDCA P

DIODE

REFOUTREFIN REFGND

VREF

12-BIT

SAR ADC

SEQUENCING

ENGINE

VX1

VX2

VX3

VX4

VX5

VP1

VP2

VP3

VP4

GND

D2ND1N D2PD1P

TEMP

SENSOR

PROGRAM MABLE

VH

ADM1063

INTERNAL

MUX

CLOSED-LOOP
MARGINI NG SYSTEM

DUAL-

FUNCTION

INPUTS

(LOGIC INPUTS

OR

SFDs)

RESET

GENERATORS

(SFDs)

Figure 1.

APPLICATIONS

Central office systems
Servers/routers
Multivoltage system line cards
DSP/FPGA supply sequencing
In-circuit testing of margined supplies

GENERAL DESCRIPTION

The ADM1063 is a configurable supervisory/sequencing device
that offers a single-chip solution for supply monitoring and
sequencing in multiple supply systems. In addition to these
functions, the ADM1063 integrates a 12-bit ADC that can be
used to accurately read back up to 12 separate voltages.

The device also provides up to 10 programmable inputs for
m

onitoring undervoltage faults, overvoltage faults, or out-of­window faults on up to 10 supplies. In addition, 10 programmable
outputs can be used as logic enables. Six of these programmable
outputs can provide up to a 12 V output for driving the gate of
an N-FET that can be placed in the path of a supply.

04632-001

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2005–2008 Analog Devices, Inc. All rights reserved.

ADM1063

www.BDTIC.com/ADI

TABLE OF CONTENTS

Features.............................................................................................. 1

Functional Block Diagram .............................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Detailed Block Diagram .................................................................. 3

Specifications..................................................................................... 4

Pin Configurations and Function Descriptions ........................... 7

Absolute Maximum Ratings............................................................ 9

Thermal Resistance ...................................................................... 9

ESD Caution.................................................................................. 9

Typical Performance Characteristics ........................................... 10

Powering the ADM1063................................................................ 13

Inputs................................................................................................ 14

Supply Supervision..................................................................... 14

Programming the Supply Fault Detectors............................... 14

Input Comparator Hysteresis.................................................... 14

Input Glitch Filtering ................................................................. 15

Supply Supervision with VXx Inputs....................................... 15

VXx Pins as Digital Inputs........................................................ 15

Outputs ............................................................................................ 16

Supply Sequencing Through Configurable Output Drivers. 16

Default Output Configuration.................................................. 16

Sequencing Engine .........................................................................17

REVISION HISTORY

5/08—Rev. A to Rev. B

Changes to Table 1............................................................................ 4

Changes to Powering the ADM1063 Section ............................. 13

Changes to Table 5.......................................................................... 14

Changes to Default Output Configuration Section ................... 16

Changes to Sequence Detector Section ....................................... 19

Changes to Temperature Measurement System Section ........... 21

Changes to Table 10........................................................................ 22

Changes to Configuration Download at Power-Up Section..... 24

Changes to Table 11........................................................................ 25

Changes to Figure 44 and Error Correction Section ................. 29

Changes to Ordering Guide.......................................................... 31

12/06—Rev. 0 to Rev. A

Updated Format..................................................................Universal

Changes to Features.......................................................................... 1

Overview ..................................................................................... 17

Warnings...................................................................................... 17

SMBus Jump (Unconditional Jump)........................................ 17

Sequencing Engine Application Example............................... 18

Fault and Status Reporting........................................................ 19

Voltage Readback............................................................................ 20

Supply Supervision with the ADC........................................... 20

Temperature Measurement System.............................................. 21

Remote Temperature Measurement ........................................ 21

Applications Diagram.................................................................... 23

Communicating with the ADM1063........................................... 24

Configuration Download at Power-Up................................... 24

Updating the Configuration ..................................................... 24

Updating the Sequencing Engine............................................. 25

Internal Registers........................................................................ 25

EEPROM ..................................................................................... 25

Serial Bus Interface..................................................................... 25

SMBus Protocols for RAM and EEPROM.............................. 27

Write Operations........................................................................ 27

Read Operations......................................................................... 29

Outline Dimensions....................................................................... 30

Ordering Guide .......................................................................... 31

Changes to Figure 2...........................................................................3

Changes to Table 1.............................................................................4

Changes to Table 2.............................................................................7

Changes to Absolute Maximum Ratings Section..........................9

Deleted Figure 17 to Figure 19...................................................... 12

Changes to Programming the Supply Fault Detectors Section... 14

Changes to Table 6.......................................................................... 14

Changes to Outputs Section.......................................................... 16

Changes to Fault Reporting Section ............................................ 20

Deleted Supply Margining Section .............................................. 21

Changes to Table 9.......................................................................... 21

Changes to Identifying the ADM1063
o

n the SMBus Section .................................................................... 28

Changes to Figure 34 and Figure 35............................................. 30

4/05—Revision 0: Initial Version

Rev. B | Page 2 of 32

ADM1063

www.BDTIC.com/ADI

Temperature measurement is possible with the ADM1063. The
device contains one internal temperature sensor and two pairs
of differential inputs for remote thermal diodes. These are
measured by the 12-bit ADC.

The logical core of the device is a sequencing engine. This state­machi

ne-based construction provides up to 63 different states.

DETAILED BLOCK DIAGRAM

D2ND1N D2PD1P

ADM1063

TEMP

SENSOR

INTERNAL

DIODE

This design enables very flexible sequencing of the outputs
based on the condition of the inputs.

The device is controlled via configuration data that can be
p

rogrammed into an EEPROM. The entire configuration can
be programmed using an intuitive GUI-based software package
provided by Analog Devices, Inc.

REFOUTREFIN

SDA SCL A1 A0

REFGND

VREF

SMBus

INTERFACE

VX1

VX2

VX3

VX4

VX5

VP1

VP2

VP3

VP4

AGND

VDDCAP

VH

SELECTABLE
ATTENUATOR

SELECTABLE
ATTENUATOR

VDD

ARBITRATOR

SAR ADC

GPI SIGNAL

CONDITIO NING

GPI SIGNAL

CONDITIO NING

REG 5.25V

CHARGE PUMP

VCCPGND

12-BIT

SFD

SFD

SFD

SFD

CONTROLL ER

SEQUENCING

ENGINE

DEVICE

CONFIGURABL E
OUTPUT DRIVER

CONFIGURABL E
OUTPUT DRIVER

CONFIGURABL E
OUTPUT DRIVER

CONFIGURABL E
OUTPUT DRIVER

(HV)

(HV)

(LV)

(LV)

OSC

EEPROM

PDO1

PDO2

PDO3

PDO4

PDO5

PDO6

PDO7

PDO8

PDO9

PDO10

PDOGND

04632-002

Figure 2.

Rev. B | Page 3 of 32

ADM1063

www.BDTIC.com/ADI

SPECIFICATIONS

VH = 3.0 V to 14.4 V1, VPx = 3.0 V to 6.0 V1, TA = −40°C to +85°C, unless otherwise noted.

Table 1.

Parameter Min Typ Max Unit Test Conditions/Comments

POWER SUPPLY ARBITRATION

VH, VPx 3.0 V Minimum supply required on one of VH, VPx
VPx 6.0 V Maximum VDDCAP = 5.1 V, typical
VH 14.4 V VDDCAP = 4.75 V
VDDCAP 2.7 4.75 5.4 V Regulated LDO output
C

10 μF Minimum recommended decoupling capacitance

VDDCAP

POWER SUPPLY

Supply Current, IVH, I
Additional Currents

All PDO FET Drivers On 1 mA

Current Available from VDDCAP 2 mA

ADC Supply Current 1 mA Running round-robin loop
EEPROM Erase Current 10 mA 1 ms duration only, VDDCAP = 3 V

SUPPLY FAULT DETECTORS

VH Pin

Input Impedance 52 kΩ
Input Attenuator Error ±0.05 % Midrange and high range
Detection Ranges

High Range 6 14.4 V
Midrange 2.5 6 V

VPx Pins

Input Impedance 52 kΩ
Input Attenuator Error ±0.05 % Low range and midrange
Detection Ranges

Midrange 2.5 6 V
Low Range 1.25 3 V
Ultralow Range 0.573 1.375 V No input attenuation error

VXx Pins

Input Impedance 1 MΩ
Detection Range

Ultralow Range 0.573 1.375 V No input attenuation error

Absolute Accuracy ±1 %

Threshold Resolution 8 Bits
Digital Glitch Filter 0 μs Minimum programmable filter length
100 μs Maximum programmable filter length

ANALOG-TO-DIGITAL CONVERTER

Signal Range 0 V

Input Reference Voltage on REFIN Pin, V
Resolution 12 Bits
INL ±2.5 LSB Endpoint corrected, V
Gain Error ±0.05 % V

4.2 6 mA VDDCAP = 4.75 V, PDO1 to PDO10 off, ADC off

VPx

VDDCAP = 4.75 V, PDO1 to PDO6 loaded with 1 μA

O7 to PDO10 off

O pull-ups to VDDCAP

input attenuation error

VXx pins; VPx and VH input signals are attenuated

= 2.048 V

REFIN

= 2.048 V

REFIN

V

REFIN

2.048 V

REFIN

each, PD
Maximum additional load that can be drawn from all

PD

VREF error + DAC nonlinearity + comparator offset error
+

The ADC can convert signals presented to the VH, VPx,
and
depending on the selected range; a signal at the pin
corresponding to the selected range is from 0.573 V to

1.375 V at the ADC input

Rev. B | Page 4 of 32

ADM1063

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Parameter Min Typ Max Unit Test Conditions/Comments

Conversion Time 0.44 ms One conversion on one channel
84 ms All 12 channels selected, 16× averaging enabled
Offset Error ±2 LSB V
Input Noise 0.25 LSB rms Direct input (no attenuator)

TEMPERATURE SENSOR

2

Local Sensor Accuracy ±3 °C VDDCAP = 4.75 V
Local Sensor Supply Voltage Coefficient −1.7 °C/V
Remote Sensor Accuracy ±3 °C VDDCAP = 4.75 V
Remote Sensor Supply Voltage Coefficient −3 °C
Remote Sensor Current Source 200 μA High level
12 μA Low level
Temperature for Code 0x800 0 °C VDDCAP = 4.75 V
Temperature for Code 0xC00 128 °C VDDCAP = 4.75 V
Temperature Resolution per Code 0.125 °C

REFERENCE OUTPUT

Reference Output Voltage 2.043 2.048 2.053 V No load
Load Regulation −0.25 mV Sourcing current, I

0.25 mV Sinking current, I
Minimum Load Capacitance 1 μF Capacitor required for decoupling, stability
PSRR 60 dB DC

PROGRAMMABLE DRIVER OUTPUTS

High Voltage (Charge Pump) Mode

(PDO1 to PDO6)
Output Impedance 500 kΩ
VOH 11 12.5 14 V IOH = 0 μA

10.5 12 13.5 V IOH = 1 μA
I

20 μA 2 V < V

OUTAVG

Standard (Digital Output) Mode

(PDO1 to PDO10)
VOH 2.4 V VPU (pull-up to VDDCAP or VPx) = 2.7 V, IOH = 0.5 mA

4.5 V VPU to VPx = 6.0 V, IOH = 0 mA

V

− 0.3 V VPU ≤ 2.7 V, IOH = 0.5 mA

PU

VOL 0 0.50 V IOL = 20 mA

3

I

OL

3

I

SINK

R

19 20 29 kΩ Internal pull-up

PULL-UP

I

SOURCE

(VPx)

3

20 mA Maximum sink current per PDOx pin
60 mA Maximum total sink for all PDOx pins

2 mA

Three-State Output Leakage Current 10 μA V
Oscillator Frequency 90 100 110 kHz All on-chip time delays derived from this clock

DIGITAL INPUTS (VXx, A0, A1)

Input High Voltage, VIH 2.0 V Maximum VIN = 5.5 V
Input Low Voltage, VIL 0.8 V Maximum VIN = 5.5 V
Input High Current, IIH −1 μA VIN = 5.5 V
Input Low Current, IIL 1 μA VIN = 0 V
Input Capacitance 5 pF
Programmable Pull-Down Current,

PULL-DOWN

I

20 μA

SERIAL BUS DIGITAL INPUTS (SDA, SCL)

Input High Voltage, VIH 2.0 V
Input Low Voltage, VIL 0.8 V
Output Low Voltage, V

3

OL

0.4 V I

= 2.048 V

REFIN

= −100 μA

DACxMAX

= 100 μA

DACxMAX

< 7 V

OH

Current load on any VPx pull-ups, that is, total source

ent available through any number of PDOx pull-

curr
up switches configured onto any one VPx pin

= 14.4 V

PDO

VDDCAP = 4.75 V, T

= 25°C if known logic state is

A

required

= −3.0 mA

OUT

Rev. B | Page 5 of 32

ADM1063

www.BDTIC.com/ADI

Parameter Min Typ Max Unit Test Conditions/Comments

SERIAL BUS TIMING

Clock Frequency, f
Bus Free Time, t
Start Setup Time, t
Stop Setup Time, t
Start Hold Time, t
SCL Low Time, t
SCL High Time, t
SCL, SDA Rise Time, tR 1000 μs
SCL, SDA Fall Time, tF 300 μs
Data Setup Time, t
Data Hold Time, t
Input Low Current, IIL 1 μA VIN = 0

SEQUENCING ENGINE TIMING

State Change Time 10 μs

1

At least one of the VH, VPx pins must be ≥3.0 V to maintain the device supply on VDDCAP.

2

All temperature sensor measurements are taken with round-robin loop enabled and at least one other voltage input being measured.

3

Specification is not production tested but is supported by characterization data at initial product release.

400 kHz

SCLK

4.7 μs

BUF

4.7 μs

SU;STA

4 μs

SU;STO

4 μs

HD;STA

4.7 μs

LOW

4 μs

HIGH

250 ns

SU;DAT

5 ns

HD;DAT

Rev. B | Page 6 of 32

ADM1063

V

V

V

V

V

V

V

V

V

www.BDTIC.com/ADI

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

GND40VDDCAP39D1P38D1N37D2P36D2N35A134A033VCCP32PDOGND

VX1

1

PIN 1

VX2

VX3

VX4

VX5

VP1

VP2

VP3

VP4

VH

NC = NO CONNECT

INDICATOR

2

3

4

5

6

7

8

9

10

11

12

AGND

Figure 3. LFCSP Pin Configuration

13

REFGND

ADM1063

TOP VIEW

(Not to Scale)

14NC15NC16

REFIN

REFOUT

17

SCL

18NC19NC20

SDA

31

30

29

28

27

26

25

24

23

22

21

PDO1

PDO2

PDO3

PDO4

PDO5

PDO6

PDO7

PDO8

PDO9

PDO10

04632-003

NC

X1

X2

X3

X4

X5

P1

P2

P3

P4

VH

NC

NC = NO CONNECT

NC48GND47VDDCAP46D1P45D1N44D2P43D2N42A141A040VCCP39PDOGND38NC

1

PIN 1

2

INDICATOR

3

4

5

6

7

8

9

10

11

12

13

14

NC

AGND

Figure 4. TQFP Pin Configuration

Table 2. Pin Function Descriptions

Pin No.

LFCSP1TQFP

15, 16,
19, 20

1, 12, 13, 18,
19, 22 to 25,

Mnemonic

NC No Connection.

Description

36, 37, 48

1 to 5 2 to 6

6 to 9 7 to 10

VX1 to VX5

Xx)

(V
VP1 to VP4

(VPx)

High Impedance Inputs to Supply Fault Detectors. Fault thresholds can be set from 0.573 V to

1.375 V. Alternatively, these pins can be used as general-purpose digital inputs.
Low Voltage Inputs to Supply Fault Detectors. Three input ranges can be set by altering the

input attenuation on a potential divider connected to these pins, the output of which connects
to a supply fault detector. These pins allow thresholds from 2.5 V to 6.0 V, from 1.25 V to 3.00 V,
and from 0.573 V to 1.375 V.

10 11 VH

High Voltage Input to Supply Fault Detectors. Two input ranges can be set by altering the
input attenuation on a potential divider connected to this pin, the output of which connects

to a supply fault detector. This pin allows thresholds from 6.0 V to 14.4 V and from 2.5 V to 6.0 V.
11 14 AGND
12 15 REFGND
13 16 REFIN

2

2

Ground Return for Input Attenuators.

Ground Return for On-Chip Reference Circuits.

Reference Input for ADC. Nominally, 2.048 V. This pin must be driven by a reference voltage.

The on-board reference can be used by connecting the REFOUT pin to the REFIN pin.
14 17 REFOUT

Reference Output, 2.048 V. Typically connected to REFIN. Note that the capacitor must be

connected between this pin and REFGND. A 10 μF capacitor is recommended for this purpose.
17 20 SCL
18 21 SDA
21 to 30 26 to 35 PDO10 to PDO1
31 38 PDOGND

2

32 39 VCCP

SMBus Clock Pin. Bidirectional open drain requires external resistive pull-up.

SMBus Data Pin. Bidirectional open drain requires external resistive pull-up.

Programmable Output Drivers.

Ground Return for Output Drivers.

Central Charge Pump Voltage of 5.25 V. A reservoir capacitor must be connected between this

pin and GND. A 10 μF capacitor is recommended for this purpose.
33 40 A0
34 41 A1
35 42 D2N
36 43 D2P
37 44 D1N

Logic Input. This pin sets the seventh bit of the SMBus interface address.

Logic Input. This pin sets the sixth bit of the SMBus interface address.

External Temperature Sensor 2 Cathode Connection.

External Temperature Sensor 2 Anode Connection.

External Temperature Sensor 1 Cathode Connection.
38 45 D1P External Temperature Sensor 1 Anode Connection.

Rev. B | Page 7 of 32

15

REFGND

ADM1063

TOP VIEW

(Not to Scale)

16

17NC18NC19

REFIN

REFOUT

20

21NC22NC23NC24

SCL

SDA

37

NC

36

PDO1

35

PDO2

34

PDO3

33

32

PDO4

31

PDO5

30

PDO6

29

PDO7

28

PDO8

27

PDO9

26

PDO10

NC

25

04632-004

ADM1063

www.BDTIC.com/ADI

Pin No.

LFCSP1TQFP

39 46 VDDCAP

40 47 GND

1

Note that the LFCSP has an exposed pad on the bottom. This pad is a no connect (NC). If possible, this pad should be soldered to the board for improved mechanical stability.

2

In a typical application, all ground pins are connected together.

Mnemonic Description

Device Supply Voltage. Linearly regulated from the highest of the VPx, VH pins to a typical of

V. Note that the capacitor must be connected between this pin and GND. A 10 μF

4.75

2

capacitor is recommended for this purpose.
Supply Ground.

Rev. B | Page 8 of 32

ADM1063

www.BDTIC.com/ADI

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

Voltage on VH Pin 16 V
Voltage on VPx Pins 7 V
Voltage on VXx Pins −0.3 V to +6.5 V
Voltage on A0, A1 Pins −0.3 V to +7 V
Voltage on REFIN, REFOUT Pins 5 V
Voltage on VDDCAP, VCCP Pins 6.5 V
Voltage on PDOx Pins 16 V
Voltage on SDA, SCL Pins 7 V
Voltage on GND, AGND, PDOGND, REFGND Pins −0.3 V to +0.3 V
Voltage on DxN, DxP Pins −0.3 V to +5 V
Input Current at Any Pin ±5 mA
Package Input Current ±20 mA
Maximum Junction Temperature (TJ max) 150°C
Storage Temperature Range −65°C to +150°C
Lead Temperature,

Soldering Vapor Phase, 60 sec

ESD Rating, All Pins 2000 V

215°C

Stresses above those listed under Absolute Maximum Ratings
ma

y cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.

Table 4. Thermal Resistance

Package Type θJA Unit

40-Lead LFCSP 25 °C/W
48-Lead TQFP 50 °C/W

ESD CAUTION

Rev. B | Page 9 of 32

ADM1063

www.BDTIC.com/ADI

TYPICAL PERFORMANCE CHARACTERISTICS

(V)

VDDCAP

V

(V)

VDDCAP

V

6

5

4

3

2

1

0

0654321

6

5

4

3

2

1

0

0161412108642

Figure 5. V

Figure 6. V

V

VP1

VDDCAP

VVH (V)

VDDCAP

(V)

vs. V

vs. VVH

180

160

140

120

100

(μA)

80

VP1

I

60

40

20

04632-050

VP1

04632-051

0

012345

Figure 8. I

5.0

4.5

4.0

3.5

3.0

2.5

(mA)

VH

I

2.0

1.5

1.0

0.5

0

0161412108642

Figure 9. I

V

(V)

VP1

vs. V

VP1

(VP1 Not as Supply)

VP1

VVH (V)

vs. VVH (VH as Supply)

VH

04632-053

6

04632-054

5.0

4.5

4.0

3.5

3.0

2.5

(mA)

VP1

I

2.0

1.5

1.0

0.5

0

012345

Figure 7. I

VP1

vs. V

V

VP1

VP1

(V)

(VP1 as Supply)

04632-052

6

Rev. B | Page 10 of 32

350

300

250

200

(μA)

VH

150

I

100

50

0

0654321

Figure 10. I

VVH (V)

vs. VVH (VH Not as Supply)

VH

04632-055