Dual High IP3, 700 MHz to 2800 MHz, Double Balanced,
V
Passive Mixer, IF Amplifier, and Wideband LO Amplifier
FEATURES
RF frequency: 700 MHz to 2800 MHz continuous
LO frequency: 250 MHz to 2800 MHz, high-side or
low-side inject
IF range: 30 MHz to 450 MHz
Power conversion gain of 6.7 dB at 1900 MHz
SSB noise figure of 11.6 dB at 1900 MHz
Input IP3 of 27.2 dBm at 1900 MHz
Input P1dB of 12.5 dBm at 1900 MHz
Typical LO drive of 0 dBm
Single-ended, 50 Ω RF port
Single-ended or balanced LO input port
Single-supply operation: 3.6 V to 5.0 V
Serial port interface control on all functions
Exposed paddle 6 mm × 6 mm, 40-lead LFCSP package
APPLICATIONS
Multiband/multistandard cellular base station diversity
receivers
Wideband radio link diversity downconverters
Multimode cellular extenders and broadband receivers
ADL5812
FUNCTIONAL BLOCK DIAGRAM
VPIF1
IFGM1
NC
IFOP1
IFON1
NC
IFGD1
V1LO4V1LO3
2LO4V2LO3V2LO2
V1LO2
30
V1LO1
29
NC
28
NC
27
NC
26
LOIP
25
LOIN
24
LE
DATA
23
CLK
22
V2LO1
21
09913-001
40 39 38 37 36 35 34 33 32 31
1
RF1
2
RFCT1
IFON2
BIAS
GEN
ADL5812
INTERFACE
NC
IFGD2
SERIAL
PORT
NC
NC
NC
NC
NC
NC
RFCT2
RF2
3
4
5
6
7
8
9
10
11 12 13 14 15 16 17 18 19 20
NC
VPIF2
IFOP2
IFGM2
Figure 1.
GENERAL DESCRIPTION
The ADL5812 uses revolutionary new broadband, square wave
limiting, local oscillator (LO) amplifiers to achieve an
unprecedented radio frequency (RF) bandwidth of 700 MHz
to 2800 MHz. Unlike conventional narrow-band sine wave LO
amplifier solutions, this permits the LO to be applied either
above or below the RF input over an extremely wide bandwidth.
Because energy storage elements are not used, the dc current
consumption also decreases with decreasing LO frequency.
The ADL5812 uses highly linear, doubly balanced, passive mixer
cores along with integrated RF and LO balancing circuits to
allow single-ended operation. The ADL5812 incorporates
programmable RF baluns, allowing optimal performance over
a 700 MHz to 2800 MHz RF input frequency. The balanced
passive mixer arrangement provides outstanding LO-to-RF and
LO-to-IF leakages, excellent RF-to-IF isolation, and excellent
intermodulation performance over the full RF bandwidth.
The balanced mixer cores also provide extremely high input
linearity, allowing the device to be used in demanding
wideband applications where in-band blocking signals may
otherwise result in the degradation of dynamic range. Blocker
noise figure performance is comparable to narrow-band passive
mixer designs. High linearity IF buffer amplifiers follow the
passive mixer cores, yielding typical power conversion gains of
6.7 dB, and can be used with a wide range of output
impedances. For low voltage applications, the ADL5812 is
capable of operation at voltages down to 3.6 V with
substantially reduced current. Two logic bits are provided to
individually power down (1.5 mA for both channels) the two
channels as desired.
All features of the ADL5812 are controlled via a 3-wire serial
port interface, resulting in optimum performance and
minimum external components.
The ADL5812 is fabricated using a BiCMOS high performance
IC process. The device is available in a 40-lead, 6mm × 6mm,
LFCSP package and operates over a −40°C to +85°C
temperature range. An evaluation board is also available.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
VS = 5 V, TA = 25°C, fRF = 1900 MHz, fLO = 1697 MHz, RF power = −10 dBm, LO power = 0 dBm, R1 = R2 = 1200 Ω, ZO = 50 Ω, optimum
SPI settings, unless otherwise noted.
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
RF INPUT INTERFACE
Return Loss Tunable to >20 dB broadband via serial port 10 dB
Input Impedance 50 Ω
RF Frequency Range 700 2800 MHz
OUTPUT INTERFACE
Output Impedance Differential impedance, f = 200 MHz 260||1.2 Ω||pF
IF Frequency Range 30 450 MHz
DC Bias Voltage1 Externally generated VS V
LO INTERFACE
LO Power −6 0 +10 dBm
Return Loss 13.3 dB
Input Impedance 50 Ω
LO Frequency Range Low-side or high-side LO 250 2800 MHz
DYNAMIC PERFORMANCE
Power Conversion Gain Including 4:1 IF port transformer and PCB loss 6.7 dB
Voltage Conversion Gain Z
SSB Noise Figure 11.6 dB
SSB Noise Figure Under Blocking
Input Third-Order Intercept
Input Second-Order Intercept
Input 1 dB Compression Point 12.5 dBm
LO-to-IF Output Leakage Unfiltered IF output −37 dBm
LO-to-RF Input Leakage −46 dBm
RF-to-IF Output Isolation 26 dB
IF/2 Spurious −10 dBm input power −70 dBc
IF/3 Spurious −10 dBm input power −78 dBc
POWER INTERFACE
Supply Voltage, VS 3.6 5 5.5 V
Quiescent Current Resistor programmable IF current 412 mA
Power-Down Current 1.5 mA
1
Supply voltage must be applied from external circuit through choke inductors.
= 50 Ω, differential Z
SOURCE
= 200 Ω differential 13.1 dB
LOAD
5 dBm blocker present ±10 MHz from wanted RF input,
LO source filtered
= 1900 MHz, f
f
RF1
= 1901 MHz, fLO = 1697 MHz, each RF tone
RF2
at −10 dBm
= 1900 MHz, f
f
RF1
= 2000 MHz, fLO = 1697 MHz, each RF tone
RF2
at −10 dBm
21 dB
27.2 dBm
55 dBm
Rev. 0 | Page 3 of 28
ADL5812
A
TIMING CHARACTERISTICS
Low logic level ≤ 0.4 V, and high logic level ≥ 1.4 V.
Table 2. Serial Interface Timing
Parameter Limit Unit Test Conditions/Comments
t1 20 ns minimum LE setup time
t2 10 ns minimum DATA-to-CLK setup time
t3 10 ns minimum DATA-to-CLK hold time
t4 25 ns minimum CLK high duration
t5 25 ns minimum CLK low duration
t6 10 ns minimum CLK-to-LE setup time
t7 20 ns minimum LE pulse width
Timing Diagram
CLK
t
4
t
5
t
2
D
DB23 (MSB)DB22
TA
LE
t
3
DB2DB1
(CONTROL BIT C2)(CONTROL BIT C3)
DB0 (LSB)
(CONTROL BIT C1)
t
t
t
7
6
1
09913-002
Figure 2. Timing Diagram
Rev. 0 | Page 4 of 28
ADL5812
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage, V
CLK, DATA, LE 5.5 V
IF Output Bias 6.0 V
RF Input Power 20 dBm
LO Input Power 13 dBm
Internal Power Dissipation 2.5 W
θJA (Exposed Paddle Soldered Down) 30°C
Maximum Junction Temperature 150°C
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
5.5 V
POS
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. 0 | Page 5 of 28
ADL5812
2
2
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VPIF1
IFGM1NCIFOP1
IFON1NCIFGD1
V1LO4V1LO3V1LO
32
31
33
34
35
36
37
38
39
40
1
RF1
RFCT1
2
NC
3
NC
4
NC
5
6
NC
NC
7
NC
8
9
RFCT2
RF2
10
NOTES
1. NC = NO CONNE CT. CAN BE GRO UNDED.
. EXPOSE D PAD MUST BE CO NNECTED
TO GROUND.
ADL5812
TOP VIEW
(Not to Scale)
11
12
13
15
14
NC
VPIF2
IFOP2
IFON2NCIFGD2
IFGM2
17
16
Figure 3. Pin Configuration
30
V1LO1
29
NC
28
NC
NC
27
26
LOIP
25
LOIN
LE
24
23
DATA
22
CLK
21
V2LO1
18
19
20
V2LO4
V2LO3
V2LO2
09913-003
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1, 10 RF1, RF2 RF Input. Should be ac-coupled.
2, 9 RFCT1, RFCT2 RF Balun Center Tap (AC Ground).
3 to 8, 13, 16, 27 to 29, 35, 38 NC No Connect. Can be grounded.
11, 40 VPIF1, VPIF2 Supply Voltage for IF Amplifier.
12, 39 IFGM1, IFGM2 IF Amplifier Bias Control.
14, 15, 36, 37 IFOP1, IFOP2, IFON1, IFON2
Differential Open-Collector IF Outputs. Should be pulled up to V
external inductors.
17, 34 IFGD1, IFGD2 Supply Return for IF Amplifier. Must be grounded.
18 to 21, 30 to 33
V1LO1, V1LO2, V1LO3, V1LO4,
Positive Supply Voltages for LO Amplifiers.
V2LO1, V2LO2, V2LO3, V2LO4
22, 23, 24 CLK, DATA, LE Serial Port Interface Control.
25 LOIN Ground Return for LO Input. Must be ac coupled.
26 LOIP LO Input. Should be ac-coupled.
EPAD Exposed pad must be connected to ground.
CC
via
Rev. 0 | Page 6 of 28
ADL5812
TYPICAL PERFORMANCE CHARACTERISTICS
VS = 5 V, TA = 25°C, fRF = 1900 MHz, fLO = 1697 MHz, RF power = −10 dBm, LO power = 0 dBm, R1 = R2 = 1200 Ω, ZO = 50 Ω, optimum
SPI settings, unless otherwise noted.