Passive Mixer, IF Amplifier, and Wideband LO Amplifier
FEATURES
RF frequency: 700 MHz to 2800 MHz continuous
LO frequency: 250 MHz to 2800 MHz, high-side or
low-side inject
IF range: 30 MHz to 450 MHz
Power conversion gain of 7.5 dB at 1900 MHz
SSB noise figure of 10.7 dB at 1900 MHz
Input IP3 of 27.5 dBm at 1900 MHz
Input P1dB of 12.7 dBm at 1900 MHz
Typical LO drive of 0 dBm
Single-ended, 50 Ω RF port
Single-ended or balanced LO input port
Single-supply operation: 3.6 V to 5.0 V
Serial port interface control on all functions
Exposed paddle 5 mm × 5 mm, 32-lead LFCSP package
APPLICATIONS
Multiband/multistandard cellular base station receivers
Wideband radio link diversity downconverters
Multimode cellular extenders and broadband receivers
ADL5811
FUNCTIONAL BLOCK DIAGRAM
VPIF
IFGMNCIFOP
30 29 28 27 26 2532 31
1
NC
2
RFCT
3
NC
4
RFIN
5
NC
6
NC
BIAS
7
NC
NC
GEN
8
11 12 13 14 15 169 10
VLO4
COMM
VLO3
COMM
Figure 1.
IFONNCIFGD
ADL5811
SERIAL
PORT
INTERFACE
VLO2
COMM
COMM
24
NC
23
NC
22
NC
21
LOIP
20
LOIN
19
LE
18
DATA
17
CLK
VLO1
COMM
09912-001
GENERAL DESCRIPTION
The ADL5811 uses revolutionary new broadband, square
wave limiting, local oscillator (LO) amplifiers to achieve an
unprecedented radio frequency (RF) bandwidth of 700 MHz
to 2800 MHz. Unlike conventional narrow-band sine wave LO
amplifier solutions, this permits the LO to be applied either
above or below the RF input over an extremely wide bandwidth.
Because energy storage elements are not used, the dc current
consumption also decreases with decreasing LO frequency.
The ADL5811 uses highly linear, doubly balanced, passive
mixer cores along with integrated RF and LO balancing circuits
to allow single-ended operation. The ADL5811 incorporates
programmable RF baluns, allowing optimal performance over a
700 MHz to 2800 MHz RF input frequency. The balanced passive
mixer arrangement provides outstanding LO-to-RF and LO-toIF leakages, excellent RF-to-IF isolation, and excellent
intermodulation performance over the full RF bandwidth.
The balanced mixer cores also provide extremely high input
linearity, allowing the device to be used in demanding
wideband applications where in-band blocking signals may
otherwise result in the degradation of dynamic range. Blocker
noise figure performance is comparable to narrow-band passive
mixer designs. High linearity IF buffer amplifiers follow the
passive mixer cores, yielding typical power conversion gains of
7.5 dB, and can be used with a wide range of output
impedances. For low voltage applications, the ADL5811 is
capable of operation at voltages down to 3.6 V with
substantially reduced current. Two logic bits are provided to
power down (<1.5 mA) the circuit when desired.
All features of the ADL5811 are controlled via a 3-wire serial
port interface, resulting in optimum performance and
minimum external components.
The ADL5811 is fabricated using a BiCMOS high performance
IC process. The device is available in a 32-lead, 5mm × 5mm,
LFCSP package and operates over a −40°C to +85°C
temperature range. An evaluation board is also available.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
VS = 5 V, TA = 25°C, fRF = 1900 MHz, fLO = 1697 MHz, RF power = −10 dBm, LO power = 0 dBm, R1 = 910 Ω, ZO = 50 Ω, optimum SPI settings,
unless otherwise noted.
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
RF INPUT INTERFACE
Return Loss Tunable to >20 dB broadband via serial port 15 dB
Input Impedance 50 Ω
RF Frequency Range 700 2800 MHz
OUTPUT INTERFACE
Output Impedance Differential impedance, f = 200 MHz 260||1.0 Ω||pF
IF Frequency Range 30 450 MHz
DC Bias Voltage1 Externally generated VS V
LO INTERFACE
LO Power −6 0 +10 dBm
Return Loss 13 dB
Input Impedance 50 Ω
LO Frequency Range Low-side or high-side LO 250 2800 MHz
DYNAMIC PERFORMANCE
Power Conversion Gain Including 4:1 IF port transformer and PCB loss 7.5 dB
Voltage Conversion Gain Z
SSB Noise Figure 10.7 dB
SSB Noise Figure Under Blocking
Input Third-Order Intercept
Input Second-Order Intercept
Input 1 dB Compression Point 12.7 dBm
LO-to-IF Output Leakage Unfiltered IF output −40 dBm
LO-to-RF Input Leakage −25 dBm
RF-to-IF Output Isolation 26 dB
IF/2 Spurious −10 dBm input power −73 dBc
IF/3 Spurious −10 dBm input power −75 dBc
POWER INTERFACE
Supply Voltage, VS 3.6 5 5.5 V
Quiescent Current Resistor programmable IF current 185 mA
Power-Down Current 1.4 mA
1
Supply voltage must be applied from external circuit through choke inductors.
= 50 Ω, differential Z
SOURCE
= 200 Ω differential 13.9 dB
LOAD
5 dBm blocker present ±10 MHz from wanted RF input,
LO source filtered
= 1900 MHz, f
f
RF1
= 1901 MHz, fLO = 1697 MHz,
RF2
each RF tone at −10 dBm
= 1900 MHz, f
f
RF1
= 2000 MHz, fLO = 1697 MHz,
RF2
each RF tone at −10 dBm
20.7 dB
27.5 dBm
62 dBm
Rev. 0 | Page 3 of 28
ADL5811
A
TIMING CHARACTERISTICS
Low logic level ≤ 0.4 V, and high logic level ≥ 1.4 V.
Table 2. Serial Interface Timing
Parameter Limit Unit Test Conditions/Comments
t1 20 ns minimum LE setup time
t2 10 ns minimum DATA-to-CLK setup time
t3 10 ns minimum DATA-to-CLK hold time
t4 25 ns minimum CLK high duration
t5 25 ns minimum CLK low duration
t6 10 ns minimum CLK-to-LE setup time
t7 20 ns minimum LE pulse width
Timing Diagram
CLK
t
4
t
5
t
2
D
DB23 (MSB)DB22
TA
LE
t
3
DB2DB1
(CONTROL BIT C2)(CONTROL BIT C3)
DB0 ( LSB)
(CONTROL BIT C1)
t
t
t
7
6
1
09912-002
Figure 2. Timing Diagram
Rev. 0 | Page 4 of 28
ADL5811
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage, V
CLK, DATA, LE 5.5 V
IF Output Bias 6.0 V
RF Input Power 20 dBm
LO Input Power 13 dBm
Internal Power Dissipation 1.1 W
θJA (Exposed Paddle Soldered Down) 25°C/W
Maximum Junction Temperature 150°C
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
5.5 V
POS
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. 0 | Page 5 of 28
ADL5811
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VPIF
IFGMNCIFOP
IFONNCIFGD
32313029282726
1
NC
2
RFCT
NC
3
4
5
6
7
8
ADL5811
TOP VIEW
(Not to Scale)
9
10111213141516
VLO4
VLO3
COMM
COMM
RFIN
NC
NC
NC
NC
NOTES
1. NC = NO CO NNECT. CAN BE GROUNDED.
2. EXPOSED PAD MUST BE CONNECTED
TO GROUND.
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1, 3, 5 to 8, 22 to 24, 27, 30 NC No Connect. Can be grounded.
2 RFCT RF Balun Center Tap (AC Ground).
4 RFIN RF Input. Should be ac-coupled.
9, 11, 13, 15 VLO4, VLO3, VLO2, VLO1 Positive Supply Voltages for LO Amplifier.
10, 12, 14, 16, 25 COMM Ground.
17, 18, 19 CLK, DATA, LE Serial Port Interface Control.
20 LOIN Ground Return for LO Input.
21 LOIP LO Input. Should be ac-coupled.
26 IFGD Supply Return for IF Amplifier. Must be grounded.
28, 29 IFOP, IFON
IF Differential Open-Collector Outputs. Should be pulled up to V
external inductors.
31 IFGM IF Amplifier Bias Control.
32 VPIF Supply Voltage for IF Amplifier.
EPAD Exposed pad must be connected to ground.
COMM
25
NC
24
23
NC
NC
22
LOIP
21
20
LOIN
19
LE
18
DATA
CLK
17
VLO2
VLO1
COMM
COMM
09912-003
using
CC
Rev. 0 | Page 6 of 28
ADL5811
TYPICAL PERFORMANCE CHARACTERISTICS
VS = 5 V, TA = 25°C, fRF = 1900 MHz, fLO = 1697 MHz, RF power = −10 dBm, LO power = 0 dBm, R1 = 910 Ω, ZO = 50 Ω, optimum SPI settings,
unless otherwise noted.