ANALOG DEVICES ADL5502 Service Manual
450 MHz to 6000 MHz
V
FEATURES
True rms response detector
Envelope peak hold output
Excellent temperature stability
±0.25 dB rms detection accuracy vs. temperature
±0.25 dB envelope detection accuracy vs. temperature;
over the top 25 dB of the input range
Over 35 dB input power dynamic range, inclusive of crest factor
RF bandwidths from 450 MHz to 6 GHz
Envelope bandwidths of 10 MHz
500 Ω input impedance
Single-supply operation: 2.5 V to 3.3 V
Low power: 3 mA at 3 V supply
RoHS-compliant part
APPLICATIONS
Power and envelope measurement of W-CDMA, CDMA2000,
and QPSK-/QAM-based OFDM, and other complex
modulation waveforms
RF transmitter or receiver power and envelope measurement
RFIN
ENBL
Crest Factor Detector
ADL5502
FUNCTIONAL BLOCK DIAGRAM
POS
ADL5502
1kΩ
RMS CORE
PEAK/
ENVELOPE
COMM
Figure 1.
VRMS
4nF
BUFFERS
RF INPUT
INTERNAL
FILTERING
100Ω
100Ω
PEAK
FLTR
VRMS
PEAK
CNTL
07631-001
GENERAL DESCRIPTION
The ADL5502 is a mean-responding (true rms) power detector
in combination with an envelope detector to accurately determine
the crest factor of a modulated signal. It can be used in high
frequency receiver and transmitter signal chains from 450 MHz
to 6 GHz with envelope bandwidths over 10 MHz. Requiring
only a single supply between 2.5 V and 3.3 V, the detector draws
less than 3 mA. The input is internally ac-coupled and has a
nominal input impedance of 500 Ω.
The rms output is a linear-responding dc voltage with a conversion
gain of 1.8 V/V rms at 900 MHz. The peak envelope output with a
conversion gain of 1.2 V/V is toggled for peak hold with less
than 1% output voltage droop in over 1 ms.
CNTL
PEAK HOLDENV TRACK
1µs/DIV
Figure 2.
07631-002
The ADL5502 is a highly accurate, easy to use means of
determining the rms and peak to the average value of complex
waveforms. It can be used for crest factor measurements of both
simple and complex waveforms but is particularly useful for
measuring high crest factor (high peak-to-rms ratio) signals,
such as W-CDMA, CDMA2000, and QPSK-/QAM-based
OFDM waveforms. The peak hold function allows the capture
of short peaks in the envelope with lower sampling rate ADCs.
The crest factor detector operates from −40°C to +85°C and is
available in an 8-ball, 1.5 mm × 1.5 mm wafer-level chip scale
package. It is fabricated on a high f
silicon BiCMOS process.
T
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2008–2011 Analog Devices, Inc. All rights reserved.
ADL5502
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 6
ESD Caution .................................................................................. 6
Pin Configuration and Function Descriptions ............................. 7
Typical Performance Characteristics ............................................. 8
Circuit Description ......................................................................... 15
RMS Circuit Description and Filtering ................................... 15
Filtering ........................................................................................ 15
Envelope Peak-Hold Circuit ..................................................... 15
Output Buffers ............................................................................ 15
Measuring the Crest Factor ....................................................... 15
Applications Information .............................................................. 16
Basic Connections ...................................................................... 16
RF Input Interfacing ................................................................... 16
Linearity ....................................................................................... 17
Output Drive Capability and Buffering ................................... 18
Selecting the Square-Domain Filter and Output Low-Pass
Filter ............................................................................................. 18
Power Consumption, Enable, and Power-On/Power-Off
Response Time ............................................................................ 19
Device Calibration and Error Calculation .............................. 19
Calibration for Improved Accuracy ......................................... 20
Calculation of Crest Factor (CF) .............................................. 20
Drift over a Reduced Temperature Range .............................. 21
Operation at High Frequencies ................................................ 22
Device Handling ......................................................................... 22
Evaluation Board ........................................................................ 23
Outline Dimensions ....................................................................... 25
Ordering Guide .......................................................................... 25
REVISION HISTORY
1/11—Rev. 0 to Rev. A
Changes to Output Intercept Parameters, Table 1 ........................ 3
Changes to Figure 34 ...................................................................... 13
10/08—Revision 0: Initial Version
Rev. A | Page 2 of 28
ADL5502
SPECIFICATIONS
TA = 25°C, VS = 3.0 V, C
Table 1.
Parameter Test Conditions Min Typ Max Unit
FREQUENCY RANGE Input RFIN 450 6000 MHz
RF INPUT (f = 900 MHz) Input RFIN to output VRMS and PEAK
Input Impedance No termination 330||1.04 Ω||pF
RMS CONVERSION Input RFIN to output VRMS
Dynamic Range CW input, −40°C < TA < +85°C
±0.25 dB Error 1 27 dB
±1 dB Error1 33 dB
±2 dB Error2 29 dB
Maximum Input Level
Minimum Input Level
Conversion Gain VRMS = (Gain × VIN) + Intercept 1.89 V/V rms
Output Intercept3 0.014 V
Output Voltage, High Power In PIN = 5 dBm, 400 mV rms 0.762 V
Output Voltage, Low Power In PIN = −15 dBm, 40 mV rms 0.086 V
ENVELOPE CONVERSION Input RFIN to output PEAK
Dynamic Range CW input, −40°C < TA < +85°C
±0.25 dB Error1 27 dB
±1 dB Error1 33 dB
±2 dB Error2 30 dB
Maximum Input Level
Minimum Input Level
Conversion Gain PEAK = (Gain × VIN) + Intercept 1.27 V/V rms
Output Intercept3 0.014 V
Output Voltage, High Power In PIN = 5 dBm, 400 mV rms 0.516 V
Output Voltage, Low Power In PIN = −15 dBm, 40 mV rms 0.062 V
= 10 nF, C
FLTR
= open, light condition ≤ 600 lux, 75 Ω input termination resistor, unless otherwise noted.
OUT
±0.25 dB error
2
±1 dB error
±0.25 dB error
2
±1 dB error
2
2
12 dBm
−15 dBm
12 dBm
−15 dBm
Rev. A | Page 3 of 28
ADL5502
Parameter Test Conditions Min Typ Max Unit
RF INPUT (f = 1900 MHz) Input RFIN to output VRMS and PEAK
Input Impedance No termination 238||0.90 Ω||pF
RMS CONVERSION Input RFIN to output VRMS
Dynamic Range CW input, −40°C < TA < +85°C
±0.25 dB Error 1 27 dB
±1 dB Error1 32 dB
±2 dB Error2 30 dB
Maximum Input Level
Minimum Input Level
±0.25 dB error
±1 dB error
2
2
Conversion Gain VRMS = (Gain × VIN) + Intercept 1.75 V/V rms
Output Intercept3 0.010 V
Output Voltage, High Power In PIN = 5 dBm, 400 mV rms 0.700 V
Output Voltage, Low Power In PIN = −15 dBm, 40 mV rms 0.079 V
ENVELOPE CONVERSION Input RFIN to output PEAK
Dynamic Range CW input, −40°C < TA < +85°C
±0.25 dB Error1 26 dB
±1 dB Error1 32 dB
±2 dB Error2 30 dB
Maximum Input Level
Minimum Input Level
±0.25 dB error
±1 dB error
2
2
Conversion Gain PEAK = (Gain × VIN) + Intercept 1.17 V/V rms
Output Intercept3 0.011 V
Output Voltage, High Power In PIN = 5 dBm, 400 mV rms 0.472 V
Output Voltage, Low Power In PIN = −15 dBm, 40 mV rms 0.057 V
RF INPUT (f = 3500 MHz) Input RFIN to output VRMS and PEAK
Input Impedance No termination 232||0.39 Ω||pF
RMS CONVERSION Input RFIN to output VRMS
Dynamic Range CW input, −40°C < TA < +85°C
±1 dB Error1 32 dB
±2 dB Error2 30 dB
Maximum Input Level
Minimum Input Level
±0.25 dB error
±1 dB error
2
2
Conversion Gain VRMS = (Gain × VIN) + Intercept 1.52 V/V rms
Output Intercept3 0.002 V
Output Voltage, High Power In PIN = 5 dBm, 400 mV rms 0.594 V
Output Voltage, Low Power In PIN = −15 dBm, 40 mV rms 0.065 V
ENVELOPE CONVERSION Input RFIN to output PEAK
Dynamic Range CW input, −40°C < TA < +85°C
±1 dB Error1 32 dB
±2 dB Error2 31 dB
Maximum Input Level
Minimum Input Level
±0.25 dB error
±1 dB error
2
2
Conversion Gain PEAK = (Gain × VIN) + Intercept 1.02 V/V rms
Output Intercept3 0.005 V
Output Voltage, High Power In PIN = 5 dBm, 400 mV rms 0.403 V
Output Voltage, Low Power In PIN = −15 dBm, 40 mV rms 0.049 V
12 dBm
−15 dBm
12 dBm
−16 dBm
7 dBm
−16 dBm
7 dBm
−16 dBm
Rev. A | Page 4 of 28
ADL5502
Parameter Test Conditions Min Typ Max Unit
VRMS OUTPUT Pin VRMS
Maximum Output Voltage VS = 3.0 V, R
Output Offset No signal at RFIN 15 100 mV
Pulse Response Time
10 dB step, 10% to 90% of settling level, no filter
capacitor
Available Output Current 3 mA
PEAK OUTPUT Pin PEAK
Maximum Output Voltage VS = 3.0 V, R
Output Offset No signal at RFIN 14 100 mV
Available Output Current 3 mA
Envelope Modulation Bandwidth 5 10 MHz
Peak Hold Time 1% voltage drop from last peak, CNTL = high 600 μs
CONTROL INTERFACE
Logic Level to Track Envelope, High 2.5 V ≤ VS ≤ 3.3 V, −40°C < TA < +85°C 1.8 V
Input Current when High 2.5 V at CNTL, –40°C ≤ TA ≤ +85°C 0.05 0.1 μA
Logic Level for Peak Hold Condition, Low 2.5 V ≤ VS ≤ 3.3 V, −40°C < TA < +85°C −0.5 +0.5 V
Enable Time 0 dBm at RFIN, CNTL held high for >1 μs <0.1 μs
ENABLE INTERFACE Pin ENBL
Logic Level to Enable Power, High Condition 2.5 V ≤ VS ≤ 3.3 V, −40°C < TA < +85°C 1.8 V
Input Current when High 2.5 V at ENBL, –40°C ≤ TA ≤ +85°C 0.05 0.1 μA
Logic Level to Disable Power, Low Condition 2.5 V ≤ VS ≤ 3.3 V, −40°C < TA < +85°C −0.5 +0.5 V
Power-Up Response Time4 C
C
= open, 0 dBm at RFIN 12 μs
FLTR
= 10 nF, 0 dBm at RFIN 10 μs
FLTR
POWER SUPPLIES
Operating Range −40°C < TA < +85°C 2.5 3.3 V
Quiescent Current No signal at RFIN,5 ENBL high input condition 3.0 mA
Disable Current6 ENBL input low condition, CNTL in high condition <1 1 μA
1
Error referred to delta from 25°C response, see Figure 10, Figure 11, and Figure 12 for VRMS and Figure 16, Figure 17, and Figure 18 for PEAK.
2
Error referred to best-fit line at 25°C, see Figure 13, Figure 14, and Figure 15 for VRMS and Figure 19, Figure 20, and Figure 21 for PEAK.
3
Calculated using linear regression.
4
The response time is measured from 10% to 90% of settling level, see Figure 41, Figure 42, and Figure 43.
5
Supply current is input level dependant, see Figure 37.
6
Guaranteed but not tested; limits are specified at six sigma levels.
≥ 10 kΩ 2.4 V
LOAD
15 μs
≥ 10 kΩ 1.5 V
LOAD
V
POS
V
POS
Rev. A | Page 5 of 28
ADL5502
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage, VS 3.5 V
VRMS, PEAK, ENBL, CNTL 0 V, VS
RFIN 1.25 V rms
Equivalent Power, re: 50 Ω 15 dBm
Internal Power Dissipation 200 mW
θJA (WLCSP) 200°C/W
Maximum Junction Temperature 125°C
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. A | Page 6 of 28
ADL5502
V
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
BALLA1
CORNER
ENBL
ADL5502
1
FLTR
2
POS
3
RFIN
COMM
TOP VIEW
(BALL SIDE DO WN)
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 FLTR Modulation Filter Pin. Connection for an external capacitor to lower the corner frequency of the modulation filter.
2 VPOS Supply Voltage Pin. Operational range 2.5 V to 3.3 V.
3 RFIN Signal Input Pin. Internally ac-coupled after internal termination resistance. Nominal 500 Ω input impedance.
4 COMM Device Ground Pin.
5 CNTL
Control Pin. Connect pin to ground for peak-hold mode. Connect pin to V
To measure the peak of a waveform, the control pin must be briefly set to high (reset mode for >1 μs) to start at a
known state.
6 PEAK
Envelope Peak Output. Voltage output for peak-hold function, with limited current drive capability. The output
has an internal 100 Ω series resistance. Low capacitance loads are recommended to allow for envelope tracking
and fast response time.
7 VRMS
RMS Output Pin. Rail-to-rail voltage output with limited current drive capability. The output has an internal 100 Ω
series resistance. High resistive loads and low capacitance loads are recommended to preserve output swing and
allow fast response.
8 ENBL Enable Pin. Connect pin to VS for normal operation. Connect pin to ground for disable mode.
7
8
4
VRMS
PEAK
6
CNTL
5
07631-003
for reset mode (tracking envelope).
S
Rev. A | Page 7 of 28
ADL5502
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VS = 3.0 V, C
−40°C, red = +85°C, unless otherwise noted.
= 10 nF, C
FLTR
= open, light condition ≤ 600 lux, 75 Ω input termination resistor, colors: black = +25°C, blue =
OUT
1
0.1
OUTPUT (V)
0.01
–25 –20 –15 –10 –5 0 5 10 15
INPUT (dBm)
450
900
1900
2350
2600
3500
4000
5000
6000
07631-004
Figure 4. VRMS Output vs. Input Level, 450 MHz, 900 MHz, 1900 MHz,
2350 MHz, 2600 M Hz, 35 00 MHz, 4000 MHz, 5000 MHz, 6000 MHz, Supply 3.0 V
2.0
450
900
1.8
1900
2350
1.6
2600
3500
4000
1.4
5000
6000
1.2
1.0
0.8
OUTPUT (V)
0.6
0.4
0.2
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
INPUT (V rms)
07631-005
Figure 5. VRMS Output vs. Input Level (Linear Scale), 450 MHz, 900 MHz, 1900 MHz,
2350 MHz, 2600 MHz, 3500 MHz, 4000 M Hz, 5000 MHz, 6000 MHz, Supply 3.0 V
3
2
1
0
ERROR (dB)
–1
450
900
1900
2350
2600
3500
4000
5000
6000
1
0.1
OUTPUT (V)
0.01
–25 –20 –15 –10 –5 0 5 10 15
INPUT (dBm)
450
900
1900
2350
2600
3500
4000
5000
6000
07631-007
Figure 7. PEAK Output vs. Input Level, 450 MHz, 900 MHz, 1900 MHz,
2350 MHz, 2600 M Hz, 35 00 MHz, 4000 MHz, 5000 MHz, 6000 MHz, Supply 3.0 V
3
2
1
0
ERROR (dB)
–1
–2
–3
–25 –20 –15 –10 –5 0 5
INPUT (dBm)
450
900
1900
2350
2600
3500
4000
5000
6000
10
15
07631-008
Figure 8. PEAK Linearity Error vs. Input Level, 450 MHz, 900 MHz, 1900 MHz,
2350 MHz, 2600 M Hz, 35 00 MHz, 4000 MHz, 5000 MHz, 6000 MHz, Supply 3.0 V
2.5V
2.7V
3.0V
1
3.3V
VRMS
0.1
OUTPUT (V)
PEAK
–2
–3
–25
–20
–15
–5 0 5 10 15
–10
INPUT (dBm)
07631-006
Figure 6. VRMS Linearity Error vs. Input Level, 450 MHz, 900 MHz, 1900 MHz,
2350 MHz, 2600 MHz, 3500 MHz, 4000 MHz, 5000 MHz, 6000 MHz, Supply 3.0 V
Rev. A | Page 8 of 28
0.01
–25 –20 –15 –10 –5 0 5 10 15
INPUT (dBm)
07631-009
Figure 9. VRMS and PEAK Outputs vs. Input Level, 2.5 V, 2.7 V, 3.0 V, 3.3 V, and
3.5 V Supplies, 900 MHz Frequency
ADL5502
3
3
2
1
0
ERROR (dB)
–1
–2
–3
–25 –20 –15 –10 –5 0 5
INPUT (dBm)
10
15
07631-010
Figure 10. VRMS Output Temperature Drift from +25°C Linear Reference
for 50 Devices at −40°C, +25°C, and +85°C, 900 MHz Frequency
3
2
1
0
ERROR (dB)
–1
2
1
0
ERROR (dB)
–1
–2
–3
–25 –20 –15 –10 –5 0 5 10 15
INPUT (dBm)
Figure 13. VRMS Output Delta from +25°C Output Voltage for
50 Devices at −40°C and +85°C, 900 MHz Frequency
3
2
1
0
ERROR (dB)
–1
07631-013
–2
–3
–25 –20 –15 –10 –5 0 5
INPUT (dBm)
10
15
07631-011
Figure 11. VRMS Output Temperature Drift from +25°C Linear Reference
for 50 Devices at −40°C, +25°C, and +85°C, 1900 MHz Frequency
3
2
1
0
ERROR (dB)
–1
–2
–3
–25 –20 –15 –10 –5 0 5 10 15
INPUT (dBm)
07631-012
Figure 12. VRMS Output Temperature Drift from +25°C Linear Reference
for 50 Devices at −40°C, +25°C, and +85°C, Frequency 3500 MHz
–2
–3
–25 –20 –15 –10 –5 0 5 10 15
INPUT (dBm)
Figure 14. VRMS Output Delta from +25°C Output Voltage for
50 Devices at −40°C and +85°C, 1900 MHz Frequency
3
2
1
0
ERROR (dB)
–1
–2
–3
–25 –20 –15 –10 –5 0 5 10 15
INPUT (dBm)
Figure 15. VRMS Output Delta from +25°C Output Voltage for
50 Devices at −40°C and +85°C, 3500 MHz Frequency
07631-014
07631-015
Rev. A | Page 9 of 28
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