Datasheet ADL5385 Datasheet (ANALOG DEVICES)

50 MHz to 2200 MHz

FEATURES

Output frequency range: 50 MHz to 2200 MHz
1 dB output compression: 11 dBm @ 350 MHz
Noise floor: –159 dBm/Hz @ 350 MHz
Sideband suppression: −50 dBc @ 350 MHz
Carrier feedthrough: −46 dBm @ 350 MHz
Single supply: 4.75 V to 5.5 V
24-lead, Pb-free LFCSP_VQ with exposed paddle

APPLICATIONS

Radio-link infrastructure
Cable modem termination systems
Wireless infrastructure systems
Wireless local loop
WiMAX/broadband wireless access systems

PRODUCT DESCRIPTION

The ADL5385 is a silicon, monolithic, quadrature modulator
designed for use from 50 MHz to 2200 MHz. Its excellent phase
accuracy and amplitude balance enable both high performance
intermediate frequency (IF) and direct radio frequency (RF)
modulation for communication systems.

The AD5385 takes the signals from two differential baseband
inputs and modulates them onto two carriers in quadrature
with each other. The two internal carriers are derived from
a single-ended, external local oscillator input signal at twice the
frequency as the desired carrier output. The two modulated
signals are summed together in a differential-to-single-ended
amplifier designed to drive 50 Ω loads.

Quadrature Modulator

ADL5385

FUNCTIONAL BLOCK DIAGRAM

ENBL

BIAS

IBBP

IBBN

LOIP

DIVIDE-BY-2

QUADRATURE

LOIN

QBBP

QBBN

SPLITTER

The ADL5385 can be used as either an IF or a direct-to-RF
modulator in digital communication systems. The wide
baseband input bandwidth allows for either baseband drive or
drive from a complex IF. Typical applications are in radio-link
transmitters, cable modem termination systems, and broadband
wireless access systems.

The ADL5385 is fabricated using the Analog Devices, Inc.,
advanced silicon germanium bipolar process and is packaged in
a 24-lead, Pb-free LFCSP_VQ with exposed paddle.
Performance is specified over –40°C to +85°C. A Pb-free
evaluation board is also available.

PHASE

Figure 1.

TEMPERATURE

SENSOR

TEMP

VOUT

6118-001

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2006 Analog Devices, Inc. All rights reserved.

ADL5385

TABLE OF CONTENTS

Features.............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

Product Description......................................................................... 1

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 6

ESD Caution.................................................................................. 6

Pin Configuration and Functional Descriptions.......................... 7

Typical Performance Characteristics ............................................. 8

Circuit Description......................................................................... 12

Overview...................................................................................... 12

LO Interface................................................................................. 12

V-to-I Converter......................................................................... 12

Mixers .......................................................................................... 12

D-to-S Amplifier......................................................................... 12

Bias Circuit.................................................................................. 12

Basic Connections .......................................................................... 13

Optimization............................................................................... 13

Applications..................................................................................... 15

DAC Modulator Interfacing ..................................................... 15

155 Mbps (STM-1) 128 QAM Transmitter............................. 16

CMTS Transmitter Application................................................ 16

Spectral Products from Harmonic Mixing............................. 17

RF Second-Order Products....................................................... 17

LO Generation Using PLLs ....................................................... 18

Transmit DAC Options ............................................................. 18

Modulator/Demodulator Options ........................................... 18

Evaluation Board............................................................................ 19

Characterization Setup .................................................................. 21

SSB Setup..................................................................................... 21

Outline Dimensions....................................................................... 22

Ordering Guide .......................................................................... 22

REVISION HISTORY

10/06—Revision 0: Initial Version

Rev. 0 | Page 2 of 24

ADL5385

SPECIFICATIONS

Unless otherwise noted, VS = 5 V; TA = 25°C; LO = −7 dBm; I/Q inputs = 1.4 V p-p differential sine waves in quadrature on a 500 mV dc
bias; baseband frequency = 1 MHz; LO source and RF output load impedances are 50 Ω.

Table 1.

Parameter Conditions Min Typ Max Unit

OUTPUT FREQUENCY RANGE 50 2200 MHz
EXTERNAL LO FREQUENCY

RANGE
OUTPUT FREQUENCY = 50 MHz

Output Power Single (lower) sideband output 4 5.6 8 dBm
Output P1 dB 11 dBm
Carrier Feedthrough Unadjusted (nominal drive level) −57 dBm
@ +85°C after optimization at +25°C −67 dBm
@ −40°C after optimization at +25°C −67 dBm
Sideband Suppression Unadjusted (nominal drive level) −57 dBc
@ +85°C after optimization at +25°C −64 dBc
@ −40°C after optimization at +25°C −68 dBc
Second Baseband Harmonic (FLO − (2 × FBB)), P
Third Baseband Harmonic (FLO + (3 × FBB)), P
Output IP2 F1 = +3.5 MHz, F2 = +4.5 MHz, P
Output IP3 F1 = +3.5 MHz, F2 = +4.5 MHz, P
Quadrature Phase Error −0.17 degrees
I/Q Amplitude Balance −0.03 dB
Noise Floor 20 MHz offset from LO, all BB inputs at a bias of 500 mV −155 dBm/Hz

20 MHz offset from LO, output power = −5 dBm −150 dBm/Hz

Output Return Loss −19 dB

OUTPUT FREQUENCY = 140 MHz

Output Power Single (lower) sideband output 5.7 dBm
Output P1 dB 11 dBm
Carrier Feedthrough Unadjusted (nominal drive level) −52 dBm
@ +85°C after optimization at +25°C −66 dBm
@ −40°C after optimization at +25°C −67 dBm
Sideband Suppression Unadjusted (nominal drive level) −53 dBc
@ +85°C after optimization at +25°C −63 dBc
@ −40°C after optimization at +25°C −68 dBc
Second Baseband Harmonic (FLO − (2 × FBB)), P
Third Baseband Harmonic (FLO + (3 × FBB)), P
Output IP2 F1 = +3.5 MHz, F2 = +4.5 MHz, P
Output IP3 F1 = +3.5 MHz, F2 = +4.5 MHz, P
Quadrature Phase Error −0.33 degrees
I/Q Amplitude Balance −0.03 dB
Noise Floor 20 MHz offset from LO, all BB inputs at a bias of 500 mV −160 dBm/Hz
Output Return Loss −20 dB

OUTPUT FREQUENCY = 350 MHz

Output Power Single (lower) sideband output 3 5.6 7 dBm
Output P1 dB 11 dBm
Carrier Feedthrough Unadjusted (nominal drive level) −46 dBm
@ +85°C after optimization at +25°C −65 dBm
@ −40°C after optimization at +25°C −66 dBm
Sideband Suppression Unadjusted (nominal drive level) −50 dBc
@ +85°C after optimization at +25°C −63 dBc
@ −40°C after optimization at+25°C −61 dBc

External LO frequency is twice output frequency 100 4400 MHz

= 5 dBm −83 dBc

OUT

= 5 dBm −58 dBc

OUT

= −3 dBm per tone 69 dBm

OUT

= −3 dBm per tone 26 dBm

OUT

= 5 dBm −83 dBc

OUT

= 5 dBm −57 dBc

OUT

= −3 dBm per tone 70 dBm

OUT

=−3 dBm per tone 26 dBm

OUT

Rev. 0 | Page 3 of 24

ADL5385

Parameter Conditions Min Typ Max Unit

Second Baseband Harmonic (FLO − (2 × FBB)), P
Third Baseband Harmonic (FLO + (3 × FBB)), P
Output IP2 F1 = 3.5 MHz, F2 = 4.5 MHz, P
Output IP3 F1 = 3.5 MHz, F2 = 4.5 MHz, P
Quadrature Phase Error 0.39 degrees
I/Q Amplitude Balance −0.03 dB
Noise Floor 20 MHz offset from LO, all BB inputs at a bias of 500 mV −159 dBm/Hz

20 MHz offset from LO, output power = −5 dBm −157 dBm/Hz

Output Return Loss −21 dB

OUTPUT FREQUENCY = 860 MHz

Output Power Single (lower) sideband output 2.5 5.3 6.5 dBm
Output P1 dB 11 dBm
Carrier Feedthrough Unadjusted (nominal drive level) −41 −35 dBm
@ +85°C after optimization at +25°C −63 dBm
@ −40°C after optimization at +25°C −65 dBm
Sideband Suppression Unadjusted (nominal drive level) −41 −35 dBc
@ +85°C after optimization at +25°C −58 dBc
@ −40°C after optimization at +25°C −59 dBc
Second Baseband Harmonic (FLO − (2 × FBB)), P
Third Baseband Harmonic (FLO + (3 × FBB)), P
Output IP2 F1 = +3.5 MHz, F2 = +4.5 MHz, P
Output IP3 F1 = +3.5 MHz, F2 = +4.5 MHz, P
Quadrature Phase Error 0.67 degrees
I/Q Amplitude Balance −0.03 dB
Noise Floor 20 MHz offset from LO, all BB inputs at a bias of 500 mV −159 dBm/Hz

20 MHz offset from LO, output power = −5 dBm −157 dBm/Hz

Output Return Loss −19 dB

OUTPUT FREQUENCY =
1450 MHz

Output Power Single (lower) sideband output 4.4 dBm
Output P1 dB 10 dBm
Carrier Feedthrough Unadjusted (nominal drive level) −36 dBm
@ +85°C after optimization at +25°C −50 dBm
@ −40°C after optimization at +25°C −50 dBm
Sideband Suppression Unadjusted (nominal drive level) −44 dBc
@ +85°C after optimization at +25°C −61 dBc
@ −40°C after optimization at +25°C −51 dBc
Second Baseband Harmonic (F

− (2 × FBB)), P

LO

Third Baseband Harmonic (FLO + (3 × FBB)), P
Output IP2 F1 = 3.5 MHz, F2 = 4.5 MHz, P
Output IP3 F1 = 3.5 MHz, F2 = 4.5 MHz, P
Quadrature Phase Error 0.42 degrees
I/Q Amplitude Balance −0.02 dB
Noise Floor 20 MHz offset from LO, all BB inputs at a bias of 500 mV −160 dBm/Hz
Output Return Loss −33 dB

OUTPUT FREQUENCY =
1900 MHz

Output Power Single (lower) sideband output 3.4 dBm
Output P1 dB 9 dBm
Carrier Feedthrough Unadjusted (nominal drive level) −35 dBm
@ +85°C after optimization at +25°C −51 dBm
@ −40°C after optimization at +25°C −51 dBm

Sideband Suppression Unadjusted (nominal drive level) −33 dBc

= 5 dBm −80 dBc

OUT

= 5 dBm −53 dBc

OUT

= −3 dBm per tone 71 dBm

OUT

= −3 dBm per tone 26 dBm

OUT

= 5 dBm −73 −57 dBc

OUT

= 5 dBm −50 −45 dBc

OUT

= −3 dBm per tone 70 dBm

OUT

= −3 dBm per tone 25 dBm

OUT

= 4 dBm −64 dBc

OUT

= 4 dBm −52 dBc

OUT

= −3 dBm per tone 63 dBm

OUT

= −3 dBm per tone 24 dBm

OUT

Rev. 0 | Page 4 of 24

ADL5385

Parameter Conditions Min Typ Max Unit

@ +85°C after optimization at +25°C −43 dBc
@ −40°C after optimization at +25°C −47 dBc
Second Baseband Harmonic (FLO − (2 × FBB)), P
Third Baseband Harmonic (FLO + (3 × FBB)), P
Output IP2 F1 = +3.5 MHz, F2 = +4.5 MHz, P
Output IP3 F1 = +3.5 MHz, F2 = +4.5 MHz, P
Quadrature Phase Error 2.6 degrees
I/Q Amplitude Balance 0.003 dB
Noise Floor 20 MHz offset from LO, all BB inputs at a bias of 500 mV −160 dBm/Hz

20 MHz offset from LO, output power = −5 dBm −156 dBm/Hz

Output Return Loss −20 dB

OUTPUT FREQUENCY =
2150 MHz

Output Power Single (lower) sideband output 2.6 dBm
Output P1 dB 8 dBm
Carrier Feedthrough Unadjusted (nominal drive level) −36 dBm
@ +85°C after optimization at +25°C −47 dBm
@ −40°C after optimization at +25°C −48 dBm
Sideband Suppression Unadjusted (nominal drive level) −37 dBc

Second Baseband Harmonic (FLO − (2 × FBB)), P
Third Baseband Harmonic (FLO + (3 × FBB)), P
Output IP2 F1 = +3.5 MHz, F2 = +4.5 MHz, P
Output IP3 F1 = +3.5 MHz, F2 = +4.5 MHz, P
Quadrature Phase Error 1.5 degrees
I/Q Amplitude Balance < 0.05 dB
Noise Floor 20 MHz offset from LO, all BB inputs at a bias of 500 mV −160 dBm/Hz

20 MHz offset from LO, output power = −5 dBm −156 dBm/Hz

Output Return Loss −15 dB

LO INPUTS Pin LOIP and Pin LOIN

LO Drive Level Characterization performed at typical level −10 –7 +5 dBm
Input Impedance 50 Ω
Input Return Loss 350 MHz, LOIN ac-coupled to ground −20 dB

BASEBAND INPUTS Pin IBBP, Pin IBBN, Pin QBBP, Pin QBBN

I and Q Input Bias Level 500 mV
Input Bias Current −70 µA
Bandwidth (0.1 dB) RF = 500 MHz, output power = 0 dBm 80 MHz
Bandwidth (3 dB) RF = 500 MHz, output power = 0 dBm >500 MHz

ENABLE INPUT ENBL

Turn-On Settling Time ENBL = high (for output to within 0.5 dB of final value) 1.0 µs
Turn-Off Settling Time ENBL = low (at supply current falling below 20 mA) 1.4 µs
ENBL High Level (Logic 1) 1.5 V
ENBL Low Level (Logic 0) 0.4 V

TEMPERATURE OUTPUT TEMP

Output Voltage
Temperature Slope

= 27.15°C, 300K, RL = 1 MΩ (after full warmup)

T

A

−40°C ≤ T

≤ +85°C, RL = 1 MΩ

A

Output Impedance 1.0 kΩ

POWER SUPPLIES Pin VPS1 and Pin VPS2

Voltage 4.75 5.5 V
Supply Current ENBL = high 215 240 mA

ENBL = low 80 µA

= 3 dBm −58 dBc

OUT

= 3 dBm −47 dBc

OUT

= −3 dBm per tone 57 dBm

OUT

= −3 dBm per tone 22 dBm

OUT

= 2.6 dBm −56 dBc

OUT

= 2.6 dBm −45 dBc

OUT

= −3 dBm per tone 54 dBm

OUT

= −3 dBm per tone 21 dBm

OUT

1.56 V

4.6

mV/°C

Rev. 0 | Page 5 of 24

ADL5385

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

Supply Voltage VPOS 5.5 V
IBBP, IBBN, QBBP, QBBN Range 0 V to 2.0 V
LOIP and LOIN 13 dBm
Internal Power Dissipation 1.375 W
θJA (Exposed Paddle Soldered Down) 58°C/W
Maximum Junction Temperature 164°C
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C

ESD CAUTION

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

Rev. 0 | Page 6 of 24

ADL5385

PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS

24 VPS3

23 VPS3

22 LOIN

21 LOIP

20 COM3

19 COM3

PIN 1
INDICATOR

1NC
2NC
3NC

EXPOSED

PADDLE

4COM1
5COM1
6COM1

9

7

8

OUT

VPS1

VPS1

V

ADL5385

4 × 4 LFCSP

NC = NO CONNECT

Figure 2. Pin Configuration

Table 3. Pin Function Descriptions

Pin No. Mnemonic Description

1, 2, 3 NC No Connection. These pins can be left open or tied to ground.
4, 5, 6, 15,

16, 19, 20

COM1, COM2,
COM3

Power Supply Common Pins. COM1, COM2, and COM3 must all be connected to a ground plane via a

low impedance path.
7 VOUT Device Output. Single-ended, 50 Ω internally biased RF/IF output; pin must be ac-coupled to the load.
8, 9, 11, 23,

24

VPS1, VPS2,
VPS3

Power Supply Pins. Decouple each pin with a 0.1 F capacitor; Pin 8 and Pin 9 can share a single

capacitor, as can Pin 23 and Pin 24. All pins must be connected to the same supply (V
10 TEMP Temperature Sensor Output. Provides dc voltage proportional to die temperature. Slope is 4.6 mV/°C
12 ENBL

Device Enable. Shuts device down when grounded and enables device when pulled to supply

voltage.
13, 14, 17,

18

IBBP, IBBN,
QBBN, QBBP

Differential In-Phase and Quadrature Baseband Inputs. These high impedance inputs must be

externally dc-biased to 500 mV dc and driven from a low impedance source. Nominal characterized

ac signal swing is 700 mV p-p on each pin (150 mV to 850 mV). This results in a differential drive of

1.4 V p-p with a 500 mV dc bias.

21 LOIP

Single-Ended Two-Times Local Oscillator Input. This input is internally biased and must be

ac-coupled to the LO source.
22 LOIN Common for LO Input. Must be ac-coupled to ground through a low impedance path.

18 Q BBP
17 Q BBN
16 CO M2
15 CO M2
14 I BBN
13 I BBP

11

12

10

VPS2

ENBL

TEMP

6118-002

).

s

Rev. 0 | Page 7 of 24

ADL5385

–

R

TYPICAL PERFORMANCE CHARACTERISTICS

Unless otherwise noted, VS = 5 V; TA = 25°C; LO = −7 dBm; I/Q inputs = 1.4 V p-p differential sine waves in quadrature on a 500 mV dc bias;
baseband frequency = 1 MHz; LO source and RF output load impedances are 50 Ω.

8

7

6

5

4

3

2

1

0

–1

SSB OUTPUT POWER (dBm)

–2

–3

–4

50 550 1050 1550 2050

OUTPUT FREQUENCY (MHz)

Figure 3. Single Sideband (SSB) Output Power (P

and Power Supply

8

7

6

5

4

3

2

SSB OUTPUT POWER (dBm)

1

VS = 5.5V
V

= 5.V

S

V

= 4.75V

S

) vs. Output Frequency

OUT

TA = –40°C
T

= +25°C

A

T

= +85°C

A

06118-003

14

13

12

11

10

9

8

7

OUTPUT P1dB (dBm)

6

5

4

50 550 1050 1550 2050

OUTPUT FREQUENCY (MHz)

VS = 5.5V
V

= 5.V

S

V

= 4.75V

S

Figure 6. Output 1 dB Compression Point (OP1dB) vs. Output Frequency

and Power Supply

14

12

10

8

6

OUTPUT P1dB (dBm)

4

2

TA = –40°C
T

= +25°C

A

T

= +85°C

A

06118-006

0

50 550 1050 1550 2050

OUTPUT FREQUENCY (MHz)

Figure 4. Single Sideband (SSB) Output Power (P

) vs. Output Frequency

OUT

6118-004

and Temperature

2.0

1.5

1.0

0.5

0

–0.5

–1.0

OUTPUT PO WER VARIANCE (d B)

–1.5

–2.0

10M 100M 1G

BASEBAND FREQUENCY (Hz )

06118-005

Figure 5. Baseband Frequency Response Normalized to Response for 1 MHz

BB Signal; Carrier Frequency = 500 MHz

0

50 550 1050 1550 2050

OUTPUT FREQUENCY (MHz)

Figure 7. Output 1 dB Compression Point (OP1dB) vs. Output Frequency

and Temperature

20

SSB OUTPUT POWER (dBm)
CARRIER FEEDTHRO UGH (dBm)
SIDEBAND SUPPRESSION (dBc)
SECOND-ORDER DISTORTION (dBc)

–30

THIRD-ORDER DISTORTION (dBc)

–40

–50

–60

SIDEBAND SUPPRESSI ON

–70

DISTORTI ON, CARRIER FEE DTHROUGH,

SECOND-ORDER DIST ORTION, THIRD-ORDE

–80

0.2 0.6 1.0 1.4 1.8 2.2 2.6 3.0 3.4

BASEBAND AMPLITUDE (V p-p)

15

10

5

0

–5

–10

–15

Figure 8. SSB Output Power, Second- and Third-Order Distortion,

Carrier Feedthrough and Sideband Suppression vs. Differential

Baseband Input Level; Output Frequency = 350 MHz

06118-007

OUTPUT AMPL ITUDE (dBm)

06118-008

Rev. 0 | Page 8 of 24

ADL5385

–

–

20

SSB OUTPUT POWER (dBm)
CARRIER FEEDT HROUGH (dBm)
SIDEBAND SUPPRE SSION (d Bc)
SECOND-ORDER DISTORTION (dBc)

–30

THIRD-ORDER DISTORTION (dBc)

–40

–50

–60

SIDEBAND SUPPRESSI ON

–70

DISTORT ION, CARRI ER FEEDT HROUGH,

SECOND-ORDER DI STORT ION, THI RD-ORDER

–80

0.2 0.6 1.0 1.4 1.8 2.2 2.6 3.0 3.4

BASEBAND AMPLIT UDE (V p-p )

15

10

5

0

–5

–10

–15

Figure 9. SSB Output Power, Second- and Third-Order Distortion,

Carrier Feedthrough and Sideband Suppression vs. Baseband Single-

Ended Input Level; Output Frequency = 860 MHz

0

–10

–20

–30

–40

–50

–60

–70

SIDEBAND SUPPRESSI ON (dBc)

–80

–90

50 550 1050 1550 2050

OUTPUT FREQUENCY (MHz)

TA = –40°C
T

= +25°C

A

T

= +85°C

A

OUTPUT AM PLITUDE (dBm)

6118-010

0.7100

0.7075

0.7050

0.7025

0.7000

0.6975

AMPLITUDE (V)

0.6950

0.6925

0.6900

06118-009

50 250 450 650 850 1050 1250 1450 1650 1850

OUTPUT FREQUENCY (MHz)

6118-012

Figure 12. Distribution of Peak Q Amplitude to Null Undesired Sideband

(Peak I Amplitude Held Constant at 0.7 V)

98

97

96

95

94

93

92

PHASE (Degrees)

91

90

89

88

50 250 450 650 850 1050 1250 1450 1650 1850

OUTPUT FREQUENCY (MHz)

06118-013

Figure 10. Sideband Suppression vs. Output Frequency and

Temperature

20

–25

–30

–35

–40

–45

–50

–55

–60

SIDEBAND SUPPRESSI ON (dBc)

–65

–70

1M 10M 100M

BASEBAND FREQUENCY (Hz)

Figure 11. Sideband Suppression vs. Baseband Frequency;

Output Frequency = 350 MHz

06118-011

Rev. 0 | Page 9 of 24

Figure 13. Distribution of IQ Phase to Null Undesired Sideband

0

–10

–20

–30

–40

–50

–60

–70

SIDEBAND SUPRESSI ON (dBc)

–80

–90

50 250 450 650 850 1050 1250 1450 1650 1850

OUTPUT FREQUENCY (MHz)

TA = –40°C
T

= +25°C

A

T

= +85°C

A

Figure 14. Sideband Suppression Distribution at Temperature Extremes,

After Sideband Suppression Nulled to < −50 dBc at T

= +25°C

A

6118-014

ADL5385

–

–

–

20

–30

–40

–50

–60

–70

SIDEBAND SUPPRESSION (dBc)

–80

–90

–10–8–6–4–2 0 2 4

LO AMPL ITUDE (dBm)

Figure 15. Distribution of Sideband Suppression vs. LO Input Power at

50 MHz and 350 MHz

50MHz
350MHz

0.010

0.008

0.006

0.004

0.002

0

–0.002

OFFSET (V)

–0.004

–0.006

–0.008

–0.010

50 550 1050 1550 2050

06118-015

OUTPUT F REQUENCY (MHz)

Q OFFSET

I OFFSET

06118-018

Figure 18. Distribution of I and Q Offset Required to Null Carrier

Feedthrough

20

–30

–40

–50

–60

CARRIER FEEDTHROUG H (dBm)

–70

–80

50 550 1050 1550 2050

OUTPUT FREQUENCY (MHz)

TA = –40°C
T

= +25°C

A

T

= +85°C

A

Figure 16. Distribution Carrier Feedthrough vs. Output Frequency and

Temperature

0

–10

–20

–30

–40

–50

–60

–70

CARRIER FEEDTHRO UGH (dBm)

–80

–90

50 550 1050 1550 2050

OUTPUT FREQUENCY (MHz)

TA = –40°C
T

= +25°C

A

T

= +85°C

A

Figure 17. Carrier Feedthrough Distribution at Temperature Extremes,

After Nulling to < −65 dBm at T

= +25°C

A

20

–30

–40

–50

–60

–70

CARRIER FEEDTHRO UGH (dBm)

–80

–90

–10 –8 –6 –4 –2 0 2 4

06118-016

LO AMPLI TUDE (dBm)

50MHz
350MHz

06118-019

Figure 19. Distribution Carrier Feedthrough vs. LO Input Power at

50 MHz and 350 MHz

80

70

60

50

40

30

OIP2 AND OIP 3 (dBm)

20

10

0

50 550 1050 1550 2050

06118-017

OUTPUT FREQUENCY (MHz)

OIP2

OIP3

TA = –40°C
T

= +25°C

A

T

= +85°C

A

06118-020

Figure 20. OIP3 and OIP2 vs. Output Frequency and Temperature

Rev. 0 | Page 10 of 24

ADL5385

20

18

16

14

12

10

8

NUMBER OF PARTS

6

4

2

0

–156.7 –156.6 –156.5 –156.4 –156.3 –156.2 –156.1 –156.0 –155.9

dBm/Hz AT 20MHz OFFSE T FROM L O FREQUE NCY

Figu re 21. 20 MH z Offs et Noise Floor Distribution,

Output Frequency = 350 MHz, P

= −5 dBm, QPSK Carrier,

OUT

Symbol Rate = 3.84 MSPS

20

18

16

14

12

10

8

NUMBER OF PARTS

6

4

2

0

–155.1 –155.0 –154.9 –154.8 –154.7 –154.6 –154.5 –154.4

–155.2

dBm/Hz AT 12MHz OFFSET FROM LO FREQUENCY

Figure 22. 12 MHz Offset Noise Floor Distribution,

Output Frequency = 860 MHz, P

= −5 dBm, 64 QAM Carrier,

OUT

Symbol Rate = 5 MSPS

0

90

120

150

S22 OF OUTPUT

2200MHz

50MHz

210

6118-021

240

S11 OF LO IP

100MHz

270

60

4400MHz

300

30

330

0180

06118-024

Figure 24. Output Impedance and LO Input Impedance vs. Frequency

0.300

0.275

0.250

0.225

0.200

SUPPLY CURRENT (A)

0.175

06118-022

0.150
–40 25 85

TEMPERATURE ( °C)

VS = 5.5V
V

= 5V

S

V

= 4.75V

S

06118-025

Figure 25. Power Supply Current vs. Temperature and Supply Voltage

–5

–10

–15

RETURN LOSS (d B)

–20

–25

100 530 960 1390 1820 2250 2680 3110 3540 3970 4400

LOIP FRE QUENCY (MHz)

Figure 23. LO Port Input Return Loss vs. Frequency

6118-023

Rev. 0 | Page 11 of 24

ADL5385

CIRCUIT DESCRIPTION

OVERVIEW

The ADL5385 can be divided into five sections: the local
oscillator (LO) interface, the baseband voltage-to-current (V-to-I)
converter, the mixers, the differential-to-single-ended (D-to-S)
amplifier, and the bias circuit. A detailed block diagram of the
device is shown in Figure 26.

ENBL

BIAS

IBBP

IBBN

LOIP

DIVIDE-BY-2

QUADRATURE

LOIN

QBBP

QBBN

Figure 26. ADL5385 Block Diagram

The LO interface generates two LO signals at 90° of phase
difference to drive two mixers in quadrature. Baseband signals
are converted into currents by the V-to-I converters that feed
into the two mixers. The outputs of the mixers are combined in
the differential-to-single-ended amplifier, which provides a 50 Ω
output interface. Reference currents to each section are
generated by the bias circuit. A detailed description of each
section follows.

PHASE

SPLITTER

TEMPERATURE

SENSOR

TEMP

VOUT

6118-001

V-TO-I CONVERTER

The differential baseband input voltages that are applied to the
baseband input pins are fed to a pair of common-emitter,
voltage-to-current converters. The output currents then
modulate the two half-frequency LO carriers in the mixer stage.

MIXERS

The ADL5385 has two double-balanced mixers: one for the in­phase channel (I channel) and one for the quadrature channel
(Q channel). These mixers are based on the Gilbert cell design
of four cross-connected transistors. The output currents from
the two mixers are summed together in the resistor-inductor
(RL) loads in the D-to-S amplifier.

D-TO-S AMPLIFIER

The output D-to-S amplifier consists of two emitter followers
driving a totem-pole output stage. Output impedance is
established by the emitter resistors in the output transistors.
The output of this stage connects to the output (VOUT) pin.

BIAS CIRCUIT

A band gap reference circuit generates the proportional-to­absolute-temperature (PTAT) as well as temperature-independ­ent reference currents used by different sections. The band-gap
circuit is turned on by a logic HIGH at the ENBL pin, which in
turn powers up the whole device. A PTAT voltage output is
available at the TEMP pin, which can be used for temperature
monitoring as well as for temperature compensation purposes.

LO INTERFACE

The LO interface consists of a buffer amplifier followed by a
pair of frequency dividers that generate two carriers at half the
input frequency and in quadrature with each other. Each carrier
is then amplified and amplitude-limited to drive the double­balanced mixers.

Rev. 0 | Page 12 of 24

ADL5385

V

–

BASIC CONNECTIONS

Figure 27 shows the basic connections for the ADL5385.

QBBP

RFPQ

CFPQ
OPEN

CLOP

LO

0.1µF

CLON

0.1µF

R11
0Ω

C11

C12

OPEN

0.1µF

POS

GND

QBBN

RFNQ

RTQ

19 COM3

20 COM3

21 LOIP

22 LOIN

23 VPS3

24 VPS3

0Ω

QBBP 18

1 NC

CFNQ
OPEN

QBBN 17

EXPOSED PADDLE

2 NC

0Ω

OPEN

Figure 27. Basic Connections for the ADL5385

Power Supply and Grounding

All the VPS pins must be connected to the same 5 V source. Adja­cent pins of the same name can be tied together and decoupled with
a 0.1 μF capacitor. These capacitors are located as close as possible
to the device. The power supply can range from 4.75 V to 5.5 V.

The COM1 pin, COM2 pin, and COM3 pin are tied to the same
ground plane through low impedance paths. The exposed
paddle on the underside of the package is also soldered to a low
thermal and electrical impedance ground plane. If the ground
plane spans multiple layers on the circuit board, they should be
stitched together with nine vias under the exposed paddle. The
Analog Devices AN-772 application note discusses the thermal
and electrical grounding of the LFCSP in greater detail.

Baseband Inputs

The baseband inputs QBBP, QBBN, IBBP, and IBBN must be
driven from a differential source. The nominal drive level of

1.4 V p-p differential (700 mV p-p on each pin) is biased to
a common-mode level of 500 mV dc.

The dc common-mode bias level for the baseband inputs can
range from 400 mV to 600 mV. This results in a reduction in the
usable input ac swing range. The nominal dc bias of 500 mV
allows for the largest ac swing, limited on the bottom end by the
ADL5385 input range and on the top end by the output
compliance range on most Analog Devices DACs.

LO Input

A single-ended LO signal is applied to the LOIP pin through an
ac coupling capacitor. The recommended LO drive power is

−7 dBm. The LO return pin, LOIN, must be ac-coupled to
ground though a low impedance path.

The nominal LO drive of −7 dBm can be increased to up to
+5 dBm. The effect of LO power on sideband suppression and
carrier feedthrough is shown in Figure 15 and Figure 19.

COM2 16

ADL5385

4 × 4 LFCSP

3 NC

CFNI
OPEN

COM2 15

4 COM1

IBBN

RFNI

IBBN 14

5 COM1

0Ω

IBBP 13

ENBL 12

VPS2 11

TEMP 10

VPS1 9

VPS1 8

VOUT 7

6 COM1

OPEN

IBBP

RFPI

CFPI

0Ω

OPEN

RTI

R21

49.9Ω

ENB

R13
0Ω

C16

0.1µF

RTEMP

200Ω

R12

0Ω

C14

0.1µF

COUT

0.1µF

C13
OPEN

C15
OPEN

ON

OFF

SW21

ENBL

R22
10kΩ

VPOS

TEMP

VPOS

VOUT

06118-041

RF Output

The RF output is available at the VOUT pin (Pin 7). This pin
must also be ac-coupled. The VOUT pin has a nominal
broadband impedance of 50 Ω and does not need further
external matching.

OPTIMIZATION

The carrier feedthrough and sideband suppression performance
of the ADL5385 can be improved through the use of optimiza­tion techniques.

Carrier Feedthrough Nulling

Carrier feedthrough results from minute dc offsets that occur
between each of the differential baseband inputs. In an ideal
modulator, the quantities (V
are equal to zero, and this results in no carrier feedthrough. In
a real modulator, those two quantities are nonzero and, when
mixed with the LO, result in a finite amount of carrier feedthrough.
The ADL5385 is designed to provide a minimal amount of carrier
feedthrough. If even lower carrier feedthrough levels are required,
minor adjustments can be made to the (V
V

) offsets. The I-channel offset is held constant while the

QOPN

Q-channel offset is varied until a minimum carrier feedthrough
level is obtained. The Q-channel offset required to achieve this
minimum is held constant while the offset on the I-channel is
adjusted, until a better minimum is reached. Through two
iterations of this process, the carrier feedthrough can be
reduced to as low as the output noise. The ability to null is
sometimes limited by the resolution of the offset adjustment.
Figure 28 shows the relationship of carrier feedthrough vs. dc offset.

58

–62

–66

–70

–74

–78

–82

–86

CARRIER FEEDTHRO UGH (dBm)

–90

–94

–420

–300

–240

–360

Figure 28. Carrier Feedthrough vs. DC Offset Voltage at 450 MHz

Note that throughout the nulling process, the dc bias for the
baseband inputs remains at 500 mV. When no offset is applied,

= V

− V

IOPN

IOPN

= 500 mV, or
= V

= 0 V

IOS

V

IOPP

V

IOPP

− V

IOPP

0

–60

–180

–120

VP-VN OFFEST (µV)

IOPN

60

) and (V

− V

IOPP

180

120

QOPP

IOPN

240

− V

QOPN

) and (V

300

360

)

QOPP

06118-029

420

−

Rev. 0 | Page 13 of 24

ADL5385

–

When an offset of +V

= 500 mV + V

V

IOPP

V

= 500 mV − V

IOPN

− V

V

IOPP

IOPN

The same applies to the Q channel.

It is often desirable to perform a one-time carrier null
calibration. This is usually performed at a single frequency.
Figure 29 shows how carrier feedthrough varies with LO
frequency over a range of ±50 MHz on either side of a null at
350 MHz.

25

–30

–35

–40

–45

–50

–55

–60

–65

–70

CARRIER FEEDTHROUG H (dBm)

–75

–80

–85

310 400

Figure 29. Carrier Feedthrough vs. Frequency After Nulling at 350 MHz

is applied to the I-channel inputs,

IOS

/2, while

IOS

/2, such that

IOS

= V

IOS

320 330 340 350 360 370 380 390300

OUTPUT FREQUENCY (MHz)

Sideband Suppression Optimization

Sideband suppression results from relative gain and relative
phase offsets between the I and Q channels and can be
suppressed through adjustments to those two parameters.
Figure 30 illustrates how sideband suppression is affected by the
gain and phase imbalances.

0

–10

2.5dB

–20

1.25dB

0.5dB

–30

0.25dB

–40

0.125dB

0.05dB

–50

0.025dB

–60

0.0125dB

–70

SIDEBAND SUPRESSI ON (dBc)

0dB

–80

–90

0.01 0. 1 1 10 100

PHASE ERROR (Deg rees)

06118-028

Figure 30. Sideband Suppression vs. Quadrature Phase Error for Various

Quadrature Amplitude Offsets

06118-027

Figure 30 underscores the fact that adjusting one parameter
improves the sideband suppression only to a point; the other
parameter must also be adjusted. For example, if the amplitude
offset is 0.25 dB, improving the phase imbalance better than 1°
does not yield any improvement in the sideband suppression.
For optimum sideband suppression, an iterative adjustment
between phase and amplitude is required.

The sideband suppression nulling can be performed either through
adjusting the gain for each channel or through the modification
of the phase and gain of the digital data coming from the digital
signal processor.

Rev. 0 | Page 14 of 24

ADL5385

APPLICATIONS

DAC MODULATOR INTERFACING

The ADL5385 is designed to interface with minimal components
to members of the Analog Devices family of digital-to-analog
converters (DAC). These DACs feature an output current swing
from 0 to 20 mA, and the interface described in this section can
be used with any DAC that has a similar output.

Driving the ADL5385 with an Analog Devices TxDAC®

An example of the interface using the AD9777 TxDAC is shown
in Figure 31. The baseband inputs of the ADL5385 require a dc
bias of 500 mV. The average output current on each of the
outputs of the AD9777 is 10 mA. Therefore, a single 50 Ω
resistor to ground from each of the DAC outputs results in an
average current of 10 mA flowing through each of the resistors,
thus producing the desired 500 mV dc bias for the inputs to the
ADL5385.

AD9777 ADL5385

Figure 31. Interface Between AD9777 and ADL5385 with 50 Ω Resistors to

Ground to Establish the 500 mV DC Bias for the ADL5385 Baseband Inputs

The AD9777 output currents have a swing that ranges from
0 to 20 mA. With the 50 Ω resistors in place, the ac voltage
swing going into the ADL5385 baseband inputs ranges from
0 V to 1 V. A full-scale sine wave out of the AD9777 can be
described as a 1 V p-p single-ended (or 2 V p-p differential)
sine wave with a 500 mV dc bias.

Limiting the AC Swing

There are situations in which it is desirable to reduce the
ac voltage swing for a given DAC output current. This can be
achieved through the addition of another resistor to the
interface. This resistor is placed in shunt between each side of
the differential pair, as illustrated in Figure 32. It has the effect
of reducing the ac swing without changing the dc bias already
established by the 50 Ω resistors.

I

OUTA1

I

OUTB1

I

OUTB2

I

OUTA2

73

RBIP

50Ω

RBIN

50Ω

72

69

RBQN

50Ω

RBQP

50Ω

68

13

IBBP

14

IBBN

17

QBBN

18

QBBP

06118-030

AD9777 ADL5385

I

OUTA1

I

OUTB1

I

OUTB2

I

OUTA2

73

RBIP

50Ω

RBIN

50Ω

72

69

RBQN

50Ω

RBQP

68

50Ω

RSLI

100Ω

RSLQ

100Ω

13

IBBP

14

IBBN

17

QBBN

18

QBBP

Figure 32. AC Voltage Swing Reduction Through Introduction of Shunt

Resistor Between Differential Pair

The value of this ac voltage swing-limiting resistor is chosen
based on the desired ac voltage swing. Figure 33 shows the
relationship between the swing-limiting resistor and the peak­to-peak ac swing that it produces when 50 Ω bias-setting
resistors are used.

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

DIFFERENTIAL SWING (V p-p)

0.4

0.2

0

10 100 1000 10000

RL (Ω)

06118-031

Figure 33. Relationship Between AC Swing-Limiting Resistor and

Peak-to-Peak Voltage Swing with 50 Ω Bias-Setting Resistors

Filtering

When driving a modulator from a DAC, it is necessary to
introduce a low-pass filter between the DAC and the modulator
to reduce the DAC images. The interface for setting up the
biasing and ac swing lends itself well to the introduction of such
a filter. The filter can be inserted in between the dc bias setting
resistors and the ac swing-limiting resistor, thus establishing the
input and output impedances for the filter.

Examples of filters are discussed in the 155 MBPS (STM-1) 128
QAM Transmitter and the CMTS Transmitter Application
sections.

06118-032

Rev. 0 | Page 15 of 24

ADL5385

–

–

Using AD9777 Auxiliary DAC for Carrier Feedthrough
Nulling

The AD9777 features an auxiliary DAC that can be used to
inject small currents into the differential outputs for each
channel. The auxiliary DAC can produce the small offset
currents necessary to implement the nulling described in the
Carrier Feedthrough Nulling section.

155 Mbps (STM-1) 128 QAM TRANSMITTER

Figure 34 shows how the ADL5385 can be interfaced to the
AD9777 DAC (or any Analog Devices dual DAC with an output
bias level of 0.5 V) to generate a 155 Mbps 128 QAM carrier at
355 MHz. Because the TxDAC output and the IQ modulator inputs
operate at the same bias levels of 0.5 V, a simple dc-coupled
connection can be implemented without any active or passive
level shifting. The bias level and modulator drive level is set by
the 50 Ω ground-referenced resistors and the 100 Ω shunt
resistors, respectively (see the DAC Modulator Interfacing
section). A baseband filter is placed between the bias and signal
swing resistors. This 5-pole Chebychev filter with in-band
ripple of 0.1 dB has a corner frequency of 39 MHz.

I

CHANNEL

1/2

AD9777

Q

CHANNEL

1/2

AD9777

Figure 34. Recommended DAC-Modulator Interconnect for128 QAM

Figure 35 shows a spectral plot of the 128 QAM spectrum at
a carrier power of −6.3 dBm. Figure 36 shows how EVM
(measured with the analyzer’s internal equalizer both on and
off) and SNR, measured at 55 MHz carrier offset (2.5 times the
carrier bandwidth) varies with output power.

70

–80

–90

–100

–110

–120

–130

–140

POWER SPECT RAL DENSITY (dBm/Hz)

–150

–160

Figure 35. Spectral Plot of 128 QAM Transmitter at −6.3 dBm Output Power

290 420410390 400380370360350340330320310300

50Ω LINE

50Ω 67.5pF

50Ω LINE

50Ω 67.5pF

50Ω LINE

50Ω 67.5pF

50Ω LINE

50Ω 67.5pF

317.4nH 372.5nH

156.9pF

317.4nH 372.5nH

156.9pF

317.4nH 372.5nH

156.9pF

317.4nH 372.5nH

156.9pF

Transmitter

FREQUENCY (MHz)

124.7pF

124.7pF

124.7pF

124.7pF

100Ω LINE

100Ω LINE

100Ω LINE

100Ω LINE

0Ω

0Ω

0Ω

0Ω

IBBP

200Ω

IBBN

ADL5385

QBBP

200Ω

QBBN

06118-044

79

77

75

73

SNR (dB)

71

69

67

65

–18 0

CARRIER POWER (d Bm)

EVM WITHOUT EQUALIZATION

EVM WITH EQUALIZATION

SNR

0.7

0.6

0.5

0.4

EVM (%)

0.3

0.2

0.1

06118-042

0

–2–4–6–8–10–12–14–16

Figure 36. EVM and SNR vs. Output Power for 128 QAM Transmitter

Application

CMTS TRANSMITTER APPLICATION

Because of its broadband operating range from 50 MHz to
2200 MHz, the ADL5385 can be used in direct-launch cable
modem termination systems (CMTS) applications in the
50 MHz to 860 MHz cable band.

The same DAC and DAC-to-modulator interface and filtering
circuit shown in Figure 34 was used in this application. Figure 37
shows a plot of a 4-carrier 256 QAM spectrum at an output
frequency of 485 MHz. Figure 38 shows how adjacent channel
power (measured at 750 KHz, 5.25 MHz, and 12 MHz offset
from the last carrier) and modulation error ratio (MER) vary
with carrier power.

06118-046

70

–80

–90

–100

–110

–120

–130

–140

–150

POWER SPECT RAL DENSITY (dBm/Hz)

–160

–170

430 540530520510500490480470460450440

FREQUENCY (MHz )

Figure 37. Spectrum of 4-Carrier 256 QAM CMTS Signal at 485 MHz

06118-043

Rev. 0 | Page 16 of 24

ADL5385

–

50

–55

ACPR (dBc)

–60

–65

–70

–75

–80

–85

–90

–24 –10–12–14–16–18–20–22

ACPR2 (5.25MHz)

ACPR3 (6.00MHz)

ACPR1 (750kHz)

MER

CARRIER POWER ( dBm)

Figure 38. ACP1, ACP2, ACP3, and Modulation Error Ratio (MER) vs. Output

Power for 256 QAM Transmitter

48

47

46

45

44

MER (dBc)

43

42

41

06118-045

40

0

P

P

P

4LO + BB

OUT

3LO + BB

–10

–20

P

–30

(dBm)

–40

HARM

–50

, P_

OUT

–60

P

–70

–80

–90

7LO + BB

0 1000

100 200 300 400 500 600 700 800 900

OUTPUT FREQUENCY (MHz)

P

6LO – BB

P

5LO – BB

P

2LO – BB

06118-035

Figure 39. Spectral Components for Output Frequencies

from 50 MHz to 1000 MHz

SPECTRAL PRODUCTS FROM HARMONIC MIXING

For broadband applications such as cable TV head-end
modulators, special attention must be paid to harmonics of the
LO. Figure 39 shows the level of these harmonics (out to 3 GHz)
as a function of the output frequency from 50 MHz to 1000 MHz,
in a single-sideband (SSB) test configuration, with a baseband
signal of 1 MHz and a SSB level of approximately −5 dBm. To
read this plot correctly, first pick the output frequency of
interest on the trace called P
be read off the harmonic traces at multiples of this frequency.
For example, at an output frequency of 500 MHz, the
fundamental power is −5 dBm. The power of the second
(P

) and third (P

2fc − BB

3fc + BB

and −16 dBm (at 1500 MHz), respectively. Of particular
importance are the products from odd-harmonics of the LO,
generated from the switching operation in the mixers.

For cable TV operation at frequencies above approximately
500 MHz, these harmonics fall out of the band and can be
filtered by a fixed filter. However, as the frequency drops below
500 MHz, these harmonics start to fall close to or inside the
cable band. This calls for either limitation of the frequency
range to above 500 MHz or the use of a switchable filter bank to
block in-band harmonics at low frequencies.

. The associated harmonics can

OUT

) harmonics is −63 dBm (at 1000 MHz)

RF SECOND-ORDER PRODUCTS

A two-tone RF output signal produces second-order spectral
components at sum and difference frequencies. In broadband
systems, these intermodulation products fall inside the carrier
or in the adjacent channels. Output second-order RF
intermodulation intercept is defined as

+ (P

OIP2_RF = P

where P

+ F

F

OUT1

OUT

is the level of the intermodulation product at

IM(RF)

. OIP2_RF levels from a two-tone test are plotted

OUT2

OUT

− P

as a function of carrier frequency in Figure 40, where the
baseband tones are 3.5 MHz and 4.5 MHz at −5 dBm each.

70

60

50

40

30

OIP2_RF (dBm)

20

10

0

0 2250

OUTPUT FREQUENCY (MHz)

Figure 40. Output Second-Order Intermodulation vs. Carrier Frequency

IM(RF)

)

06118-036

20001750150012501000750500250

Rev. 0 | Page 17 of 24

ADL5385

LO GENERATION USING PLLs

Analog Devices has a line of PLLs that can be used for
generating the LO signal. Table 4 lists the PLLs together with
their maximum frequency and phase noise performance.

Table 4. PLL Selection Table

@ 1 kHz Phase Noise

Model Frequency FIN (MHz)

ADF4110 550 −91 @ 540 MHz
ADF4111 1200 −87@ 900 MHz
ADF4112 3000 −90 @ 900 MHz
ADF4113 4000 −91 @ 900 MHz
ADF4116 550 −89 @ 540 MHz
ADF4117 1200 −87 @ 900 MHz
ADF4118 3000 −90 @ 900 MHz

The ADF4360 comes as a family of chips, with nine operating
frequency ranges. One can be chosen depending on the local
oscillator frequency required. While the use of the integrated
synthesizer might come at the expense of slightly degraded
noise performance from the ADL5385, it can be a cheaper
alternative to a separate PLL and VCO solution. Table 5 shows
the options available.

Table 5. ADF4360 Family Operating Frequencies

Model Output Frequency Range (MHz)

ADF4360-0 2400/2725
ADF4360-1 2050/2450
ADF4360-2 1850/2150
ADF4360-3 1600/1950
ADF4360-4 1450/1750
ADF4360-5 1200/1400
ADF4360-6 1050/1250
ADF4360-7 350/1800
ADF4360-8 65/400

dBc/Hz, 200 kHz PFD

TRANSMIT DAC OPTIONS

The AD9777 recommended in the previous sections is by no
means the only DAC that can be used to drive the ADL5385.
There are other appropriate DACs depending on the level of
performance required. Table 6 lists the dual Tx-DACs that
Analog Devices offers.

Table 6. Dual Tx—DAC Selection Table

Update Rate

Part Resolution (Bits)

AD9709 8 125
AD9761 10 40
AD9763 10 125
AD9765 12 125
AD9767 14 125
AD9773 12 160
AD9775 14 160
AD9777 16 160
AD9776 12 1000
AD9778 14 1000
AD9779 16 1000

(MSPS Minimum)

All DACs listed have nominal bias levels of 0.5 V and use the
same DAC-modulator interface shown in Figure 31.

MODULATOR/DEMODULATOR OPTIONS

Table 7 lists other Analog Devices modulators and
demodulators.

Table 7. Modulator/Demodulator Options

Frequency

Part Mod/Demod

AD8345 Mod 140 to 1000
AD8346 Mod 800 to 2500
AD8349 Mod 700 to 2700
ADL5390 Mod 20 to 2400 External Quadrature
ADL5370 Mod 300 to 1000
ADL5371 Mod 700 to 1300
ADL5372 Mod 1600 to 2400
ADL5373 Mod 2300 to 3000
ADL5374 Mod 3000 to 4000
AD8347 Demod 800 to 2700
AD8348 Demod 50 to 1000
AD8340 Vector Mod 700 to 1000
AD8341 Vector Mod 1500 to 2400

Range (MHz)

Comments

Rev. 0 | Page 18 of 24

ADL5385

V

EVALUATION BOARD

A populated, RoHS-compliant ADL5385 evaluation board is available. The ADL5385 has an exposed paddle underneath the package,
which is soldered to the board. The evaluation board is designed without any components on the underside so that heat can be applied to
the underside for easy removal and replacement of the ADL5385.

QBBP

QBBN

IBBN

IBBP

POS

GND

LO

C11
OPEN

R11

0Ω

CFPQ
OPEN

CLOP

0.1µF

CLON

0.1µF

C12

0.1µF

RFPQ

RFNQ

0Ω

RTQ

OPEN

19 COM3

20 COM3

21 LOIP

22 LOIN

23 VPS3

24 VPS3

0Ω

QBBP 18

1 NC

CFNQ
OPEN

COM2 16

QBBN 17

ADL5385

4 × 4 LFCSP

EXPOSED PADDLE

3 NC

2 NC

CFNI
OPEN

COM2 15

4 COM1

IBBN 14

5 COM1

RFNI

0Ω

RTI

OPEN

IBBP 13

ENBL 12

VPS2 11

TEMP 10

VPS1 9

VPS1 8

VOUT 7

6 COM1

RFPI
0Ω

CFPI
OPEN

ENB

C14

0.1µF

R12

0Ω

C16

0.1µF

RTEMP

R13

0Ω

200Ω

COUT

0.1µF

R21

49.9Ω

C13
OPEN

OFF

R22
10kΩ

C15
OPEN

ON

SW21

ENBL

VPOS

TEMP

VPOS

VOUT

06118-041

Figure 41. Evaluation Board Schematic

Table 8. Evaluation Board Configuration Options

Component Function Default Condition

VPOS, GND Power Supply and Ground Clip Leads. Not applicable
SW21, R21,

R22, ENB Test
Point, ENBL

Device Enable. Set SW21 to the OFF position to power down the device; set SW21 to the ON
position to enable the device. Part can be driven from an external enable control source via the
test point or the SMA connector. R21 provides a 50 Ω termination for any 50 Ω driving source.

R21 = 50 Ω, R22 =
10k Ω, SW21 = ON

SMA
RFNQ, CFNQ,

RTQ, CFPQ,
RFPQ, RFNI,
CFNI, RTI, CFPI,
RFPI

Baseband Input Filters. These components can be used to implement a low-pass filter for the
baseband signals.

RFNQ, RFPQ, RFNI
RFPI = 0 Ω (0402)

RTQ, RTI = open
(0402)

CFNQ, CFPQ, CFNI,
CFPI = open (0402)

Rev. 0 | Page 19 of 24

ADL5385

Yuping Toh

06118-039

Figure 42. Layout of Evaluation Board

Rev. 0 | Page 20 of 24

ADL5385

CHARACTERIZATION SETUP

SSB SETUP

Figure 43 is a diagram of the characterization test stand setup for the ADL5385, which is intended to test the product as a single-sideband
modulator. The Aeroflex IFR3416 signal generator provides the I and Q inputs as well as the LO input. Output signals are measured
directly using the spectrum analyzer, and currents and voltages are measured using the Agilent 34401A multimeter.

FREQ 100MHz T O 4GHz L EVEL 0dBm
BIAS 0.5V
BIAS 0.5V
GAIN 0.7V
GAIN 0.7V

AGILENT 34401A MULTIM ETER

0.210 ADC

VPOS +5V

5.0000 0.210A

AGILENT E3631A
POWER SUPPLY

6V

–

+

+

±25V
COM

–

AEROFLEX IFR 3416 250kHz T O 6GHz

SIGNAL GE NERATOR

CONNECT TO BACK OF UNIT

90 DEG

IQ

GND

VPOS

J1(OUT)

J3(QN)

J4(QP) J5(IN)

0 DEG

RF

OUT

ADL5385

J7(LO)

J6(IP)

LO

R&S SPECTRUM ANALY ZER FSU 20Hz T O 8GHz

50MHz TO 2GHz

+6dBm

OUTPUT

RLM TEST RACK 1

DELL

RF

IN

6118-040

Figure 43. ADL5385 Characterization Board SSB Test Setup

Rev. 0 | Page 21 of 24

ADL5385

OUTLINE DIMENSIONS

4.00

PIN 1

INDICATOR

1.00

0.85

0.80

SEATING
PLANE

12° MAX

BSC SQ

TOP

VIEW

0.80 MAX

0.65 TYP

*

COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-2
EXCEPT FOR EXPOSED PAD DIMENSION

0.30

0.23

0.18

3.75

BSC SQ

0.20 REF

0.05 MAX

0.02 NOM

COPLANARITY

0.60 MAX

0.50

BSC

0.50

0.40

0.30

0.08

Figure 44. 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ]

4 mm × 4 mm Body, Very Thin Quad

(CP-24-2)

Dimensions shown in millimeters

ORDERING GUIDE

Model Temperature Range Package Description Package Option Ordering Quantity

ADL5385ACPZ-WP
ADL5385ACPZ-R21 –40°C to +85°C 24-Lead LFCSP_VQ, 7” Tape and Reel CP-24-2 250
ADL5385ACPZ-R71 –40°C to +85°C 24-Lead LFCSP_VQ, 7” Tape and Reel CP-24-2 1500
ADL5385-EVALZ1 Evaluation Board 1

1

Z = Pb-free part.

1

–40°C to +85°C 24-Lead LFCSP_VQ, Waffle Pack CP-24-2 64

0.60 MAX

19

18

EXPOSED

(BOTTOMVIEW)

13

12

PA D

24

6

7

1

2.50 REF

PIN 1
INDICATOR

*

2.45

2.30 SQ

2.15

0.23 MIN

Rev. 0 | Page 22 of 24

ADL5385

NOTES

Rev. 0 | Page 23 of 24

ADL5385

NOTES

©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06118-0-10/06(0)

Rev. 0 | Page 24 of 24