ANALOG DEVICES ADL5373 Service Manual
2300 MHz to 3000 MHz
FEATURES
Output frequency range: 2300 MHz to 3000 MHz
Modulation bandwidth: >500 MHz (3 dB)
Output third-order intercept: 26 dBm @ 2500 MHz
1 dB output compression: 13.8 dBm @ 2500 MHz
Noise floor: −157.1 dBm/Hz @ 2500 MHz
Sideband suppression: −57 dBc @ 2500 MHz
Carrier feedthrough: −32 dBm @ 2500 MHz
Single supply: 4.75 V to 5.25 V
24-lead LFCSP
APPLICATIONS
WiMAX/broadband wireless access systems
Satellite modems
GENERAL DESCRIPTION
The ADL5373 supports a frequency of operation from 2300 MHz
to 3000 MHz and is a pin-compatible member of the fixed gain
quadrature modulator (F-MOD) family designed for use from
300 MHz to 4000 MHz. The ADL5373 provides excellent phase
accuracy and amplitude balance enabling high performance
intermediate frequency or direct radio frequency modulation
for communications systems.
The ADL5373 provides a >500 MHz, 3 dB baseband bandwidth,
making it ideally suited for use in broadband zero IF or low
IF-to-RF applications and in broadband digital predistortion
transmitters.
Quadrature Modulator
ADL5373
FUNCTIONAL BLOCK DIAGRAM
IBBP
IBBN
LOIP
LOIN
QBBN
QBBP
The ADL5373 accepts two differential baseband inputs that
are mixed with a local oscillator (LO) to generate a singleended output.
The ADL5373 is fabricated using the Analog Devices, Inc.
advanced silicon-germanium bipolar process. It is available
in a 24-lead, exposed paddle, Pb-free LFCSP. Performance is
specified over a −40°C to +85°C temperature range. A Pb-free
evaluation board is available.
QUADRATURE
PHASE
SPLITTER
Figure 1.
VOUT
06664-001
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
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Fax: 781.461.3113 ©2007–2008 Analog Devices, Inc. All rights reserved.
ADL5373
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ...................................................................... 11
Circuit Description..................................................................... 11
Basic Connections.......................................................................... 12
Power Supply and Grounding................................................... 12
Baseband Inputs.......................................................................... 12
LO Input ...................................................................................... 12
RF Output.................................................................................... 12
Optimization............................................................................... 13
Applications Information.............................................................. 14
DAC Modulator Interfacing ..................................................... 14
Limiting the AC Swing.............................................................. 14
Filtering........................................................................................ 14
Using the AD9779 Auxiliary DAC for Carrier Feedthrough
Nulling ......................................................................................... 15
WiMAX Operation .................................................................... 15
LO Generation Using PLLs ....................................................... 16
Transm i t DAC O p tions ............................................................. 16
Modulator/Demodulator Options ........................................... 16
Evaluation Board ............................................................................ 17
Characterization Setup .................................................................. 18
Outline Dimensions ....................................................................... 20
Ordering Guide .......................................................................... 20
REVISION HISTORY
2/08—Rev. 0 to Rev. A
Changes to Features and General Description ............................. 1
Changes to Table 1............................................................................ 3
Changes to Table 2............................................................................ 5
Changes to Figure 3, Figure 4, and Figure 6 to Figure 8.............. 7
Changes to Figure 9 to Figure 14.................................................... 8
Changes to Figure 15 to Figure 20.................................................. 9
Changes to Figure 21 to Figure 23................................................ 10
Changes to Optimization Section and Figure 27 ....................... 13
Changes to Figure 35...................................................................... 15
Changes to WiMAX Operation Section and Figure 36............. 16
Changes to Evaluation Board Section.......................................... 17
Changes to Characterization Setup Section................................ 18
6/07—Revision 0: Initial Version
Rev. A | Page 2 of 20
ADL5373
SPECIFICATIONS
VS = 5 V, TA = 25°C, LO = 0 dBm1, baseband I/Q amplitude = 1.4 V p-p differential sine waves in quadrature with a 500 mV dc bias,
baseband I/Q frequency (f
Table 1.
Parameter Conditions Min Typ Max Unit
OPERATING FREQUENCY RANGE Low frequency 2300 MHz
High frequency 3000 MHz
LO = 2300 MHz
Output Power VIQ = 1.4 V p-p differential 4.2 dBm
Output P1dB 11.0 dBm
Carrier Feedthrough −35 dBm
Sideband Suppression −57 dBc
Quadrature Error <0.2 Degrees
I/Q Amplitude Balance 0.06 dB
Second Harmonic P
Third Harmonic P
Output IP2 f1BB = 3.5 MHz, f2BB = 4.5 MHz, P
Output IP3 f1BB = 3.5 MHz, f2BB = 4.5 MHz, P
WiMAX 802.16e
LO = 2500 MHz
Output Power VIQ = 1.4 V p-p differential 7.1 dBm
Output P1dB 13.8 dBm
Carrier Feedthrough −32 dBm
Sideband Suppression −57 dBc
Quadrature Error 0.3 Degrees
I/Q Amplitude Balance 0.06 dB
Second Harmonic P
Third Harmonic P
Output IP2 f1BB = 3.5 MHz, f2BB = 4.5 MHz, P
Output IP3 f1BB = 3.5 MHz, f2BB = 4.5 MHz, P
Noise Floor
WiMAX 802.16e
LO = 2700 MHz
Output Power VIQ = 1.4 V p-p differential 7.7 dBm
Output P1dB 13.8 dBm
Carrier Feedthrough −33 dBm
Sideband Suppression −54 dBc
Quadrature Error <0.2 Degrees
I/Q Amplitude Balance 0.07 dB
Second Harmonic P
Third Harmonic P
Output IP2 f1BB = 3.5 MHz, f2BB = 4.5 MHz, P
Output IP3 f1BB = 3.5 MHz, f2BB = 4.5 MHz, P
WiMAX 802.16e
LO INPUTS
LO Drive Level
1
Input Return Loss See Figure 9 for a plot of return loss vs. frequency −6 dB
) = 1 MHz, unless otherwise noted.
BB
− P(fLO ± (2 × fBB)), P
OUT
− P(fLO ± (3 × fBB)), P
OUT
10 MHz carrier bandwidth (1024 subcarriers), 64 QAM signal,
30 MHz carrier offset, P
− P(fLO ± (2 × fBB)), P
OUT
− P(fLO ± (3 × fBB)), P
OUT
I/Q inputs = 0 V differential with a 500 mV common-mode bias,
20 MHz carrier offset
10 MHz carrier bandwidth (1024 subcarriers), 64 QAM signal,
30 MHz carrier offset, P
− P(fLO ± (2 × fBB)), P
OUT
− P(fLO ± (3 × fBB)), P
OUT
10 MHz carrier bandwidth (1024 subcarriers), 64 QAM signal,
30 MHz carrier offset, P
Characterization performed at typical level −6 0 +6 dBm
= 4.6 dBm −58 dBc
OUT
= 4.6 dBm −49 dBc
OUT
= −1.5 dBm per tone 56 dBm
OUT
= −1.5 dBm per tone 25 dBm
OUT
−158.6 dBm/Hz
= −10 dBm, PLO = 0 dBm
OUT
= 7.1 dBm −57 dBc
OUT
= 7.1 dBm −47 dBc
OUT
= 1.1 dBm per tone 58 dBm
OUT
= 1.1 dBm per tone 26 dBm
OUT
−157.1 dBm/Hz
−157.4 dBm/Hz
= −10 dBm, PLO = 0 dBm
OUT
= 7.7 dBm −55 dBc
OUT
= 7.7 dBm −47 dBc
OUT
= 1.6 dBm per tone 57 dBm
OUT
= 1.6 dBm per tone 25 dBm
OUT
−155.3 dBm/Hz
= −10 dBm, PLO = 0 dBm
OUT
Rev. A | Page 3 of 20
ADL5373
Parameter Conditions Min Typ Max Unit
BASEBAND INPUTS Pin IBBP, Pin IBBN, Pin QBBP, Pin QBBN
I and Q Input Bias Level 500 mV
Input Bias Current
Current sourcing from each baseband input with a bias of
500 mV dc
2
Input Offset Current 0.1 μA
Differential Input Impedance fBB = 1 MHz 40||1.5 kΩ||pF
Bandwidth
LO = 2500 MHz, baseband input = 700 mV p-p sine wave on
500 mV dc
0.1 dB 70 MHz
1 dB 350 MHz
POWER SUPPLIES Pin VPS1 and Pin VPS2
Voltage 4.75 5.25 V
Supply Current 174 mA
1
Driven through Johanson Technology balun (Model 2450BL15B050)
2
See V-to-I Converter section for architecture information.
45 μA
Rev. A | Page 4 of 20
ADL5373
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage VPSx 5.5 V
IBBP, IBBN, QBBP, and QBBN 0 V to 2 V
LOIP and LOIN 13 dBm
Internal Power Dissipation 1119 mW
θJA (Exposed Paddle Soldered Down) 54°C/W
Maximum Junction Temperature 150°C
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. A | Page 5 of 20
ADL5373
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
QBBP
COM4
QBBN
COM4
IBBN
IBBP
2422232120
19
COM1
COM1
VPS1
VPS1
VPS1
VPS1
1
2
3
4
5
6
ADL5373
TOP VIEW
(Not to Scale)
798
101112
LOIP
LOIN
COM2
COM2
COM3
VPS5
18
VPS4
17
VPS3
16
VPS2
15
VPS2
14
VOUT
13
COM3
06664-002
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1, 2, 7, 10 to 12, 21, 22 COM1 to COM4 Input Common Pins. Connect to ground plane via a low impedance path.
3 to 6, 14 to 18 VPS1 to VPS5
Positive Supply Voltage Pins. All pins should be connected to the same supply (V
ensure adequate external bypassing, connect 0.1 μF capacitors between each pin and
ground. Adjacent power supply pins of the same name can share one capacitor (see
Figure 25).
8, 9 LOIP, LOIN
13 VOUT
50 Ω Differential Local Oscillator Input. Internally dc-biased. Pins must be ac-coupled.
See
Figure 8 for LO input impedance.
Device Output. Single-ended RF output. Pin should be ac-coupled to the load. The
output is ground referenced.
19, 20, 23, 24 IBBP, IBBN, QBBN, QBBP
Differential In-Phase and Quadrature Baseband Inputs. These high impedance inputs
must be dc-biased to 500 mV dc and must be driven from a low impedance source.
Nominal characterized ac signal swing is 700 mV p-p on each pin. This results in a
differential drive of 1.4 V p-p with a 500 mV dc bias. These inputs are not self-biased and
must be externally biased.
Exposed Paddle Connect to the ground plane via a low impedance path.
). To
S
Rev. A | Page 6 of 20
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