RF frequency range of 2300 MHz to 2900 MHz
IF frequency range of dc to 450 MHz
Power conversion loss: 7.7 dB
SSB noise figure of 7.6 dB
Input IP3 of 31 dBm
Typical LO drive of 0 dBm
Single-ended, 50 Ω RF and LO input ports
High isolation SPDT LO input switch
Single-supply operation: 3.3 V to 5 V
Exposed pad, 5 mm × 5 mm 20-lead LFCSP
1500 V HBM/1250 V FICDM ESD performance
APPLICATIONS
Cellular base station receivers
Transmit observation receivers
Radio link downconverters
GENERAL DESCRIPTION
The ADL5363 uses a highly linear, doubly balanced passive
mixer core along with integrated RF and local oscillator (LO)
balancing circuitry to allow for single-ended operation. The
ADL5363 incorporates an RF balun to provide optimal
performance over a 2300 MHz to 2900 MHz input frequency
range. The balanced passive mixer arrangement provides good
LO-to-RF leakage, typically better than −30 dBm, and excellent
intermodulation performance. The balanced mixer core also
provides extremely high input linearity, allowing the device to
be used in demanding cellular applications where in-band
blocking signals might otherwise result in the degradation of
dynamic performance.
LO Buffer and RF Balun
ADL5363
FUNCTIONAL BLOCK DIAGRAM
CMIIFOPIFONPWDNCOMM
2019181716
1
VPMX
2
RFIN
3
RFCT
BIAS
GENERATOR
4
COMM
5
COMM
678910
VLO3LGM3VLO2LOSWNC
NC = NO CONNECT
Figure 1.
The ADL5363 provides two switched LO paths that can be used
in TDD applications where it is desirable to rapidly switch between
two local oscillators. LO current can be externally set using a
resistor to minimize dc current commensurate with the desired
level of performance. For low voltage applications, the ADL5363 is
capable of operation at voltages down to 3.3 V with substantially
reduced current. For low voltage operation, an additional logic
pin is provided to power down (<200 µA) the circuit when desired.
The ADL5363 is fabricated using a BiCMOS high performance
IC process. The device is available in a 5 mm × 5 mm, 20-lead
LFCSP and operates over a −40°C to +85°C temperature range.
An evaluation board is also available.
ADL5363
15
LOI2
14
VPSW
13
VGS1
12
VGS0
11
LOI1
9914-001
Table 1. Passive Mixers
RF Frequency (MHz)
Single
Mixer
Single Mixer
and IF Amp
Dual Mixer
and IF Amp
500 to 1700 ADL5367 ADL5357 ADL5358
1200 to 2500 ADL5365 ADL5355 ADL5356
2300 to 2900 ADL5363 ADL5353 ADL5354
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
VS = 5 V, IS = 100 mA, TA = 25°C, fRF = 2535 MHz, fLO = 2738 MHz, LO power = 0 dBm, ZO = 50 Ω, unless otherwise noted.
Table 2.
Parameter Test Conditions/Comments Min Typ Max Unit
RF INPUT INTERFACE
Return Loss Tunable to >20 dB over a limited bandwidth 16 dB
Input Impedance 50 Ω
RF Frequency Range 2300 2900 MHz
OUTPUT INTERFACE
Output Impedance Differential impedance, f = 200 MHz 33||-0.3 Ω||pF
IF Frequency Range dc 450 MHz
DC Bias Voltage1 Externally generated 3.3 5.0 5.5 V
LO INTERFACE
LO Power −6 0 +10 dBm
Return Loss 15 dB
Input Impedance 50 Ω
LO Frequency Range 2330 3350 MHz
POWER-DOWN (PWDN) INTERFACE
PWDN Threshold 1.0 V
Logic 0 Level 0.4 V
Logic 1 Level 1.4 V
PWDN Response Time Device enabled, IF output to 90% of its final level 160 ns
Device disabled, supply current <5 mA 220 ns
PWDN Input Bias Current Device enabled 0.0 μA
Device disabled 70 μA
1
Apply the supply voltage from the external circuit through the choke inductors.
2
The PWDN function is intended for use with VS ≤ 3.6 V only.
2
Rev. 0 | Page 3 of 24
ADL5363
5 V PERFORMANCE
VS = 5 V, IS = 100 mA, TA = 25°C, fRF = 2535 MHz, fLO = 2738 MHz, LO power = 0 dBm, VGS0 = VGS1 = 0 V, and ZO = 50 Ω, unless
otherwise noted.
Table 3.
Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE
Power Conversion Loss Including 1:1 IF port transformer and PCB loss 7.7 dB
SSB Noise Figure 7.6 dB
Input Third-Order Intercept (IIP3)
= 2534.5 MHz, f
f
RF1
= 2535.5 MHz, fLO = 2738 MHz,
RF2
each RF tone at 0 dBm
Input Second-Order Intercept (IIP2)
= 2535 MHz, f
f
RF1
= 2585 MHz, fLO = 2738 MHz,
RF2
each RF tone at 0 dBm
Input 1 dB Compression Point (IP1dB)1 Exceeding 20 dBm RF power results in damage to the device 25 dBm
LO-to-IF Leakage Unfiltered IF output −22 dBm
LO-to-RF Leakage −32 dBm
RF-to-IF Isolation −44 dBc
IF/2 Spurious −10 dBm input power −61 dBc
IF/3 Spurious −10 dBm input power −70 dBc
POWER SUPPLY
Positive Supply Voltage 4.5 5 5.5 V
Quiescent Current VS = 5 V 100 mA
1
Exceeding 20 dBm RF power results in damage to the device.
31 dBm
62 dBm
3.3 V PERFORMANCE
VS = 3.3 V, IS = 60 mA, TA = 25°C, fRF = 2535 MHz, fLO = 2738 MHz, LO power = 0 dBm, R9 = 226 Ω, VGS0 = VGS1 = 0 V, and ZO = 50 Ω,
unless otherwise noted.
Table 4.
Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE
Power Conversion Loss Including 1:1 IF port transformer and PCB loss 7.4 dB
SSB Noise Figure 6.8 dB
Input Third-Order Intercept (IIP3)
= 2534.5 MHz, f
f
RF1
= 2535.5 MHz, fLO = 2738 MHz,
RF2
each RF tone at 0 dBm
Input Second-Order Intercept (IIP2)
= 2535 MHz, f
f
RF1
= 2585 MHz, fLO = 2738 MHz,
RF2
each RF tone at 0 dBm
POWER SUPPLY
Positive Supply Voltage 3.3 V
Quiescent Current VS = 5 V 60 mA
26 dBm
56 dBm
Rev. 0 | Page 4 of 24
ADL5363
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter Rating
Supply Voltage, VS 5.5 V
RF Input Level 20 dBm
LO Input Level 13 dBm
IFOP, IFON Bias Voltage 6.0 V
VGS0, VGS1, LOSW, PWDN 5.5 V
Internal Power Dissipation 0.5 W
Thermal Resistance, θJA 25°C/W
Temperature
Maximum Junction Temperature 150°C
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 sec) 260°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. 0 | Page 5 of 24
ADL5363
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
DN
VCMI
IFOP
COMM
IFON
PW
17
19
18
PIN 1
INDICATOR
9
8
7
VLO2
LGM3
LOSW
16
10
NC
15 LOI2
14 VPSW
13 VGS1
12 VGS0
11 LOI1
09914-002
20
1VPMX
2RFIN
ADL5363
3RFCT
TOP VIEW
4COMM
(Not to Scale)
5COMM
6
NOTES
1.2 NC = NO CONNECT . DO NOT CONNECT
TO THIS PIN.
. EXPOSED PAD. MUST BE SOLDERED
TO GROUND.
VLO3
Figure 2. Pin Configuration
Table 6. Pin Function Descriptions
Pin No. Mnemonic Description
1 VPMX Positive Supply Voltage.
2 RFIN RF Input. Must be ac-coupled.
3 RFCT RF Balun Center Tap (AC Ground).
4, 5,16 COMM Device Common (DC Ground).
6, 8 VLO3, VLO2 Positive Supply Voltages for LO Amplifier.
7 LGM3 LO Amplifier Bias Control.
9 LOSW LO Switch. LOI1 selected for 0 V, and LOI2 selected for 3 V.
10 NC No Connect.
11, 15 LOI1, LOI2 LO Inputs. Must be ac-coupled.
12, 13 VGS0, VGS1 Mixer Gate Bias Controls. 3 V logic. Ground these pins for nominal setting.
14 VPSW Positive Supply Voltage for LO Switch.
17 PWDN Power Down. Connect this pin to ground for normal operation and connect this pin to 3.0 V for disable mode.
18, 19 IFON, IFOP Differential IF Outputs.
20 VCMI No Connect. This pin can be grounded.
EPAD (EP) Exposed pad. Must be soldered to ground.
Rev. 0 | Page 6 of 24
ADL5363
TYPICAL PERFORMANCE CHARACTERISTICS
5 V PERFORMANCE
VS = 5 V, IS = 100 mA, TA = 25°C, fRF = 2535 MHz, fLO = 2738 MHz, LO power = 0 dBm, VGS0 = VGS1 = 0 V, and ZO = 50 Ω, unless
otherwise noted.