ANALOG DEVICES ADL5358 Service Manual
500 MHz to 1700 MHz, Dual-Balanced
Mixer, LO Buffer, IF Amplifier, and RF Balun
FEATURES
RF frequency range of 500 MHz to 1700 MHz
IF frequency range of 30 MHz to 450 MHz
Power conversion gain: 8.3 dB
SSB noise figure of 9.9 dB
SSB noise figure with 5 dBm blocker of 23 dB
Input IP3 of 25.2 dBm
Input P1dB of 10.6 dBm
Typical LO drive of 0 dBm
Single-ended, 50 Ω RF and LO input ports
High isolation SPDT LO input switch
Single-supply operation: 3.3 V to 5 V
Exposed paddle, 6 mm × 6 mm, 36-lead LFCSP
APPLICATIONS
Cellular base station receivers
Transmit observation receivers
Radio link downconverters
GENERAL DESCRIPTION
The ADL5358 uses a highly linear, doubly balanced, passive
mixer core along with integrated RF and local oscillator (LO)
balancing circuitry to allow single-ended operation. The
ADL5358 incorporates the RF baluns, allowing for optimal
performance over a 500 MHz to 1700 MHz RF input frequency
range. Performance is optimized for RF frequencies from 500 MHz
to 1200 MHz using a high-side LO and RF frequencies from
1200 MHz to 1700 MHz using a low-side LO. The balanced
passive mixer arrangement provides good LO-to-RF leakage,
typically better than −20 dBm, and excellent intermodulation
performance. The balanced mixer core also provides extremely
high input linearity, allowing the device to be used in demanding
cellular applications where in-band blocking signals may otherwise
result in the degradation of dynamic performance. A high linearity
IF buffer amplifier follows the passive mixer core to yield a
typical power conversion gain of 8.3 dB and can be used with
a wide range of output impedances.
The ADL5358 provides two switched LO paths that can be used
in TDD applications where it is desirable to ping-pong between
two local oscillators. LO current can be externally set using a
resistor to minimize dc current commensurate with the desired
level of performance. For low voltage applications, the ADL5358 is
capable of operation at voltages down to 3.3 V with substantially
reduced current. Under low voltage operation, an additional logic
pin is provided to power down (<300 µA) the circuit when desired.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
ADL5358
FUNCTIONAL BLOCK DIAGRAM
N
M
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G
M
N
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C
M
M
M
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V
O
D
C
MNIN
MNCT
COMM
VPOS
COMM
VPOS
COMM
DVCT
DVIN
O
P
V
S
O
P
V
The ADL5358 is fabricated using a BiCMOS high performance
IC process. The device is available in a 6 mm × 6 mm, 36-lead
LFCSP and operates over a −40°C to +85°C temperature range.
An evaluation board is also available.
Table 1. Passive Mixers
RF Frequency
(MHz)
Single
Mixer
500 to 1700 ADL5367 ADL5357 ADL5358
1200 to 2500 ADL5365 ADL5355 ADL5356
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved.
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Figure 1.
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ADL5358
S
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Single Mixer
and IF Amp
G
L
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C
M
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C
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D
Dual Mixer
and IF Amp
LOI2
VGS2
VGS1
VGS0
LOSW
PWDN
VPOS
COMM
LOI1
07885-001
ADL5358
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
5 V Performance ........................................................................... 4
3.3 V Performance ........................................................................ 4
Absolute Maximum Ratings ............................................................ 5
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
Typical Performance Characteristics ............................................. 7
5 V Performance ........................................................................... 7
REVISION HISTORY
11/09—Revision 0: Initial Version
3.3 V Performance ...................................................................... 15
Spurious Performance ............................................................... 16
Circuit Description......................................................................... 17
RF Subsystem .............................................................................. 17
LO Subsystem ............................................................................. 18
Applications Information .............................................................. 19
Basic Connections ...................................................................... 19
IF Port .......................................................................................... 19
Bias Resistor Selection ............................................................... 19
Mixer VGS Control DAC .......................................................... 19
Evaluation Board ............................................................................ 21
Outline Dimensions ....................................................................... 23
Ordering Guide .......................................................................... 23
Rev. 0 | Page 2 of 24
ADL5358
SPECIFICATIONS
VS = 5 V, IS = 350 mA, TA = 25°C, fRF = 900 MHz, fLO = 1103 MHz, LO power = 0 dBm, RF power = −10 dBm, R1 = R4 = 1.3 k, R2 = R5 = 1 k,
Z
= 50 Ω, VGS0 = VGS1 = VGS2 = 0 V, unless otherwise noted.
O
Table 2.
Parameter Conditions Min Typ Max Unit
RF INPUT INTERFACE
Return Loss Tunable to >20 dB over a limited bandwidth 20 dB
Input Impedance 50 Ω
RF Frequency Range 500 1700 MHz
OUTPUT INTERFACE
Output Impedance Differential impedance, f = 200 MHz 230||0.75 Ω||pF
IF Frequency Range 30 450 MHz
DC Bias Voltage1 Externally generated 3.3 5.0 5.5 V
LO INTERFACE
LO Power −6 0 +10 dBm
Return Loss 13 dB
Input Impedance 50 Ω
LO Frequency Range 530 1670 MHz
POWER-DOWN (PWDN) INTERFACE2
PWDN Threshold 1.0 V
Logic 0 Level 0.4 V
Logic 1 Level 1.4 V
PWDN Response Time Device enabled, IF output to 90% of its final level 160 ns
Device disabled, supply current < 5 mA 230 ns
PWDN Input Bias Current Device enabled 0 μA
Device disabled 70 μA
1
Apply supply voltage from external circuit through choke inductors.
2
PWDN function is intended for use with VS ≤ 3.6 V only.
Rev. 0 | Page 3 of 24
ADL5358
5 V PERFORMANCE
VS = 5 V, IS = 350 mA, TA = 25°C, fRF = 900 MHz, fLO = 1103 MHz, LO power = 0 dBm, RF power = −10 dBm, R1 = R4 = 1.3 k, R2 = R5 = 1 k,
VGS0 = VGS1 = VGS2 = 0 V, and Z
Table 3.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
Power Conversion Gain Including 4:1 IF port transformer and PCB loss 7.6 8.3 8.6 dB
Voltage Conversion Gain Z
SSB Noise Figure 9.9 dB
SSB Noise Figure Under Blocking
Input Third-Order Intercept (IIP3)
Input Second-Order Intercept (IIP2)
Input 1 dB Compression Point (IP1dB) 10.6 dBm
LO-to-IF Leakage Unfiltered IF output −33 dBm
LO-to-RF Leakage −31 dBm
RF-to-IF Isolation −43 dBc
IF/2 Spurious −10 dBm input power −72 dBc
IF/3 Spurious −10 dBm input power −79 dBc
IF Channel-to-Channel Isolation 54 dB
POWER SUPPLY
Positive Supply Voltage 4.75 5 5.25 V
Quiescent Current LO supply 170 mA
IF supply 180 mA
Total Quiescent Current 350 mA
= 50 Ω, unless otherwise noted.
O
= 50 Ω, differential Z
SOURCE
5 dBm blocker present ±10 MHz from wanted RF input,
LO source filtered
= 899.5 MHz, f
f
RF1
= 900.5 MHz, fLO = 1103 MHz,
RF2
each RF tone at −10 dBm
= 900 MHz, f
f
RF1
= 950 MHz, fLO = 1103 MHz,
RF2
each RF tone at −10 dBm
= 200 Ω differential 14.6 dB
LOAD
23 dB
22 25.2 dBm
57 dBm
3.3 V PERFORMANCE
VS = 3.3 V, IS = 200 mA, TA = 25°C, fRF = 900 MHz, fLO = 1103 MHz, LO power = 0 dBm, RF power = −10 dBm, R1 = R4 = 1.2 k,
R2 = R5 = 400 , VGS0 = VGS1 = VGS2 = 0 V, and Z
Table 4.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
Power Conversion Gain Including 4:1 IF port transformer and PCB loss 8.3 dB
Voltage Conversion Gain Z
SSB Noise Figure 8.9 dB
Input Third-Order Intercept (IIP3)
f
each RF tone at −10 dBm
Input Second-Order Intercept (IIP2)
f
each RF tone at −10 dBm
Input 1 dB Compression Point (IP1dB) 6.75 dBm
POWER INTERFACE
Supply Voltage 3.0 3.3 3.6 V
Quiescent Current Resistor programmable 200 mA
Total Quiescent Current Device disabled 300 μA
= 50 , unless otherwise noted.
O
= 50 Ω, differential Z
SOURCE
= 899.5 MHz, f
RF1
= 950 MHz, f
RF1
= 900.5 MHz, fLO = 1103 MHz,
RF2
= 900 MHz, fLO = 1103 MHz,
RF2
= 200 Ω differential 14.6 dB
LOAD
19.3 dBm
47.2 dBm
Rev. 0 | Page 4 of 24
ADL5358
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter Rating
Supply Voltage, VS 5.5 V
RF Input Level 20 dBm
LO Input Level 13 dBm
MNOP, MNON, DVOP, DVON Bias 6.0 V
VGS2, VGS1, VGS0, LOSW, PWDN 5.5 V
Internal Power Dissipation 2.2 W
θJA 22°C/W
Maximum Junction Temperature 150°C
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 sec) 260°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. 0 | Page 5 of 24
ADL5358
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
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6
5
4
3
3
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3
3
1
MNIN
2
MNCT
3
COMM
4
VPOS
5
COMM
6
VPOS
7
COMM
DVCT
8
9
DVIN
NOTES
1. NC = NO CONNECT .
2. EXPOSED PAD MUST BE CONNECT E D TO GROUND.
ADL5358
TOP VIEW
(Not to S cal e)
0
1
2
1
1
1
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3
1
P
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Figure 2. Pin Configuration
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0
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3
3
2
2
27
LOI2
VGS2
26
VGS1
25
VGS0
24
LOSW
23
22
PWDN
21
VPOS
20
COMM
LOI1
19
5
6
7
8
1
1
1
1
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D
07885-002
Table 6. Pin Function Descriptions
Pin No. Mnemonic Description
1 MNIN RF Input for Main Channel. Internally matched to 50 Ω. This pin must be ac-coupled.
2 MNCT Center Tap for Main Channel Input Balun. Bypass this pin to ground using low inductance capacitor.
3, 5, 7, 12, 20, 34 COMM Device Common (DC Ground).
4, 6, 10, 16,
VPOS Positive Supply Voltage.
21, 30, 36
8 DVCT Center Tap for Diversity Channel Input Balun. Bypass to ground using low inductance capacitor.
9 DVIN RF Input for Diversity Channel. Internally matched to 50 Ω. This pin must be ac-coupled.
11 DVGM Diverstiy Amplifier Bias Setting. Connect a 1.3 kΩ resistor to ground for typical operation.
13, 14 DVOP, DVON
Diversity Channel Differential Open-Collector Outputs. DVOP and DVON should be pulled-up to
VCC using external inductors.
15 DVLE Diversity Channel IF Return. This pin must be grounded.
17 DVLG Diverstiy Channel LO Buffer Bias Setting. Connect a 1 kΩ resistor to ground for typical operation.
18, 28 NC No Connect.
19 LOI1 Local Oscillator Input 1. Internally matched to 50 Ω. This pin must be ac-coupled.
22 PWDN
Connect to Ground for Normal Operation. Connect this pin to 3 V for disable mode when using
VPOS < 3.6 V. PWDN pin must be grounded when VPOS > 3.6 V.
23 LOSW Local Oscillator Input Selection Switch. Set LOSW high to select LOI1 or set LOSW low to select LOI2.
24, 25, 26 VGS0, VGS1, VGS2 Gate to Source Control Voltages. For typical operation, set VGS0, VGS1, and VGS2 to low logic level.
27 LOI2 Local Oscillator Input 2. Internally matched to 50 Ω. This pin must be ac-coupled.
29 MNLG Main Channel LO Buffer Bias Setting. Connect a 1 kΩ resistor to ground for typical operation.
31 MNLE Main Channel IF Return. This pin must be grounded.
32, 33 MNOP, MNON
Main Channel Differential Open-Collector Outputs. MNOP and MNON should be pulled-up to
VCC using external inductors.
35 MNGM Main Amplifier Bias Setting. Connect a 1.3 kΩ resistor to ground for typical operation.
Paddle EPAD Exposed pad must be connected to ground.
Rev. 0 | Page 6 of 24
ADL5358
TYPICAL PERFORMANCE CHARACTERISTICS
5 V PERFORMANCE
VS = 5 V, IS = 350 mA, TA = 25°C, fRF = 900 MHz, fLO = 1103 MHz, LO power = 0 dBm, RF power = −10 dBm, R1 = R4 = 1.3 kΩ, R2 = R5 = 1 kΩ,
VGS0 = VGS1 = VGS2 = 0 V, Z
400
= 50 Ω, unless otherwise noted.
O
70
380
360
340
SUPPLY CURRENT (mA)
320
300
700 750 800 850 900 950 1000 1050 1100 1150 1200
TA =–40°C
TA = +25°C
TA = +85°C
RF FREQUENCY (M Hz )
Figure 3. Supply Current vs. RF Frequency
12
11
10
9
8
7
CONVERSION GAIN (dB)
6
TA = +25°C
TA = –40°C
TA = +85°C
65
60
55
TA = +25°C
INPUT IP2 (dBm)
50
45
40
700 750 800 850 900 950 1000 1050 1100 1150 1200
07885-003
RF FREQUENCY ( M Hz )
TA =–40°C
TA = +85°C
07885-006
Figure 6. Input IP2 vs. RF Frequency
14
13
12
11
10
INPUT P1dB (dBm)
9
TA = +85°C
TA = –40°C
TA = +25°C
5
700 750 800 850 900 950 1000 1050 1100 1150 1200
RF FREQUENCY (MHz )
Figure 4. Power Conversion Gain vs. RF Frequency
31
29
27
TA = –40°C
25
INPUT IP3 (dBm)
23
21
19
700 750 800 850 900 950 1000 1050 1100 1150 1200
TA = +85°C
RF FREQUENCY ( M Hz )
TA = +25°C
Figure 5. Input IP3 vs. RF Frequency
07885-004
07885-005
Rev. 0 | Page 7 of 24
8
700 750 800 850 900 950 1000 1050 1100 1150 1200
RF FREQUENCY ( M Hz )
Figure 7. Input P1dB vs. RF Frequency
14
13
12
11
10
9
SSB NOISE F IGURE (dB)
8
7
6
700 750 800 850 900 950 1000 1050 1100 1150 1200
TA = +25°C
TA = –40°C
RF FREQUENCY (M Hz )
TA = +85°C
Figure 8. SSB Noise Figure vs. RF Frequency
07885-007
07885-008
ADL5358
VS = 5 V, IS = 350 mA, TA = 25°C, fRF = 900 MHz, fLO = 1103 MHz, LO power = 0 dBm, RF power = −10 dBm, R1 = R4 = 1.3 kΩ, R2 = R5 = 1 kΩ,
VGS0 = VGS1 = VGS2 = 0 V, Z
400
380
360
340
SUPPLY CURRENT (mA)
320
300
–40 –20 –10–30 0 10 20 30 40 50 60 70 80
Figure 9. Supply Current vs. Temperature
10.0
9.5
9.0
8.5
8.0
CONVERSION GAIN (dB)
7.5
4.75V
5.0V
5.25V
= 50 Ω, unless otherwise noted.
O
V
= 5.25V
POS
V
= 5.0V
POS
V
= 4.75V
POS
TEMPERATURE ( °C)
62
61
60
59
V
V
58
57
56
INPUT IP2 (dBm)
55
54
53
52
–40 –30 –20 –10 0 2010 30 40 50 60 70 80
07885-009
= 5.0V
POS
TEMPERATURE (°C)
POS
= 5.25V
V
POS
= 4.75V
07885-012
Figure 12. Input IP2 vs. Temperature
13
12
11
10
INPUT P1dB (dBm)
9
V
POS
= 5.25V
V
= 5.0V
POS
V
= 4.75V
POS
7.0
–40 –30 –20 –10 0 2010 30 40 50 60 70 80
TEMPERATURE ( °C)
Figure 10. Power Conversion Gain vs. Temperature
29
28
27
26
25
24
INPUT IP3 (dBm)
23
22
21
–40 –30 –20 –10 0 2010 30 40 50 60 70 80
V
= 5.0V
POS
V
= 5.25V
POS
V
= 4.75V
POS
TEMPERATURE (°C)
Figure 11. Input IP3 vs. Temperature
07885-010
07885-011
8
–40 –30 –20 –10 0 2010 30 40 50 60 70 80
TEMPERATURE ( °C)
Figure 13. Input P1dB vs. Temperature
12.0
11.5
11.0
= 5.25V
10.5
10.0
9.5
SSB NOISE FIGURE (dB)
9.0
8.5
8.0
–40 –20 0
V
POS
V
V
POS
TEMPERATURE (°C)
POS
= 5.0V
20
= 4.75V
30
40 60–30 –10 10
50 70 80
Figure 14. SSB Noise Figure vs. Temperature
07885-013
07885-014
Rev. 0 | Page 8 of 24
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