ANALOG DEVICES ADL5315 Service Manual

Precision Wide Range (3 nA to 3 mA)

FEATURES

Accurately mirrors input current (1:1 ratio) over 6 decades
Linearity 1% from 3 nA to 3 mA
Stable mirror input voltage
Voltage held 1 V below supply using internal reference
or can be set externally
Adjustable input current limit
2.7 V to 8 V single-supply operation Miniature 8-lead LFCSP (2 mm × 3 mm)

APPLICATIONS

Optical power monitoring from a single photodiode General voltage biasing with precision current monitoring Voltage-to-current conversion
High-Side Current Mirror
ADL5315

FUNCTIONAL BLOCK DIAGRAM

ADL5315
VOLTAGE
REFERENCE
4
COMM
20kΩ
3
SREF
VSET NC
2 7
INPT
1
I
PD
CURRENT
LIMITING
CURRENT
MIRROR
1:1
Figure 1.
RLIM
VPOS
IOUT
I
PD
5
6
8
05694-001

GENERAL DESCRIPTION

The ADL5315 is a wide input current range, precision high-side current mirror featuring a stable and user-adjustable input voltage. It is optimized for use with PIN photodiodes, but its flexibility and wide operating range make it suitable for a broad array of additional applications. Over the 3 nA to 3 mA range, the current sourced from the INPT pin is accurately mirrored with a 1:1 ratio and sourced from the IOUT output pin. In a typical photodiode application, the output drives a current­input logarithmic amplifier to produce a linear-in-dB output representing the optical power incident upon the photodiode. For linear voltage output, a single resistor to ground is all that is required. The photodiode anode can be connected to a high speed transimpedance amplifier for the extraction of the data stream. The voltage at the INPT pin is temperature stable with respect to the voltage at the VSET input pin, which it tracks. A temperature stable reference voltage is provided at the SREF pin, which, when tied to VSET, fixes the voltage at INPT 1.0 V below VPOS. VSET can also be driven from an external source.
The VSET input has very low input current and can be driven as low as the bottom rail, facilitating nonloading voltage-to­current conversion as well as minimizing dark current in photodiode applications.
The ADL5315 also features adjustable input current limiting using an external resistor from RLIM to VPOS. The maximum current sourced by INPT (and IOUT) can be set between 1 mA and 16 mA, beyond which the voltage at INPT falls rapidly from its setpoint. Connecting RLIM directly to VPOS provides basic input short-circuit protection with the default current limit of 16 mA typical.
The ADL5315 is available in a 2 mm × 3 mm, 8-lead LFCSP and is specified for operation from −40°C to +85°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.
ADL5315

TABLE OF CONTENTS

Features.............................................................................................. 1
Noise Performance..................................................................... 10
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ........................................................................ 9
Bias Control Interface.................................................................. 9

REVISION HISTORY

10/05—Revision 0: Initial Version
Mirror Response Time............................................................... 10
Input Current Limiting.............................................................. 10
Applications..................................................................................... 11
Average Power Monitoring ....................................................... 11
Translinear Log Amp Interfacing............................................. 12
Extended Operating Range....................................................... 13
Using RLIM as a Secondary Monitor...................................... 13
Characterization Methods ........................................................ 14
Evaluation Board............................................................................ 16
Outline Dimensions....................................................................... 17
Ordering Guide .......................................................................... 17
Rev. 0 | Page 2 of 20
ADL5315

SPECIFICATIONS

V
= 5 V, V
POS
Table 1.
Parameter Conditions Min Typ Max Unit
CURRENT MIRROR OUTPUT IOUT (Pin 8)
Current Gain from INPT to IOUT 0.99 1.00 1.01 Current Gain from INPT to IOUT
Nonlinearity 3 nA < IPD < 3 mA 0.25 1.00 % Small Signal Bandwidth I
I
Wideband Noise at IPDM Specified Output Voltage Range 0 V I
× R
OUT
MIRROR INPUT, VOLTAGE CONTROL INPT (Pin 1), VSET (Pin 2), SREF (Pin 3)
Specified Input Current Range, I Specified VSET Voltage Range 2.7 V < V
6.5 V < V Incremental Gain from VSET to INPT 0.2 V < V Incremental Input Resistance at VSET V Input Bias Current at VSET V SREF Voltage, Relative to V
OVERCURRENT PROTECTION
INPT Current Limit V
V POWER SUPPLY VPOS (Pin 6)
Supply Voltage Range 2.7 8 V
Quiescent Current I
I
= 4 V, I
SET
Product I
OUT
= 3 µA, TA = 25°C, unless otherwise noted.
INPT
INPT
POS
−40°C < TA < +85°C
= 3 nA 1 kHz
INPT
= 3 μA 1 MHz
INPT
I
= 3 μA, C
INPT
= 3 μA 900
INPT
= 2.2 nF 20 nA rms
SET
0.97 1.00 1.03 A/A
− 1 V
POS
Flows from INPT pin 3n 3m A
< 6.5 V 0 V
POS
< 8 V V
POS
< 7.0 V 0.98 1 1.02 V/V
SET
= 4.0 V >100
SET
= 4.0 V <30 pA
SET
2.7 V < V
INPT
INPT
INPT
INPT
< 8 V −1.04 −1.0 −0.97 V
POS
drops to 0 V, R drops to 0 V, R
= 0 Ω 16 mA
LIM
= 3 kΩ 6.4 8 9.6 mA
LIM
= 3 μA 1.8 2.2 mA = 3 mA 8.3 10.2 mA
− 6.5 V
POS
− 1 V
POS
− 1 V
POS
V
Rev. 0 | Page 3 of 20
ADL5315

ABSOLUTE MAXIMUM RATINGS

Table 2.
Parameter Rating
Supply Voltage 8 V Input Current at INPT 20 mA Internal Power Dissipation 500 mW θJA (Soldered Exposed Paddle) 80°C/W Maximum Junction Temperature 125°C Operating Temperature Range −40°C to +85°C Storage Temperature Range −65°C to +150°C Lead Temperature (Soldering 60 sec) 300°C

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Rev. 0 | Page 4 of 20
ADL5315

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

1INPT 2VSET
ADL5315
TOP VIEW
3SREF
(Not to Scale)
4COMM
NC = NO CONNECT
8 IOUT 7NC
6 VPOS
5 RLIM
05694-002
Figure 2. 8-Lead LFCSP
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 INPT Input Current. Pin sources current only. 2 VSET
3 SREF
Sets Voltage at INPT (Gain = 1). Range 0 V to V V
− 1 V. Optional shielding of INPT trace.
POS
Reference Voltage for VSET. Internally generated at V
− 1.0 V for V
POS
POS
< 6.5 V. For V
POS
POS
− 1.0 V through 20 kΩ. Can be shorted to VSET for
standard mirror operation. 4 COMM Analog Ground. 5 RLIM External Resistor to VPOS. Sets current limit at INPT from 1 mA to 16 mA. I
= 48 V/(R
LIM
6 VPOS Positive Supply (2.7 V to 8.0 V). 7 N/C Optional Shielding of IOUT Trace. No connection to die. 8 IOUT Output Current. Mirrors current at INPT with a gain of 1.0. Sources current only. PADDLE Internally connected to COMM, solder to ground.
≥ 6.5 V range, V
+ 3 kΩ).
LIM
− 6.5 V to
POS
Rev. 0 | Page 5 of 20
ADL5315

TYPICAL PERFORMANCE CHARACTERISTICS

V
= 5 V, V
POS
2.0
1.5
1.0
0.5
0
–0.5
LINEARITY (%)
–1.0
–1.5
–2.0
1n 10m
= V
, V
SET
SREF
–40°C 0°C +25°C +70°C +85°C
10n 100n 1μ 10μ 100μ 1m
Figure 3. I
Linearity vs. I
OUT
= 0 V, TA = 25°C, unless otherwise noted.
OUT
+25°C, +70°C, +85°C,
0°C, –40°C
I
(A)
INPT
for Multiple Temperatures,
INPT
Normalized to 25°C and I
3
2
1
INPT
= 3 µA
10m
1m
100μ
10μ
1μ
100n
10n
1n
–40°C +25°C +85°C
(A) I
2.0
1.5
1.0
0.5
OUT
05694-003
0
–0.5
LINEARITY (%)
–1.0
–1.5
–2.0
10n 100n 1μ 10μ 100μ 1m
1n 10m
Figure 6. I
Linearity vs. I
OUT
Normalized to V
40
20
0
–20
I
VS. I
INPT
VOLTAGE CONDITIONS
I
INPT
= 5 V, V
POS
, ALL
OUT
V
= 2.7V, V
POS
V
= 5V, V
POS
V
= 5V, V
POS
V
= 8V, V
POS
= 8V, V
V
POS
(A)
for Multiple Supply Conditions,
INPT
= V
SET
SREF
SET SET SET SET
, and I
SET
= V = 2V = V = 2V = V
INPT
SREF
SREF
SREF
= 3 µA
10m
1m
100μ
10μ
1μ
100n
10n
1n
(A)
OUT
I
05694-006
LINEARITY (%)
WIDEBAND CURRENT NOISE (%)
3.0
2.5
2.0
1.5
1.0
0.5
0
–1
–2
–3
1n
Figure 4. I
10n 100n
Linearity vs. I
OUT
I
INPT
for Multiple Temperatures and
INPT
Devices Normalized to 25°C and I
V
= 3.0V
V
= 4.6V
POS
V
= 7.8V
POS
0
1n
10n 100n 1μ 10μ 100μ 1m
POS
I
INPT
(A)
(A)
INPT
= 3 µA
10m1μ 10μ 100μ 1m
10m
05694-021
05694-016
–40
VARIATION (mV)
–60
INPT
V
–80
–100
–120
Figure 7. V
1nA
100pA
10pA
1pA
NSD (A rms/√Hz)
100fA
10fA
1fA
–40°C, V –40°C, V –40°C, V +25°C, V +25°C, V +25°C, V +85°C, V +85°C, V +85°C, V
1n
10n 100n
Variation vs. I
INPT
Normalized to V
3.6mA
360μA
100Hz
1kHz 10kHz 100kHz 1MHz
POS POS POS POS POS POS POS POS POS
POS
= 2.7V, V = 5V, V = 5V, V = 2.7V, V = 5V, V = 5V, V = 2.7V, V = 5V, V = 5V, V
= 5 V, V
= V
SET
SREF
= 0V
SET
= V
SET
SREF
= V
SET
SREF
= 0V
SET
= V
SET
SREF
= V
SET
SREF
= 0V
SET
= V
SET
SREF
I
(A)
INPT
for Multiple Temperatures and Voltage,
INPT
= V
, I
SREF
INPT
= 3 µA and 25°C
SET
360nA
36nA
3.6nA
FREQUENCY
3.6μA
10m1μ 10μ 100μ 1m
36μA
10MHz
05694-005
05694-007
Figure 5. Output Wideband Current Noise as a Percentage of I
for Multiple Values of V
I
INPT
, C
= 2.2 nF, BW = 10 MHz
POS
SET
vs.
OUT
Rev. 0 | Page 6 of 20
Figure 8. Output Current Noise Density vs. Frequency for
Multiple Values of I
INPT
, V
POS
= 4.6 V, V
= V
, C
SREF
= 2.2 nF
SET
SET
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