ANALOG DEVICES ADIS16228 Service Manual

with FFT Analysis and Storage

ADIS16228

Rev. B

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ADIS16228

RECORD

STORAGE

ALARMS

INPUT/

OUTPUT

CONTROLLER

ADC

TRIAXIAL

MEMS

SENSOR

TEMP

SENSOR

SUPPLY

POWER

MANAGEMENT

CS

SCLK

DIN

DOUT

GND

VDDRSTDIO1

CONTROL

REGISTERS

SPI

PORT

OUTPUT

REGISTERS

FILTER

WINDOW

FFT

CAPTURE

BUFFER

10069-001

DIO2

Data Sheet

FEATURES

Frequency domain triaxial vibration sensor
Flat frequency response up to 5 kHz
Digital acceleration data, ±18 g measurement range

Digital range settings: 0 g to 1 g/5 g/10 g/20 g
Real-time sample mode: 20.48 kSPS, single-axis
Capture sample modes: 20.48 kSPS, three axes

Trigger modes: SPI, timer, external

Programmable decimation filter, 11 rate settings

Multirecord capture for selected filter settings

Manual capture mode for time domain data collection
FFT, 512-point, real valued, all three axes (x, y, z)

3 windowing options: rectangular, Hanning, flat top

Programmable FFT averaging: up to 255 averages
Storage: 14 FFT records on all three axes (x, y, z)
Programmable alarms, 6 spectral bands

2-level settings for warning and fault definition

Adjustable response delay to reduce false alarms
Internal self-test with status flags
Digital temperature and power supply measurements
2 auxiliary digital I/Os
SPI-compatible serial interface
Identification registers: serial number, device ID, user ID
Single-supply operation: 3.0 V to 3.6 V
Operating temperature range: −40°C to +125°C
15 mm × 24 mm × 15 mm aluminum package, flex connector

APPLICATIONS

Vibration analysis
Condition monitoring
Machine health
Instrumentation, diagnostics
Safety shutoff sensing

Digital Triaxial Vibration Sensor

GENERAL DESCRIPTION

The ADIS16228 iSensor® is a complete vibration sensing system
that combines triaxial acceleration sensing with advanced time
domain and frequency domain signal processing. Time domain
signal processing includes a programmable decimation filter
and selectable windowing function. Frequency domain processing
includes a 512-point, real-valued FFT for each axis, along with
FFT averaging, which reduces the noise floor variation for finer
resolution. The 14-record FFT storage system offers users the
ability to track changes over time and capture FFTs with multiple
decimation filter settings.

The 20.48 kSPS sample rate and 5 kHz flat frequency band
provide a frequency response that is suitable for many machine
health applications. The aluminum core provides excellent
mechanical coupling to the MEMS acceleration sensors. An
internal clock drives the data sampling and signal processing
system during all operations, which eliminates the need for an
external clock source. The data capture function has three modes
that offer several options to meet the needs of many different
applications. In addition, real-time mode provides direct access
to streaming data on one axis. The SPI and data buffer structure
provide convenient access to data output. The ADIS16228 also
offers a digital temperature sensor and digital power supply
measurements.

The ADIS16228 is available in a 15 mm × 24 mm × 15 mm module
with flanges, machine screw holes (M2 or 2-56), and a flexible
connector that enables simple user interface and installation. It
has an extended operating temperature range of −40°C to +125°C.

FUNCTIONAL BLOCK DIAGRAM

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Spe cifications subject to change without n otice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Figure 1.

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www.analog.com

ADIS16228 Data Sheet

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Timing Specifications .................................................................. 4

Absolute Maximum Ratings ............................................................ 5

ESD Caution .................................................................................. 5

Pin Configuration and Function Descriptions ............................. 6

Theory of Operation ........................................................................ 7

Sensing Element ........................................................................... 7

Signal Processing .......................................................................... 7

User Interface ................................................................................ 7

Basic Operation................................................................................. 8

SPI Write Commands .................................................................. 8

SPI Read Commands ................................................................... 8

Data Recording and Signal Processing ........................................ 11

Recording Mode ......................................................................... 11

Spectral Record Production ...................................................... 12

Sample Rate/Filtering ................................................................. 12

Dynamic Range/Sensitivity ....................................................... 14

Pre-FFT Windowing .................................................................. 15

FFT ............................................................................................... 16

Recording Times ......................................................................... 16

Data Records ............................................................................... 16

FFT Record Flash Endurance ................................................... 16

Spectral Alarms ............................................................................... 17

Alarm Definition ........................................................................ 17

Alarm Indicator Signals ............................................................. 18

Alarm Flags and Conditions ..................................................... 18

Alarm Status ................................................................................ 19

Worst -Case Condition Monitoring.......................................... 19

Reading Output Data ..................................................................... 20

Reading Data from the Data Buffer ......................................... 20

Accessing FFT Record Data ...................................................... 20

Data Format ................................................................................ 21

Real-Time Data Collection ....................................................... 21

Power Supply/Temperature ....................................................... 21

FFT Event Header ...................................................................... 22

System Tools .................................................................................... 23

Global Commands ..................................................................... 23

Status/Error Flags ....................................................................... 23

Power-Down ............................................................................... 23

Operation Managment .............................................................. 24

Input/Output Functions ............................................................ 24

Self-Tes t ....................................................................................... 25

Flash Memory Management ..................................................... 25

Device Identification .................................................................. 25

Applications Information .............................................................. 26

Interface Board ........................................................................... 26

Mating Connector ...................................................................... 26

Outline Dimensions ....................................................................... 27

Ordering Guide .......................................................................... 27

REVISION HISTORY

3/12—Rev. A to Rev. B

Changes to Recording Times Section and Table 21 ................... 16

Changes to Interface Board Section ............................................. 26

8/11—Rev. 0 to Rev. A

Changes to General Description .................................................... 1

Changes to Output Noise and Bandwidth Parameters, Table 1 .... 3

Added CAL_ENABLE Register to Table 8 .................................. 10

Changes to Real-Time Mode Section; Changes to Table 11;

Change to Figure 14 ....................................................................... 12

Changes to Figure 15 ...................................................................... 13

Added Dynamic Range/Sensitivity Section; Added Table 13,
Renumbered Sequentially; Added Figure 16, Figure 17, and

Figure 18, Renumbered Sequentially ........................................... 14

Rev. B | Page 2 of 28

Change to Dynamic Range Settings Section............................... 15

Changes to Recording Times Section .......................................... 16

Changes to Figure 20 and Figure 21 ............................................ 20

Changes to Table 49, Table 50, and Table 51; Change to

Real-Time Data Collection Section ............................................. 21

Change to Power-Down Section .................................................. 23

7/11—Revision 0: Initial Version

Data Sheet ADIS16228

Bandwidth

±5% flatness,2 CAL_ENABLE[4] = 0, see Figure 17

840 Hz

FLASH MEMORY

SPECIFICATIONS

TA = −40°C to +125°C, VDD = 3.3 V, unless otherwise noted.

Table 1.

Parameter Test Conditions/Comments Min Typ Max Unit

ACCELEROMETERS

Measurement Range1 TA = 25°C ±18

Sensitivity, FFT TA = 25°C, 0 g to 20 g range setting 0.3052 mg/LSB

Sensitivity, Time Domain TA = 25°C 0.6104 mg/LSB

Sensitivity Error TA = 25°C ±6 %

Nonlinearity With respect to full scale ±0.2 ±1.25 %

Cross-Axis Sensitivity 2.6 %

Alignment Error With respect to package 1.5 Degrees

Offset Error TA = 25°C ±1

Offset Temperature Coefficient 1 mg/°C

Output Noise TA = 25°C, 20.48 kHz sample rate, time domain 12 mg rms

Output Noise Density TA = 25°C, 10 Hz to 1 kHz 0.248 mg/√Hz

±5% flatness,2 CAL_ENABLE[4] = 1, see Figure 18 5000 Hz

Sensor Resonant Frequency 5.5 kHz

LOGIC INPUTS3

Input High Voltage, V

Input Low Voltage, V

Logic 1 Input Current, I

Logic 0 Input Current, I

All Except
RST

RST

−1 mA

2.0 V

INH

0.8 V

INL

VIH = 3.3 V ±0.2 ±1 µA

INH

VIL = 0 V

INL

−40 −60 µA

Input Capacitance, CIN 10 pF

DIGITAL OUTPUTS3

Output High Voltage, VOH I

Output Low Voltage, VOL I

= 1.6 mA 2.4 V

SOURCE

= 1.6 mA 0.4 V

SINK

g

g

Endurance4 10,000 Cycles

Data Retention5 TJ = 85°C, see Figure 23 20 Years

START-UP TIME6

Initial Startup 202 ms

Reset Recovery7

pulse low or GLOB_CMD[7] = 1 54 ms

RST

Sleep Mode Recovery 2.3 ms

CONVERSION RATE REC_CTRL1[11:8] = 0x1 (SR0 sample rate selection) 20.48 kSPS

Clock Accuracy 3 %

POWER SUPPLY Operating voltage range, VDD 3.0 3.3 3.6 V

Power Supply Current Record mode, TA = 25°C 40 48 mA

Sleep mode, TA = 25°C 230 µA

1

The maximum range depends on the frequency of vibration.

2

Assumes that frequency flatness calibration is enabled.

3

The digital I/O signals are 5 V tolerant.

4

Endurance is qualified as per JEDEC Standard 22, Method A117 and measured at −40°C, +25°C, +85°C, and +125°C.

5

Retention lifetime equivalent at junction temperature (TJ) = 85°C as per JEDEC Standard 22, Method A117. Retention lifetime depends on junction temperature.

6

The start-up times presented reflect the time it takes for data collection to begin.

7

RST

The

pin must be held low for at least 15 ns.

Rev. B | Page 3 of 28

ADIS16228 Data Sheet

CS

SCLK

DOUT

DIN

1 2 3 4 5 6 15 16

R/W A5A6 A4 A3 A2

D2

MSB DB14

D1 LSB

DB13 DB12 DB10DB11 DB2 LSBDB1

t

CS

t

SFS

t

DAV

t

SR

t

SF

t

DHD

t

DSU

10069-002

CS

SCLK

t

STALL

10069-003

TIMING SPECIFICATIONS

TA = 25°C, VDD = 3.3 V, unless otherwise noted.

Table 2.

Parameter Description Min1 Typ Max Unit

f

SCLK frequency 0.01 2.5 MHz

SCLK

t

Stall period between data, between 16th and 17th SCLK 16.5 µs

STAL L

tCS Chip select to SCLK edge 48.8 ns
t

DOUT valid after SCLK edge 100 ns

DAV

t

DIN setup time before SCLK rising edge 24.4 ns

DSU

t

DIN hold time after SCLK rising edge 48.8 ns

DHD

tSR SCLK rise time 12.5 ns
tSF SCLK fall time 12.5 ns
tDF, tDR DOUT rise/fall times 5 12.5 ns
t

SFS

1

Guaranteed by design, not tested.

Timing Diagrams

high after SCLK edge 5 ns

CS

Figure 2. SPI Timing and Sequence

Figure 3. DIN Bit Sequence

Rev. B | Page 4 of 28

Data Sheet ADIS16228

Any Axis, Unpowered

2000 g

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

Acceleration

Any Axis, Powered 2000 g

VDD to GND −0.3 V to +6.0 V
Digital Input Voltage to GND −0.3 V to +5.3 V
Digital Output Voltage to GND −0.3 V to +3.6 V
Analog Inputs to GND −0.3 V to +3.6 V
Temperature

Operating Temperature Range −40°C to +125°C

Storage Temperature Range −65°C to +150°C

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

Table 4. Package Characteristics

Package Type θJA θJC Device Weight

15-Lead Module 31°C/W 11°C/W 6.5 grams

ESD CAUTION

Rev. B | Page 5 of 28

ADIS16228 Data Sheet

10069-004

TOP VIEW

BOTTOM VIEW

PIN 15

PIN 15

PIN 1

PIN 1

NOTES

1. LEADS ARE E X P OSED COPPER P ADS THAT ARE LOCATED ON
THE BOTTOM SIDE OF THE FLEXIBLE INTERFACE CABLE.

2. PACKAGE IS NOT SUITABLE FOR SOLDER REFLOW ASSEMBLY PROCESSES.

3. EXAMPLE MATING CONNECTOR:AVX CORPORATION

FLAT FLEXIBLE CONNECTOR (FFC)
P/N: 04-6288-015-000- 846.

3, 4, 5, 8

GND S Ground.

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Figure 4. Pin Configuration

Table 5. Pin Function Descriptions

Pin No. Mnemonic Type1 Description

1, 2 VDD S Power Supply, 3.3 V.

6, 9 DNC N/A No Connect. Do not connect to these pins.
7 DIO2 I/O Digital Input/Output Line 2.
10

I Reset, Active Low.

RST
11 DIN I SPI, Data Input.
12 DOUT O SPI, Data Output. DOUT is an output when CS is low. When CS is high,

DOUT is in a three-state, high impedance mode.
13 SCLK I SPI, Serial Clock.
14

I SPI, Chip Select.

CS

15 DIO1 I/O Digital Input/Output Line 1.

1

S is supply, O is output, I is input, and I/O is input/output.

Rev. B | Page 6 of 28

Data Sheet ADIS16228

MOVABLE
FRAME

ACCELERATION

UNIT
FORCING
CELL

UNIT SENSING
CELL

MOVING

PLATE

FIXED
PLATES

PLATE
CAPACITORS

ANCHOR

ANCHOR

10069-005

TRIAXIAL

MEMS

SENSOR

CLOCK

CONTROLLER

CAPTURE

BUFFER

CONTROL

REGISTERS

SPI
SIGNALS

SPI PORT

OUTPUT

REGISTERS

TEMP

SENSOR

ADC

10069-006

CS
SCLK
DIN
DOUT

NONVOLATILE

FLASH MEMORY

(NO SPI ACCESS)

MANUAL

FLASH

BACKUP

START-UP

RESET

VOLATILE

SRAM

SPI ACCESS

10069-007

THEORY OF OPERATION

The ADIS16228 is a vibration sensing system that combines a
triaxial MEMS accelerometer with advanced signal processing.
The SPI-compatible port and user register structure provide
convenient access to frequency domain vibration data and many
user controls.

SENSING ELEMENT

Digital vibration sensing in the ADIS16228 starts with a MEMS
accelerometer core on each axis. Accelerometers translate linear
changes in velocity into a representative electrical signal, using
a micromechanical system like the one shown in Figure 5. The
mechanical part of this system includes two different frames
(one fixed, one moving) that have a series of plates to form
a variable, differential capacitive network. When experiencing
the force associated with gravity or acceleration, the moving
frame changes its physical position with respect to the fixed
frame, which results in a change in capacitance. Tiny springs
tether the moving frame to the fixed frame and govern the
relationship between acceleration and physical displacement.
A modulation signal on the moving plate feeds through each
capacitive path into the fixed frame plates and into a demodulation
circuit, which produces the electrical signal that is proportional
to the acceleration acting on the device.

SIGNAL PROCESSING

Figure 6 offers a simplified block diagram for the ADIS16228.
The signal processing stage includes time domain data capture,
digital decimation/filtering, windowing, FFT analysis, FFT
averaging, and record storage. See Figure 14 for more details
on the signal processing operation.

Figure 5. MEMS Sensor Diagram

Figure 6. Simplified Sensor Signal Processing Block Diagram

USER INTERFACE

SPI Interface

The user registers (which include both the output registers and
the control registers, as shown in Figure 6) manage user access
to both sensor data and configuration inputs. Each 16-bit register
has its own unique bit assignment and two addresses: one for its
upper byte and one for its lower byte. Table 8 provides a memory
map for each register, along with its function and lower byte
address. The data collection and configuration command uses
the SPI, which consists of four wires. The chip select (
activates the SPI interface, and the serial clock (SCLK)
synchronizes the serial data lines. Input commands clock into
the DIN pin, one bit at a time, on the SCLK rising edge. Output
data clocks out of the DOUT pin on the SCLK falling edge.
When the SPI is used as a slave device, the DOUT contents
reflect the information requested using a DIN command.

Dual-Memory Structure

The user registers provide addressing for all input/output operations
in the SPI interface. The control registers use a dual-memory
structure. The controller uses SRAM registers for normal
operation, including user-configuration commands. The flash
memory provides nonvolatile storage for control registers that
have flash backup (see Table 8). Storing configuration data
in the flash memory requires a manual flash update command
(GLOB_CMD[6] = 1, DIN = 0xBE40). When the device powers
on or resets, the flash memory contents load into the SRAM, and
the device starts producing data according to the configuration
in the control registers.

CS

) signal

Rev. B | Page 7 of 28

Figure 7. SRAM and Flash Memory Diagram

ADIS16228 Data Sheet

SYSTEM
PROCESSOR
SPI MASTER

ADIS16228

SCLK

CS

DIN
DOUT

SCLK

SS

MOSI
MISO

3.3V

IRQ2
IRQ1

DIO2

VDD

I/O LINES ARE COMPATIBLE WITH

3.3V OR 5V LOGIC LEVELS

14

13

11

12

7

DIO1

15

1 2

3 4 5 8

10069-008

UPPER BYTE

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

LOWER BYTE

10069-009

CS

DIN

SCLK

10069-010

DOUT = 0011 1111 0110 0100 = 0x3F64 = 16,228 = P ROD_ID

SCLK

CS

DIN

DOUT

10069-011

R/W

R/W

A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0

DB0DB1DB2DB3DB4DB5DB6DB7DB8DB9DB10DB11DB12DB13DB14DB15

NOTES

1. DOUT BITS ARE BASED ON THE PREVIOUS 16-BIT SEQUENCE (R/W = 0).

CS

SCLK

DIN

DOUT

A6 A5

DB13DB14

DB15

10069-012

BASIC OPERATION

The ADIS16228 uses a SPI for communication, which enables
a simple connection with a compatible, embedded processor
platform, as shown in Figure 8. The factory default configuration
for DIO1 provides a busy indicator signal that transitions low
when an event completes and data is available for user access.
Use the DIO_CTRL register (see Table 66) to reconfigure DIO1
and DIO2, if necessary.

Figure 8. Electrical Hook-Up Diagram

Table 6. Generic Master Processor Pin Names and Functions

Pin Name Function

Slave select

SS
SCLK Serial clock
MOSI Master output, slave input
MISO Master input, slave output
IRQ1, IRQ2 Interrupt request inputs (optional)

The ADIS16228 SPI interface supports full duplex serial
communication (simultaneous transmit and receive) and uses
the bit sequence shown in Figure 12. Tab l e 7 provides a list of
the most common settings that require attention to initialize
a processor serial port for the ADIS16228 SPI interface.

Table 7. Generic Master Processor SPI Settings

Processor Setting Description

Master The ADIS16228 operates as a slave.
SCLK Rate ≤ 2.5 MHz Bit rate setting.
SPI Mode 3 Clock polarity/phase

(CPOL = 1, CPHA = 1).
MSB First Bit sequence.
16-Bit Shift register/data length.

Tabl e 8 provides a list of user registers with their lower byte
addresses. Each register consists of two bytes that each has its own
unique 7-bit address. Figure 9 relates the bits of each register to
their upper and lower addresses.

Figure 9. Generic Register Bit Definitions

SPI WRITE COMMANDS

User control registers govern many internal operations. The
DIN bit sequence in Figure 12 provides the ability to write to
these registers, one byte at a time. Some configuration changes
and functions require only one write cycle. For example, set
GLOB_CMD[11] = 1 (DIN = 0xBF08) to start a manual capture
sequence. The manual capture starts immediately after the last bit
clocks into DIN (16

th

SCLK rising edge). Other configurations may

require writing to both bytes.

Figure 10. SPI Sequence for Manual Capture Start (DIN = 0xBF08)

SPI READ COMMANDS

A single register read requires two 16-bit SPI cycles that also
use the bit assignments that are shown in Figure 12. The first
sequence sets
(Bits[A6:A0]). Bits[D7:D0] are don’t care bit s for a read DIN
sequence. DOUT clocks out the requested register contents
during the second sequence. The second sequence can also use
DIN to set up the next read. Figure 11 provides a signal diagram
for all four SPI signals while reading the PROD_ID. In this
diagram, DIN = 0x5600 and DOUT reflects the decimal
equivalent of 16,228.

R

/W = 0 and communicates the target address

Figure 11. Example SPI Read, PROD_ID, Second Sequence

Figure 12. Example SPI Read Sequence

Rev. B | Page 8 of 28

Data Sheet ADIS16228

Z_BUF

Read only

No

0x18

0x8000

Output, buffer for z-axis acceleration data

See Table 51

ALM_PNTR

Read/write

Yes

0x30

0x0000

Alarm, spectral alarm band pointer

See Table 27

LOT_ID1

Read only

Yes

0x52

N/A

Lot identification code

See Table 69

REC_FLSH_CNT

Read only

No

0x5E

N/A

Record flash write/erase counter

See Table 24

Table 8. User Register Memory Map

Register
Name

FLASH_CNT Read only Yes 0x00 N/A Status, flash memory write count See Table 68
X_SENS Read/write Yes 0x02 N/A X-axis accelerometer scale correction See Table 16
Y_SENS Read/write Ye s 0x04 N/A Y-axis accelerometer scale correction See Table 17
Z_SENS Read/write Ye s 0x06 N/A Z-axis accelerometer scale correction See Table 18
TEMP_OUT Read only No 0x08 0x8000 Output, temperature during capture See Table 56
SUPPLY_OUT Read only No 0x0A 0x8000 Output, power supply during capture See Table 54
FFT_AVG1 Read/write Yes 0x0C 0x0108 Control, FFT average size of 1, SR0 and SR1 See Table 19
FFT_AVG2 Read/write Yes 0x0E 0x0101 Control, FFT average size of 2, SR2 and SR3 See Table 20
BUF_PNTR Read/write No 0x10 0x0000 Control, buffer address pointer See Table 47
REC_PNTR Read/write No 0x12 0x0000 Control, record address pointer See Table 48
X_BUF Read only No 0x14 0x8000 Output, buffer for x-axis acceleration data See Table 49
Y_BUF Read only No 0x16 0x8000 Output, buffer for y-axis acceleration data See Table 50

REC_CTRL1 Read/write Yes 0x1A 0x1100 Control, Record Control Register 1 See Table 9
REC_CTRL2 Read/write Yes 0x1C 0x00FF Control, Record Control Register 2 See Table 14
REC_PRD Read/write Yes 0x1E 0x0000 Control, record period (automatic mode) See Table 10
ALM_F_LOW Read/write N/A 0x20 0x0000 Alarm, spectral band lower frequency limit See Table 28
ALM_F_HIGH Read/write N/A 0x22 0x0000 Alarm, spectral band upper frequency limit See Table 29
ALM_X_MAG1 Read/write N/A 0x24 0x0000 Alarm, x-axis, Alarm Trigger Level 1 (warning) See Table 30
ALM_Y_MAG1 Read/write N/A 0x26 0x0000 Alarm, y-axis, Alarm Trigger Level 1 (warning) See Table 31
ALM_Z_MAG1 Read/write N/A 0x28 0x0000 Alarm, z-axis, Alarm Trigger Level 1 (warning) See Table 32
ALM_X_MAG2 Read/write N/A 0x2A 0x0000 Alarm, x-axis, Alarm Trigger Level 2 (fault) See Table 33
ALM_Y_MAG2 Read/write N/A 0x2C 0x0000 Alarm, y-axis, Alarm Trigger Level 2 (fault) See Table 34
ALM_Z_MAG2 Read/write N/A 0x2E 0x0000 Alarm, z-axis, Alarm Trigger Level 2 (fault) See Table 35

Access

Flash
Backup

Address Default Function Reference

ALM_S_MAG Read/write Ye s 0x32 0x0000 Alarm, system alarm level See Table 36
ALM_CTRL Read/write Yes 0x34 0x0080 Alarm, configuration See Table 26
DIO_CTRL Read/write Yes 0x36 0x000F Control, functional I/O configuration See Table 66
GPIO_CTRL Read/write Yes 0x38 0x0000 Control, general-purpose I/O See Table 67
AVG_CNT Read/write Yes 0x3A 0x9630 Control, average count for sample rate options See Table 11
DIAG_STAT Read only No 0x3C 0x0000 Status, system error flags See Table 65
GLOB_CMD Write only No 0x3E N/A Control, global command register See Table 64
ALM_X_STAT Read only N/A 0x40 0x0000 Alarm, x-axis, status for spectral alarm bands See Table 37
ALM_Y_STAT Read only N/A 0x42 0x0000 Alarm, y-axis, status for spectral alarm bands See Table 38
ALM_Z_STAT Read only N/A 0x44 0x0000 Alarm, z-axis, status for spectral alarm bands See Table 39
ALM_X_PEAK Read only N/A 0x46 0x0000 Alarm, x-axis, peak value (most severe alarm) See Table 40
ALM_Y_PEAK Read only N/A 0x48 0x0000 Alarm, y-axis, peak value (most severe alarm) See Table 41
ALM_Z_PEAK Read only N/A 0x4A 0x0000 Alarm, z-axis, peak value (most severe alarm) See Table 42
TIME_STAMP_L Read only N/A 0x4C 0x0000 Record time stamp, lower word See Table 61
TIME_STAMP_H Read only N/A 0x4E 0x0000 Record time stamp, upper word See Table 62
Reserved N/A N/A 0x50 N/A N/A

LOT_ID2 Read only Yes 0x54 N/A Lot identification code See Table 70
PROD_ID Read only Ye s 0x56 0x3F64 Product identifier; convert to decimal = 16,228 See Table 71
SERIAL_NUM Read only Ye s 0x58 N/A Serial number See Table 72
USER_ID Read/write Ye s 0x5C 0x0000 User identification register See Table 73

Reserved N/A N/A 0x62 N/A N/A
Reserved N/A N/A 0x64 N/A N/A
Reserved N/A N/A 0x66 N/A N/A
Reserved N/A N/A 0x68 N/A N/A

Rev. B | Page 9 of 28