600 mA peak current at 5 V supply
Rail-to-rail switching operation
Typical power consumption (<0.1 µW)
APPLICATIONS
Cellular phones
PDAs
MP3 players
Power routing
Battery-powered systems
PCMCIA cards
Modems
Audio and video signal routing
Communications systems
GENERAL DESCRIPTION
The ADG884 is a low voltage CMOS device containing two
independently selectable single-pole, double-throw (SPDT)
switches. This device offers ultralow on resistance of less than
0.4 Ω over the full temperature range, making the part an ideal
solution for applications that require minimal distortion
through the switch. The ADG884 also has the capability of
carrying large amounts of current, typically 600 mA at 5 V
operation.
The ADG884 is available in a 10 bump, 2.0 mm × 1.50 mm
WLCSP package, a 10-lead LFCSP package, and a 10-lead
MSOP package. These tiny packages make the ADG884 the
ideal solution for space-constrained applications.
When on, each switch conducts equally well in both directions
and has an input signal range that extends to the supplies. The
ADG884 exhibits break-before-make switching action.
flatness
ON
2:1 MUX/SPDT Audio Switch
ADG884
FUNCTIONAL BLOCK DIAGRAM
ADG884
S1A
S1B
IN1
IN2
S2A
S2B
SWITCHES SHOWN FOR A LOGIC 1 INPUT
Figure 1.
PRODUCT HIGHLIGHTS
1. Single 1.8 V to 5.5 V operation.
2. High current handling capability (400 mA continuous
current at 3.3 V).
3. 1.8 V logic-compatible.
4. Low THD + N (0.01% typ).
5. Tiny 2 mm × 1.5 mm WLCSP package and 3 mm × 3 mm
10-lead LFCSP package.
Table 1. ADG884 Truth Table
Logic (IN1/IN2) Switch 1A/2A Switch 1B/2B
0 Off On
1 On Off
D1
D2
05028-001
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Parameter 25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
On Resistance, R
ON
0.28 Ω typ VDD = 4.5 V, VS = 0 V to VDD, IS = 100 mA
0.34 0.38 Ω max See Figure 18
On Resistance Match Between 0.01 Ω typ VDD = 4.5 V, VS = 2 V, IS = 100 mA
Channels, ∆R
ON
On Resistance Flatness, R
(ON) 0.1 Ω typ VDD = 4.5 V, VS = 0 V to V
FLAT
0.035 0.05 Ω max
0.13 0.15 Ω max IS = 100 mA
LEAKAGE CURRENTS VDD = 5.5 V
Source Off Leakage, IS (OFF) ±0.2 nA typ VS = 0.6 V/4.5 V, VD = 4.5 V/0.6 V; Figure 19
Channel On Leakage, ID, IS (ON) ±0.2 nA typ VS = VD = 0.6 V or 4.5 V; Figure 20
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current, I
or I
INL
INH
INL
INH
2.0 V min
0.8 V max
0.005 µA typ VIN = V
±0.1 µA max
Digital Input Capacitance, C
DYNAMIC CHARACTERISTICS
t
ON
IN
2
2 pF typ
42 ns typ RL = 50 Ω, CL = 35 pF
50 53 ns max VS = 3 V/0 V; Figure 21
t
15 ns typ RL = 50 Ω, CL = 35 pF
OFF
20 21 ns max VS = 3 V; Figure 21
Break-Before-Make Time Delay, t
BBM
16 ns typ RL = 50 Ω, CL = 35 pF
10 ns min VS1 = VS2 = 1.5 V; Figure 22
Charge Injection 125 pC typ VS = 1.5 V, RS = 0 Ω, CL = 1 nF; Figure 23
Off Isolation −60 dB typ
Channel-to-Channel Crosstalk −120 dB typ
−60 dB typ
Total Harmonic Distortion, THD + N 0.017 %
Insertion Loss −0.03 dB typ RL = 50 Ω, CL = 5 pF; Figure 25
−3 dB Bandwidth 18 MHz typ RL = 50 Ω, CL = 5 pF; Figure 25
CS (OFF) 103 pF typ
CD, CS (ON) 295 pF typ
POWER REQUIREMENTS VDD = 5.5 V
I
DD
0.003 µA typ Digital Inputs = 0 V or 5.5 V
1 µA max
1
Temperature range of the B version is −40°C to +85°C.
2
Guaranteed by design, not subject to production test.
1
DD
V
or V
INL
= 50 Ω, CL = 5 pF, f = 100 kHz;
R
L
DD
INH
Figure 24
S1A−S2A/S1B−S2B; R
= 50 Ω, CL = 5 pF,
L
f = 100 kHz; Figure 27
S1A−S1B/S2A−S2B; R
= 50 Ω, CL = 5 pF,
L
f = 100 kHz; Figure 26
= 32 Ω, f = 20 Hz to 20 kHz,
R
L
V
= 3.5 V p-p
S
Rev. 0 | Page 3 of 16
ADG884
VDD = 3.4 V to 4.2 V; GND = 0 V, unless otherwise noted.
Table 3.
Parameter 25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
On Resistance, R
ON
0.33 Ω typ VDD = 3.4 V, VS = 0 V to VDD, IS = 100 mA
0.38 0.45 Ω max See Figure 18
On Resistance Match Between 0.013 Ω typ VDD = 3.4 V, VS = 2 V, IS = 100 mA
Channels, ∆R
ON
On Resistance Flatness, R
(ON) 0.13 Ω typ VDD = 3.4 V, VS = 0 V to V
FLAT
0.042 0.065 Ω max
0.155 0.175 Ω max IS = 100 mA
LEAKAGE CURRENTS VDD = 4.2 V
Source Off Leakage, IS (OFF) ±0.2 nA typ VS = 0.6 V/3.9 V, VD = 3.9 V/0.6 V; Figure 19
Channel On Leakage, ID, IS (ON) ±0.2 nA typ VS = VD = 0.6 V or 3.9 V; Figure 20
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current, I
or I
INL
INH
INL
INH
2.0 V min
0.8 V max
0.005 µA typ VIN = V
±0.1 µA max
Digital Input Capacitance, C
DYNAMIC CHARACTERISTICS
t
ON
IN
2
2 pF typ
42 ns typ RL = 50 Ω, CL = 35 pF
50 54 ns max VS = 1.5 V/0 V; Figure 21
t
15 ns typ RL = 50 Ω, CL = 35 pF
OFF
21 24 ns max VS = 1.5 V; Figure 21
Break-Before-Make Time Delay, t
BBM
17 ns typ RL = 50 Ω, CL = 35 pF
10 ns min VS1 = VS2 = 1.5 V; Figure 22
Charge Injection 100 pC typ VS = 1.5 V, RS = 0 Ω, CL = 1 nF; Figure 23
Off Isolation −60 dB typ
Channel-to-Channel Crosstalk −120 dB typ
−60 dB typ
Total Harmonic Distortion, THD + N 0.01 %
Insertion Loss −0.03 dB typ RL = 50 Ω, CL = 5 pF; Figure 25
−3 dB Bandwidth 18 MHz typ RL = 50 Ω, CL = 5 pF; Figure 25
CS (OFF) 110 pF typ
CD, CS (ON) 300 pF typ
POWER REQUIREMENTS VDD = 4.2 V
I
DD
0.003 µA typ Digital Inputs = 0 V or 4.2 V
1 µA max
1
Temperature range of the B version is −40°C to +85°C.
2
Guaranteed by design, not subject to production test.
1
DD
V
or V
INL
= 50 Ω, CL = 5 pF, f = 100 kHz;
R
L
DD
INH
Figure 24
S1A−S2A/S1B−S2B; R
= 50 Ω, CL = 5 pF,
L
f = 100 kHz; Figure 27
S1A−S1B/S2A−S2B; R
= 50 Ω, CL = 5 pF,
L
f = 100 kHz; Figure 26
= 32 Ω, f = 20 Hz to 20 kHz,
R
L
V
= 2 V p-p
S
Rev. 0 | Page 4 of 16
ADG884
VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted.
Table 4.
Parameter 25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
On Resistance, R
ON
0.4 Ω typ VDD = 2.7 V, VS = 0 V to V
0.5 0.6 Ω max IS = 100 mA; Figure 18
On Resistance Match Between 0.02 Ω typ VDD = 2.7 V, VS = 0.6 V
Channels, ∆R
ON
On Resistance Flatness, R
(ON) 0.18 Ω typ VDD = 2.7 V, VS = 0 V to V
FLAT
0.07 0.1 Ω max IS = 100 mA
0.25 Ω max IS = 100 mA
LEAKAGE CURRENTS VDD = 3.6 V
Source Off Leakage, IS (OFF) ±0.2 nA typ VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V, Figure 19
Channel On Leakage, ID, IS (ON) ±0.2 nA typ VS = VD = 0.6 V or 3.3 V; Figure 20
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current, I
or I
INL
INH
INL
INH
1.3 V min
0.8 V max
0.005 µA typ VIN = V
±0.1 µA max
Digital Input Capacitance, C
DYNAMIC CHARACTERISTICS
t
ON
IN
2
2 pF typ
42 ns typ RL = 50 Ω, CL = 35 pF
56 62 ns max VS = 1.5 V/0 V; Figure 21
t
14 ns typ RL = 50 Ω, CL = 35 pF
OFF
19 21 ns max VS = 1.5 V; Figure 21
Break-Before-Make Time Delay, t
BBM
24 ns typ RL = 50 Ω, CL = 35 pF
10 ns min VS1 = VS2 = 1.5 V; Figure 22
Charge Injection 85 pC typ VS = 1.25 V, RS = 0 Ω, CL = 1 nF; Figure 23
Off Isolation −60 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz; Figure 24
Channel-to-Channel Crosstalk −120 dB typ
−60 dB typ
Total Harmonic Distortion, THD + N 0.03 % RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 1.5 V p-p
Insertion Loss −0.03 dB typ RL = 50 Ω, CL = 5 pF; Figure 25
–3 dB Bandwidth 18 MHz typ RL = 50 Ω, CL = 5 pF; Figure 25
CS (OFF) 110 pF typ
CD, CS (ON) 300 pF typ
POWER REQUIREMENTS VDD = 3.6 V
I
DD
0.003 µA typ Digital Inputs = 0 V or 3.6 V
1 µA max
1
Temperature range of the B version is −40°C to +85°C.
2
Guaranteed by design, not subject to production test.
1
DD
V
or V
INL
INH
S1A−S2A/S1B−S2B; R
DD
DD
= 50 V, CL = 5 pF,
L
f = 100 kHz; Figure 27
S1A−S1B/S2A−S2B; R
= 50 Ω, CL = 5 pF,
L
f = 100 kHz; Figure 25
Rev. 0 | Page 5 of 16
Loading...
+ 11 hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.