Analog Devices ADG802BRT, ADG802BRM, ADG801BRT, ADG801BRM Datasheet

PRELIMINARY TECHNICAL DA T A
a
FEATURES Low On Resistance < 0.5
ΩΩ
0.1
On Resistance Flatness
ΩΩ
+1.8 V to +5.5 V Single Supply 100pA Leakage Currents 14ns Switching Times Extended Temperature Range -40 High Current Carrying Capability Tiny 6 lead SOT23 and 8 Lead Low Power Consumption TTL/CMOS Compatible Inputs Pin Compatible with ADG701/ADG702
APPLICATIONS Power Routing Audio and Video Signal Routing Cellular Phones Modems PCMCIA Cards Hard Drives Data Acquisition Systems Communication Systems Relay replacement Audio and Video Switching Battery Powered Systems
ΩΩ
max at 5 V supply
ΩΩ
o
C to +125oC
µµ
µSOIC Packages
µµ
<0.5
CMOS, Low Voltage, SPST Switches
ADG801/ADG802
FUNCTIONAL BLOCK DIAGRAMS
ADG801
S
SWITCHES SHOWN FOR A LOGIC "1" INPUT
D
IN
ADG802
S
D
IN
GENERAL DESCRIPTION
The ADG801/ADG802 are monolithic CMOS SPST (Single Pole, Single Throw) switches with On Resistance of less than
0.5. These switches are designed on an advanced submicron process that provides extremely low on resistance, high switch­ing speed and low leakage currents.
The low On Resistance of <0.5 means these parts are ideal for applications where low on resistance switching is critical.
The ADG801 is a normally open (NO) switch, while the ADG802 is normally closed (NC). Each switch conducts equally well in both directions when ON.
The ADG801 and ADG802 are available in 6-lead SOT-23 and 8 Lead µSOIC packages.
REV. PrE Jan ‘02
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
PRODUCT HIGHLIGHTS
1. Low On Resistance (0.25 Ω typical).
2. +1.8V to +5.5V Single Supply Operation.
3. Tiny 6 Lead SOT23 and 8 Lead µSOIC Packages.
4. Pin Compatible with ADG701 (ADG801) Pin Compatible with ADG702 (ADG802).
PRELIMINARY TECHNICAL DA T A
ADG801/ADG802–SPECIFICA TIONS
1
(VDD = 5 V ±10%, VSS = GND = 0 V. All specifications –40°C to +125°C unless otherwise noted.)
–40oC to –40oC to
Parameter +25oC +85oC +125oC Units Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to VDDV On Resistance (R
On-Resistance Flatness (R
LEAKAGE CURRENTS V
Source OFF Leakage I Drain OFF Leakage ID (OFF) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V; Channel ON Leakage I
DIGITAL INPUTS
Input High Voltage, V Input Low Voltage, V Input Current
I
or I
INL
INH
CIN, Digital Input Capacitance 5 pF typ
DYNAMIC CHARACTERISTICS
t
ON
) 0.25 typ VS = 0 V to VDD, IS = –10 mA;
ON
0.4 0.5 0.75 max Test Circuit 1
FLAT(ON)
) 0.05 typ VS = 0 V to VDD, IS = –10 mA
0.1 0.2 max = +5.5 V
(OFF) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V;
S
DD
±0.5 ±1 tbd nA max Test Circuit 2 ±0.5 ±1 tbd nA max Test Circuit 2
, IS (ON) ±0.01 nA typ VS = VD = 1 V, or 4.5 V;
D
±0.5 ±1 tbd nA max Test Circuit 3
INH
INL
0.005 µA typ VIN = V
2.4 V min
0.8 V max
INL
or V
INH
±0.1 µA max
2
30 ns typ RL = 50 , CL = 35 pF TBD TBD ns max V
= 3 V; Test Circuit 4
S
t
OFF
Charge Injection ±20 pC typ V
20 ns typ RL = 50 , CL = 35 pF TBD TBD ns max V
= 3 V; Test Circuit 4
S
= 0 V, RS = 0 , CL = 1 nF, Test
S
Circuit 5
Off Isolation –65 dB typ R
= 50 , CL = 5 pF, f = 1 MHz,
L
Test Circuit 6 Bandwidth –3 dB 30 MHz typ R C
(OFF) 55 pF typ f = 1 MHz
S
C
(OFF) 55 pF typ f = 1 MHz
D
= 50 , CL = 5 pF, Test Circuit 7
L
CD, CS (ON) 110 pF typ f = 1 MHz
POWER REQUIREMENTS V
I
DD
0.001 µA typ Digital Inputs = 0 V or 5.5 V
DD
1.0 µA max
NOTES
1
Temperature ranges are as follows: Extended Temperature Range: –40°C to +125°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
= +5.5 V
–2–
REV. PrE
PRELIMINAR Y TECHNICAL DA T A
ADG801/ADG802
1
SPECIFICA TIONS
Parameter +25oC +85oC +125oC Units Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to VDDV On Resistance (R
On-Resistance Flatness(R
LEAKAGE CURRENTS V
Source OFF Leakage I Drain OFF Leakage I Channel ON Leakage I
DIGITAL INPUTS
Input High Voltage, V Input Low Voltage, V Input Current
I
or I
INL
INH
CIN, Digital Input Capacitance 5 pF typ
DYNAMIC CHARACTERISTICS
t
ON
t
OFF
Charge Injection ±20 pC typ V Off Isolation –65 dB typ R Bandwidth –3 dB 30 MHz typ R
C
(OFF) 55 pF typ f = 1 MHz
S
C
(OFF) 55 pF typ f = 1 MHz
D
CD, CS (ON) 110 pF typ f = 1 MHz
POWER REQUIREMENTS V
I
DD
NOTES
1
Temperature ranges are as follows: Extended Temperature Range: –40°C to +125°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
) 0.3 1 typ VS = 0 V to VDD, IS = –10 mA;
ON
D
INH
INL
(VDD = 2.7 V to 3.6 V, VSS = GND = 0 V. All specifications –40°C to +125°C unless otherwise noted.)
–40oC to –40oC to
0.7 0.8 max Test Circuit 1
FLAT(ON)
(OFF) ±0.01 nA typ VS = 3 V/1 V, VD = 1 V/3 V;
S
) 0.1 0.3 typ VS = 0 V to VDD, IS = –10 mA
= +3.3 V
DD
±0.5 ±0.1 tbd nA max Test Circuit 2
(OFF) ±0.01 nA typ VS = 3 V/1 V, VD = 1 V/3 V;
±0.5 ±0.1 tbd nA max Test Circuit 2
, IS (ON) ±0.01 nA typ VS = VD = 1 V, or 3 V;
D
±0.5 ±0.1 tbd nA max Test Circuit 3
2.0 V min
0.4 V max
0.005 µA typ VIN = V
INL
or V
INH
±0.1 µA max
2
50 ns typ RL = 50 , CL = 35 pF TBD TBD ns max V
= 1.5 V, Test Circuit 4
S
40 ns typ RL = 50 , CL = 35 pF TBD TBD ns max V
= 0 V, RS = 0 , CL = 1 nF, Test
S
= 1.5 V, Test Circuit 4
S
Circuit 5
= 50 , CL = 5 pF, f = 1 MHz,
L
Test Circuit 6
= 50 , CL = 5 pF, Test Circuit 7
L
= +3.3 V
DD
0.001 µA typ Digital Inputs = 0 V or 3.3 V
1.0 µA max
REV. PrE
–3–
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