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ADG 790
Service Manual
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Analog Devices ADG 790 Service Manual

www.DataSheet4U.com
S1A
S
S2A
S
S3A
S
Low Voltage, CMOS Multimedia Switch

FEATURES

Single-chip audio/video/data switching solution Wide bandwidth section
Rail-to-rail signal switching capability Compliant with full speed USB 2.0 signaling (3.6 V p-p) Compliant with high speed USB 2.0 signaling (400 mV p-p) Supports USB data rates up to 480 Mbps 550 MHz, 3 dB bandwidth Low R Excellent matching between channels
Low distortion section
Low R 230 MHz, 3 dB bandwidth (SPDT)
160 MHz, 3 dB bandwidth (4:1 multiplexers) Single-supply operation: 1.65 V to 3.6 V Typical power consumption: <0.1 μW Pb-free packaging: 30-ball WLCSP (3 mm × 2.5 mm)

APPLICATIONS

Cellular phones PMPs MP3 players Audio/video/data/USB switching
: 5.9 Ω typical
ON
: 3.9 Ω typical
ON
ADG790

FUNCTIONAL BLOCK DIAGRAM

ADG790
1B
D1
2B
D2
3B
D3
WIDE
BANDWIDTH
SECTION
DD
DECODER
Figure 1.
LOW
DISTORT ION
SECTION
IN3IN2IN1
S/D
S5A
S5B
S5C
S5D
D5
S6A
S6B
S6C
S6D
D6
S4A
S4B
D4
GNDV
6357-001

GENERAL DESCRIPTION

The ADG790 is a single-chip, CMOS switching solution that comprises four SPDT switches and two 4:1 multiplexers. The internal architecture of the device provides two switching sections, a wide bandwidth section and a low distortion section.
The wide bandwidth section contains three SPDT switches that exhibit low on resistance with excellent flatness and channel matching. This, combined with wide bandwidth, makes the three-SPDT-switch configuration ideal for high frequency signals, such as full speed (12 Mbps) and high speed (480 Mbps) USB signals and high resolution video signals.
The low distortion section contains a single SPDT switch and two 4:1 multiplexers that exhibit very low on resistance and excellent flatness, making these switches ideal for a wide range of applications, including low distortion audio applications and low resolution video (CVBS and S-Video) applications.
Rev. 0
All switches conduct equally well in both directions when on and block signals up to the supply rails when off. A 4-wire parallel interface controls the operation of the device and allows the user to control switches from both sections simul­taneously. This simplifies the design and provides a cost-effective, single-chip switching solution for portable devices where multiple signals share a single port connector. The shutdown (S/D) pin allows the user to disable all four SPDT switches and force the 4:1 multiplexers into the S5B and S6B positions, respectively.
The ADG790 is packaged in a compact, 30-ball WLCSP (6 × 5
2
ball array) with a total area of 7.5 mm
(3 mm × 2.5 mm). This tiny package size and its low power consumption make the ADG790 an ideal solution for portable devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved.
ADG790

TABLE OF CONTENTS

Features.............................................................................................. 1
Test Circuits..................................................................................... 11
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Terminology ...................................................................................... 7
Typical Performance Characteristics ............................................. 8

REVISION HISTORY

1/07—Revision 0: Initial Version
Theory of Operation ...................................................................... 13
Wide Bandwidth Section........................................................... 13
Low Distortion Section.............................................................. 13
Control Interface ........................................................................ 13
Evaluation Board............................................................................ 14
Using the ADG790 Evaluation Board ..................................... 14
Outline Dimensions....................................................................... 17
Ordering Guide .......................................................................... 17
Rev. 0 | Page 2 of 20
ADG790

SPECIFICATIONS

VDD = 2.7 V to 3.6 V, GND = 0 V, TA = –40°C to +85°C, all switch sections unless otherwise noted.
Table 1.
Parameter Symbol Test Conditions/Comments Min Typ
1
Max Unit
ANALOG SWITCH
Analog Signal Range 0 VDD V
On Resistance RON V Wide bandwidth section Low distortion section
On Resistance Flatness R
FLAT(ON)
Wide bandwidth section Low distortion section
On Resistance Matching
Between Channels
4
∆RON V
Wide bandwidth section
= 2.7 V, VS = 0 V to VDD, IDS = 10 mA (see Figure 18)
DD
2
3
5.9 8.8 Ω
3.9 5.5 Ω
VDD = 2.7 V, VS = 0 V to VDD, IDS = 10 mA (see Figure 18)
2
3
= 2.7 V, VS = 0 V to VDD, IDS = 10 mA
DD
2
2.0 3.6 Ω
0.74 1.6 Ω
0.52 Ω Low distortion section3 (SPDT) 0.1 Ω Low distortion section3 (4:1 multiplexers) 0.3 Ω LEAKAGE CURRENTS
Source Off Leakage IS (OFF)
= 3.6 V, VS = 0 V or 3.6 V, VD = 3.6 V or 0 V
V
DD
(see
Figure 19)
±10 nA
Channel On Leakage ID, IS (ON) VDD = 3.6 V, VS = VD = 0 V or 3.6 V (see Figure 20) ±10 nA
DIGITAL INPUTS (IN1, IN2, IN3, S/D)
Input High Voltage V Input Low Voltage V Input High/Input Low Current I
2.0 V
INH
0.8 V
INL
, I
INL
INH
VIN = V
INL
or V
±0.005 ±0.1 μA
INH
Digital Input Capacitance CIN 6 pF
DYNAMIC CHARACTERISTICS
tON t t
t
OFF
Propagation Delay tD R
Wide bandwidth section
5
R
ON
R
OFF
= 50 Ω, CL = 35 pF, VS = VDD/2 or 0 V (see Figure 24) 20 32 ns
L
= 50 Ω, CL = 35 pF, VS = VDD/2 or 0 V (see Figure 24) 9 15 ns
L
= 50 Ω, CL = 35 pF
L
2
0.3 0.46 ns Low distortion section3 (SPDT) 0.65 0.95 ns Low distortion section3 (4:1 multiplexers) 0.4 0.65 ns
Propagation Delay Skew t
Wide bandwidth section
R
SKEW
= 50 Ω, CL = 35 pF
L
2
20 ps
Low distortion section3 (4:1 multiplexers) 40 ps
Break-Before-Make Time Delay t
Charge Injection Q Wide bandwidth section Low distortion section
R
BBM
V
INJ
= 50 Ω, CL = 35 pF, VS1 = VS2 = VDD/2 (see Figure 25) 5 11 ns
L
= 0 V, RS = 0 Ω, CL = 1 nF (see Figure 26)
S
2
3
–0.57 pC
6.2 pC Off Isolation RL = 50 Ω, CL = 5 pF, f = 1 MHz (see Figure 21) –74 dB Channel-to-Channel Crosstalk RL = 50 Ω, CL = 5 pF, f = 1 MHz (see Figure 22) –77 dB Total Harmonic Distortion THD + N RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 2 V p-p
Wide bandwidth section Low distortion section
2
3
1.2 %
0.65 % –3 dB Bandwidth RL = 50 Ω, CL = 5 pF (see Figure 23)
Wide bandwidth section
2
550 MHz Low distortion section3 (SPDT) 230 MHz Low distortion section3 (4:1 multiplexers) 160 MHz
Differential Gain Error CCIR330 test signal
Wide bandwidth section
2
0.07 % Low distortion section3 (SPDT) 0.08 % Low distortion section3 (4:1 multiplexers) 0.18 %
Rev. 0 | Page 3 of 20
ADG790
Parameter Symbol Test Conditions/Comments Min Typ
1
Max Unit
Differential Phase Error CCIR330 test signal
Wide bandwidth section
2
0.13 Degrees Low distortion section3 (SPDT) 0.08 Degrees Low distortion section3 (4:1 multiplexers) 0.19 Degrees
Power Supply Rejection Ratio PSRR f= 10 kHz, no decoupling capacitors –90 dB Source Off Capacitance CS (OFF) Wide bandwidth section
Low distortion section
Drain Off Capacitance CD (OFF) Wide bandwidth section
2
3
2
3.5 pF
11 pF
5.5 pF Low distortion section3 (SPDT) 14 pF
Source/Drain On Capacitance CD, CS (ON) Wide bandwidth section
2
8.5 pF Low distortion section3 (SPDT) 19 pF Low distortion section3 (4:1 multiplexers) 32 pF POWER REQUIREMENTS
Supply Voltage VDD 1.65 3.6 V Supply Current IDD V
1
All typical values are at TA = 25°C, VDD = 3.3 V.
2
Refers to all switches connected to Pin D1, Pin D2, and Pin D3.
3
Refers to all switches connected to Pin D4 (SPDT), Pin D5, and Pin D6 (4:1 multiplexers).
4
Refers to the on resistance matching between the same channels (SxA and SxB, for example) from different multiplexers for the wide bandwidth section and the 4:1
multiplexers from the low distortion section. For the SPDT switch from the low distortion section, it refers to the matching between the S4A and S4B channels.
5
Guaranteed by design; not subject to production test.
= 3.6 V, digital inputs tied to 0 V or 3.6 V 0.1 1 μA
DD
Rev. 0 | Page 4 of 20
ADG790

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.
Table 2.
Parameter Rating
VDD to GND –0.3 V to +4.6 V Analog and Digital Pins1
Peak Current, S or D
Continuous Current, S or D 30 mA Operating Temperature Range –40°C to +85°C Storage Temperature Range –65°C to +125°C Junction Temperature 150°C Thermal Impedance (θJA)2 80°C/W Reflow Soldering (Pb Free)
Peak Temperature 260°C (+0°C/–5°C) Time at Peak Temperature As per JEDEC J-STD-20
1
Overvoltages at IN, S, or D are clamped by internal diodes. Limit current to
the maximum ratings given.
2
Measured with the device soldered on a 4-layer board.
–0.3 V to V whichever occurs first
100 mA (pulsed at 1 ms, 10% duty cycle maximum)
+ 0.3 V or 10 mA,
DD
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Only one absolute maximum rating can be applied at any one time.

ESD CAUTION

Rev. 0 | Page 5 of 20
ADG790

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

BALL A1 CORNER
1
234
A
S1A S5A D5 S5C S4A
B
D1 S5B IN1 S5D D4
5
C
S1B GND IN2 V
D
S2B GND IN3 GND S3B
E
D2 S6B S/D S6D D3
F
S2A S6A D6 S6C S3A
TOP VIEW
(BALL SI DE DOWN)
Not to Scale
Figure 2. 30-Ball WLCSP (CB-30-1)
S4B
DD
06357-002
Table 3. Pin Function Descriptions
Ball Name Mnemonic Description
A1 S1A Source Terminal for Mux 1 (Wide Bandwidth Section). Can be an input or an output. A2 S5A Source Terminal for Mux 5 (Low Distortion Section). Can be an input or an output. A3 D5 Drain Terminal for Mux 5 (Low Distortion Section). Can be an input or an output. A4 S5C Source Terminal for Mux 5 (Low Distortion Section). Can be an input or an output. A5 S4A Source Terminal for Mux 4 (Low Distortion Section). Can be an input or an output. B1 D1 Drain Terminal for Mux 1 (Wide Bandwidth Section). Can be an input or an output. B2 S5B Source Terminal for Mux 5 (Low Distortion Section). Can be an input or an output. B3 IN1 Logic Control Input. B4 S5D Source Terminal for Mux 5 (Low Distortion Section). Can be an input or an output. B5 D4 Drain Terminal for Mux 4 (Low Distortion Section). Can be an input or an output. C1 S1B Source Terminal for Mux 1 (Wide Bandwidth Section). Can be an input or an output. C2 GND Ground (0 V) Reference. C3 IN2 Logic Control Input. C4 VDD Most Positive Power Supply Terminal. C5 S4B Source Terminal for Mux 4 (Low Distortion Section). Can be an input or an output. D1 S2B Source Terminal for Mux 2 (Wide Bandwidth Section). Can be an input or an output. D2 GND Ground (0 V) Reference. D3 IN3 Logic Control Input. D4 GND Ground (0 V) Reference. D5 S3B Source Terminal for Mux 3 (Wide Bandwidth Section). Can be an input or an output. E1 D2 Drain Terminal for Mux 2 (Wide Bandwidth Section). Can be an input or an output. E2 S6B Source Terminal for Mux 6 (Low Distortion Section). Can be an input or an output. E3 S/D Shutdown Logic Control Input. E4 S6D Source Terminal for Mux 6 (Low Distortion Section). Can be an input or an output. E5 D3 Drain Terminal for Mux 3 (Wide Bandwidth Section). Can be an input or an output. F1 S2A Source Terminal for Mux 2 (Wide Bandwidth Section). Can be an input or an output. F2 S6A Source Terminal for Mux 6 (Low Distortion Section). Can be an input or an output. F3 D6 Drain Terminal for Mux 6 (Low Distortion Section). Can be an input or an output. F4 S6C Source Terminal for Mux 6 (Low Distortion Section). Can be an input or an output. F5 S3A Source Terminal for Mux 3 (Wide Bandwidth Section). Can be an input or an output.
Rev. 0 | Page 6 of 20
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