−3 dB bandwidth 150 MHz
Tiny 10-lead LFCSP, WLCSP, MSOP packages
Single-supply 1.8 V to 5.5 V operation
Low on resistance
2.5 Ω typ
3.35 max at 85°C
Typical power consumption: <0.1 µW
APPLICATIONS
USB 1.1 signal switching circuits
Cellular phones
PDAs
MP3 players
Battery-powered systems
Headphone switching
Audio and video signal routing
Communications systems
Dual 2:1 Mux/Demux USB 1.1 Switch
ADG787
FUNCTIONAL BLOCK DIAGRAM
S1
S1B
S2
S2B
ADG787
IN1
IN2
SWITCHES SHOWN
FOR A LOGIC 0 INPUT
Figure 1.
D1
D2
05250-001
GENERAL DESCRIPTION
The ADG787 is a low voltage, CMOS device that contains two
independently selectable, single-pole, double-throw (SPDT)
switches. It is designed as a general analog/digital switch and
can also be used for routing USB 1.1 signals.
This device offers low on resistance of typically 2.5 Ω, making
the part an attractive solution for applications that require low
distortion through the switch.
The ADG787 comes in a tiny 3 × 4 bump, 1.50 mm × 2.00 mm
WLCSP, a tiny 10-lead LFCSP, and a 10-lead MSOP. These
packages make the ADG787 the ideal solution for spaceconstrained applications.
Each switch conducts equally well in both directions when on
and has an input signal range that extends to the supplies. The
ADG787 exhibits break-before-make switching action.
MASK: FS (12Mbps)
1
= 25°C
05250-032
Figure 2. Eye Pattern; 12 Mbps, V
V
= 4.2 V, PRBS 31
DD
20.0ns/DIV
= 3V p-p
IN
T
A
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
VDD = 4.2 V to 5.5 V, GND = 0 V, unless otherwise noted.
Table 1.
Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 to V
On Resistance (RON) 2.5 Ω typ VDD = 4.2 V, VS = 0 V to VDD, IS = 10 mA
2.9 3.35 Ω max See Figure 28
On Resistance Match Between Channels (∆RON) 0.02 Ω typ VDD = 4.2 V, VS = 3.5 V, IS = 10 mA
0.1 Ω max
On Resistance Flatness (R
) 0.65 Ω typ VDD = 4.2 V, VS = 0 V to V
FLAT (ON)
0.8 0.95 Ω max IS = 10 mA
LEAKAGE CURRENTS VDD = 5.5 V
Source Off Leakage IS(OFF) ±0.05 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 29
Channel On Leakage ID, IS(ON) ±0.05 nA typ VS = VD = 1 V or 4.5 V; see Figure 30
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
INH
INL
Input Current
I
or I
INL
INH
±0.1 µA max
CIN, Digital Input Capacitance 2.5 pF typ
DYNAMIC CHARACTERISTICS
t
ON
2
19 22 ns max VS = 3 V; See Figure 31
t
3 ns typ RL = 50 Ω, CL = 35 pF
OFF
5 6 ns max VS = 3 V; See Figure 31
Propagation Delay Skew, t
SKEW
0.15 ns max
Break-Before-Make Time Delay (t
) 10 ns typ RL = 50 Ω, CL = 35 pF
BBM
5 ns min VS1 = VS2 = 3 V; See Figure 32
Charge Injection 14 pC typ VD = 1 V, RS = 0 Ω, CL = 1 nF; See Figure 33
Off Isolation −63 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; See Figure 34
Channel-to-Channel Crosstalk −110 dB typ
−63 dB typ
Total Harmonic Distortion (THD + N) 0.03 % RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 2 V p-p
Insertion Loss −0.2 dB typ RL = 50 Ω, CL = 5 pF; see Figure 35
−3 dB Bandwidth 145 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 35
CS (OFF) 16 pF typ
CD, CS (ON) 40 pF typ
POWER REQUIREMENTS VDD = 5.5 V
I
DD
1 µA max
1
Temperature range for B version: −40°C to +85°C.
2
Guaranteed by design, not subject to production test.
1
DD
V
DD
2.0 V min
0.8 V max
0.005 µA typ VIN = V
INL
or V
INH
13 ns typ RL = 50 Ω, CL = 35 pF
0.06 ns typ CL = 50 pF; VS = 3 V
S1A to S2A/S1B to S2B; R
= 50 Ω, CL = 5 pF,
L
f = 1 MHz; see Figure 37
S1A to S1B/S2A to S2B; R
= 50 Ω, CL = 5 pF,
L
f = 1 MHz; see Figure 36
0.005 µA typ Digital inputs = 0 V or 5.5 V
Rev. 0 | Page 3 of 16
ADG787
VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range V
On Resistance (RON) 4 Ω typ VDD = 2.7 V, VS = 0 V to VDD
5.2 5.5 Ω max IS = 10 mA; see Figure 28
On Resistance Match Between Channels (∆RON) 0.07 Ω typ VDD = 2.7 V, VS = 1.5 V
0.3 0.35 Ω max IS = 10 mA
On Resistance Flatness (R
) 1.6 Ω typ VDD = 2.7 V, VS = 0 V to V
FLAT (ON)
2.2 2.5 Ω max IS = 10 mA
LEAKAGE CURRENTS VDD = 3.6 V
Source Off Leakage IS(OFF) ±0.01 nA typ VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V; see Figure 29
Channel On Leakage ID, IS(ON) ±0.01 nA typ VS = VD = 0.6 V or 3.3 V; see Figure 30
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
INH
INL
Input Current
I
or I
INL
INH
±0.1 µA max
CIN, Digital Input Capacitance 2 pF typ
DYNAMIC CHARACTERISTICS
t
ON
2
30 35 ns max VS = 1.5 V; see Figure 31
t
4 ns typ RL = 50 Ω, CL = 35 pF
OFF
6 7 ns max VS = 1.5 V; see Figure 31
Propagation Delay Skew, t
SKEW
0.12 ns max
Break-Before-Make Time Delay (t
) 15 ns typ RL = 50 Ω, CL = 35 pF
BBM
5 ns min VS1 = VS2 = 1.5 V; see Figure 32
Charge Injection 10 pC typ VD = 1.25 V, RS = 0 Ω, CL = 1 nF; see Figure 33
Off Isolation −63 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 34
Channel-to-Channel Crosstalk −110 dB typ
−63 dB typ
Total Harmonic Distortion (THD + N) 0.07 % RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 1.5 V p-p
Insertion Loss −0.24 dB typ RL = 50 Ω, CL = 5 pF; see Figure 35
−3 dB Bandwidth 145 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 35
CS (OFF) 16 pF typ
CD, CS (ON) 40 pF typ
POWER REQUIREMENTS VDD = 3.6 V
I
DD
1 µA max
1
Temperature range for B version: −40°C to +85°C.
2
Guaranteed by design, not subject to production test.
1
DD
1.3 V min
0.8 V max
0.005 µA typ VIN = V
INL
or V
INH
18 ns typ RL = 50 Ω, CL = 35 pF
0.04 ns typ CL = 50 pF; VS = 1.5 V
S1A to S2A/S1B to S2B; R
= 50 Ω, CL = 5 pF,
L
f = 1 MHz; see Figure 37
S1A to S1B/S2A to S2B; R
= 50 Ω, CL = 5 pF,
L
f = 1 MHz; see Figure 35
0.005 µA typ Digital Inputs = 0 V or 3.6 V
Rev. 0 | Page 4 of 16
ADG787
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
VDD to GND −0.3 V to +6 V
Analog Inputs
Digital Inputs1
Peak Current, S or D
5 V Operation 300 mA
3.3 V Operation
Continuous Current, S or D
5 V Operation 100 mA
3.3 V Operation 80 mA
Operating Temperature Range
Industrial (B Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
WLCSP Package (4-Layer Board)
θJC Thermal Impedance 43.7°C/W
Lead-Free Temperature Soldering
IR Reflow, Peak Temperature 260°C ± 5°C
1
−0.3 V to VDD + 0.3 V
−0.3 V to +6 V or 10 mA,
whichever occurs first
200 mA (pulsed at 1 ms,
10% duty cycle max)
1
Overvoltages at IN, S, or D are clamped by internal diodes. Current should be
limited to the maximum ratings given.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Only one absolute maximum rating may be
applied at any one time.
TRUTH TABLE
Table 4.
Logic (IN1/IN2) Switch 1A/2A Switch 1B/2B
0 Off On
1 On Off
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate
on the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 5 of 16
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