ANALOG DEVICES ADG779 Service Manual

CMOS 1.8 V to 5.5 V, 2.5 Ω
www.BDTIC.com/ADI
SPDT Switch/2:1 Mux in Tiny SC70 Package

FEATURES

1.8 V to 5.5 V single supply
2.5 Ω on resistance
0.75 Ω on-resistance flatness
−3 dB bandwidth >200 MHz Rail-to-rail operation 6-lead SC70 package Fast switching times
20 ns
t
ON
t
6 ns
OFF
Typical power consumption (<0.01 μW) TTL/CMOS compatible

APPLICATIONS

Battery-powered systems Communication systems Sample hold systems Audio signal routing Video switching Mechanical reed relay replacements

GENERAL DESCRIPTION

The ADG779 is a monolithic CMOS SPDT (single-pole, double-throw) switch. This switch is designed on a submicron process that provides low power dissipation yet gives high switching speed, low on resistance, and low leakage currents.
The ADG779 operates from a single supply range of 1.8 V to
5.5 V
, making it ideal for use in battery-powered instruments and with the new generation of DACs and ADCs from Analog Devices, Inc.
Each switch of the ADG779 conducts equally well in both dir
ections when on. The ADG779 exhibits break-before-make
switching action.
Because of the advanced submicron process, −3 dB bandwidth
f greater than 200 MHz can be achieved.
o
The ADG779 is available in a 6-lead SC70 package.
ADG779

FUNCTIONAL BLOCK DIAGRAM

ADG779
S2
S1
IN
SWITCHES SHOWN FOR
A LOGIC 1 INPUT
Figure 1.

PRODUCT HIGHLIGHTS

1. Tiny 6-Lead SC70 Package.
2. 1.8 V t
3. Ve
4. On-
5. −3 dB B
6. Lo
7. 14 n
o 5.5 V Single-Supply Operation. The ADG779 offers high performance, including low on resistance and fast switching times, and is fully specified and guaranteed with 3 V and 5 V supply rails.
r y Low R
operation, R
Resistance Flatness (R
(5 Ω max at 5 V, 10 Ω max at 3 V). At 1.8 V
ON
is typically 40 Ω over the temperature range.
ON
FLAT (ON)
andwidth > 200 MHz.
w Power Dissipation. CMOS construction ensures low
power dissipation.
s Switching Times.
D
02491-001
) (0.75 Ω typ).
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.
ADG779
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TABLE OF CONTENTS

Features .............................................................................................. 1
Pin Configuration and Function Descriptions..............................6
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Product Highlights........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5

REVISION HISTORY

10/05—Rev. 0 to Rev. A
Updated Format..................................................................Universal
Changes to Table 1............................................................................ 3
Changes to Table 2............................................................................ 4
Changes to Table 3............................................................................ 5
Changes to Terminology Section.................................................... 7
Changes to Ordering Guide.......................................................... 12
Te r mi n ol o g y .......................................................................................7
Typical Perf or m an c e Character i st ics ..............................................8
Test Cir c ui t s..................................................................................... 10
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 12
7/01—Revision 0: Initial Version
Rev. A | Page 2 of 12
ADG779
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SPECIFICATIONS

VDD = 5 V ± 10%, GND = 0 V
Table 1.
B Version
Parameter 25°C
ANALOG SWITCH
Analog Signal Range 0 V to VDD V On Resistance (RON) 2.5 Ω typ VS = 0 V to VDD, IS = −10 mA, see Figure 12
5 6 Ω max
On-Resistance Match Between Channels (ΔRON) 0.1 Ω typ VS = 0 V to VDD, IS = −10 mA
0.8 Ω max On-Resistance Flatness (R
1.2 Ω max LEAKAGE CURRENTS
2
Source Off Leakage IS (Off) ±0.01 ±0.05 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V, see Figure 13 Channel On Leakage ID, IS (On) ±0.01 ±0.05 nA typ VS = VD = 1 V, or VS = VD = 4.5 V, see Figure 14
DIGITAL INPUTS
Input High Voltage, V Input Low Voltage, V Input Current
I
or I
INL
0.005 μA typ VIN = V
INH
±0.1 μA max DYNAMIC CHARACTERISTICS
tON 14 ns typ RL = 300 Ω, CL = 35 pF 20 ns max VS = 3 V, see Figure 15 t
3 ns typ RL = 300 Ω, CL = 35 pF
OFF
6 ns max VS = 3 V, see Figure 15 Break-Before-Make Time Delay, tD 8 ns typ RL = 300 Ω, CL = 35 pF 1 ns min VS1 = VS2 = 3 V, see Figure 16 Off Isolation −67 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz
−87 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 17 Channel-to-Channel Crosstalk −62 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz
−82 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 18 Bandwidth –3 dB 200 MHz typ RL = 50 Ω, CL = 5 pF, see Figure 19 CS (Off) 7 pF typ f = 1 MHz
CD, CS (On) 27 pF typ f = 1 MHz POWER REQUIREMENTS VDD = 5.5 V Digital Inputs = 0 V or 5 V
IDD 0.001 μA typ
1.0 μA max
1
Temperature range is B Version, −40°C to +85°C.
2
Guaranteed by design, not subject to production test.
1
−40°C to +85°C Unit Test Conditions/Comments
) 0.75 Ω typ VS = 0 V to VDD, IS = −10 mA
FLAT (ON)
V
2.4 V min
INH
0.8 V max
INL
2
= 5.5 V
DD
INL
or V
INH
Rev. A | Page 3 of 12
ADG779
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VDD = 3 V ± 10%, GND = 0 V
Table 2.
Parameter 25°C ANALOG SWITCH
Analog Signal Range 0 V to VDD V On Resistance (RON) 6 7 Ω typ VS = 0 V to VDD, IS = –10 mA, see Figure 12 10 Ω max On-Resistance Match Between Channels (ΔRON) 0.1 Ω typ VS = 0 V to VDD, IS = –10 mA
0.8 Ω max On-Resistance Flatness (R
LEAKAGE CURRENTS
2
Source Off Leakage IS (Off) ±0.01 ±0.05 nA typ VS = 3 V/1 V, VD = 1 V/3 V, see Figure 13 Channel On Leakage ID, IS (On) ±0.01 ±0.05 nA typ VS = VD = 1 V, or VS = VD = 3 V, see Figure 14
DIGITAL INPUTS
Input High Voltage, V Input Low Voltage, V Input Current
I
or I
0.005 μA typ VIN = V
INL
INH
±0.1 μA max
DYNAMIC CHARACTERISTICS
tON 16 ns typ RL = 300 Ω, CL = 35 pF 24 ns max VS = 2 V, see Figure 15 t
4 ns typ RL = 300 Ω, CL = 35 pF
OFF
7 ns max VS = 2 V, see Figure 15 Break-Before-Make Time Delay, tD 8 ns typ RL = 300 Ω, CL = 35 pF 1 ns min VS1 = VS2 = 2 V, see Figure 16 Off Isolation –67 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz –87 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 17 Channel-to-Channel Crosstalk –62 dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz –82 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 18 Bandwidth −3 dB 200 MHz typ RL = 50 Ω, CL = 5 pF, see Figure 19 CS (Off) 7 pF typ f = 1 MHz
CD, CS (On) 27 pF typ f = 1 MHz POWER REQUIREMENTS VDD = 3.3 V Digital Inputs = 0 V or 3 V
IDD 0.001 μA typ
1.0 μA max
1
Temperature range is B Version, −40°C to +85°C.
2
Guaranteed by design, not subject to production test.
1
B Version
−40°C to +85°C Unit Test Conditions/Comments
) 2.5 Ω typ VS = 0 V to VDD, IS = –10 mA
FLAT (ON)
V
2.0 V min
INH
0.8 V max
INL
2
= 3.3 V
DD
INL
or V
INH
Rev. A | Page 4 of 12
ADG779
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ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
VDD to GND −0.3 V to +7 V Analog, Digital Inputs
Peak Current, S or D
Continuous Current, S or D 30 mA Operating Temperature Range
Industrial (B Version) −40°C to +85°C Storage Temperature Range −65°C to +150°C Junction Temperature 150°C SC70 Package, Power Dissipation 315 mW
θJA Thermal Impedance 332°C/W
θJC Thermal Impedance 120°C/W Lead Temperature, Soldering
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C Reflow Soldering (Pb-free)
Peak Temperature 260 (+0/−5)°C Time at Peak Temperature 10 sec to 40 sec
1
Overvoltages at IN, S, or D are clamped by internal diodes. Current should be
limited to the maximum ratings given.
1
−0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first
100 mA (pulsed at 1 ms,
10% duty c
ycle max)
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Table 4. Truth Table
ADG779 IN Switch S1 Switch S2
0 On Off 1 Off On

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. A | Page 5 of 12
ADG779
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

IN
1
ADG779
V
2
TOP VIEW
DD
(Not to S cale)
GND
3
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1 IN Logic Control Input. 2 V
DD
Most Positive Power Supply Potential. 3 GND Ground (0 V) Reference. 4 S1 Source Terminal. Can be an input or an output. 5 D Drain Terminal. Can be an input or an output. 6 S2 Source Terminal. Can be an input or an output.
S2
6
D
5
S1
4
02491-002
Rev. A | Page 6 of 12
ADG779
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TERMINOLOGY

V
DD
Most positive power supply potential.
I
DD
Positive supply current.
GND
Ground (0 V) reference.
S
Source terminal. Can be an input or an output.
D
Drain terminal. Can be an input or an output.
IN
Logic control input.
(VS)
V
D
Analog voltage on drain (D) and source (S) terminals.
R
ON
Ohmic resistance between the D and S.
R
FLAT (ON)
Flatness is defined as the difference between the maximum and minimum value of on resistance as measured.
ΔR
ON
On-resistance mismatch between any two channels.
I
(Off)
S
Source leakage current with the switch off.
I
(Off)
D
Drain leakage current with the switch off.
I
, IS (On)
D
Channel leakage current with the switch on.
V
INL
Maximum input voltage for Logic 0.
V
INH
Minimum input voltage for Logic 1.
(I
INL
INH
)
I
Input current of the digital input.
C
(Off)
S
Off switch source capacitance. Measured with reference to
round.
g
C
(Off)
D
Off switch drain capacitance. Measured with reference to
round.
g
, CS (On)
C
D
On switch capacitance. Measured with reference to ground.
C
IN
Digital input capacitance.
t
ON
Delay time between the 50% and 90% points of the digital input and switch on condition.
t
OFF
Delay time between the 50% and 90% points of the digital input and switch off condition.
t
BBM
On or off time measured between the 80% points of both switches when switching from one to another.
Charge Injection
A measure of the glitch impulse transferred from the digital
nput to the analog output during on/off switching.
i
Off Isolation
A measure of unwanted signal coupling through an off switch.
Crosstalk
A measure of unwanted signal that is coupled through from one ch
annel to another because of parasitic capacitance.
−3 dB Bandwidth
The frequency at which the output is attenuated by 3 dB.
On Response
The frequency response of the on switch.
Insertion Loss
The loss due to the on resistance of the switch.
THD + N
The ratio of harmonic amplitudes plus noise of a signal to the f
undamental.
Rev. A | Page 7 of 12
ADG779
m
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TYPICAL PERFORMANCE CHARACTERISTICS

6.0
5.5
5.0
4.5
4.0
3.5
(Ω)
3.0
ON
R
2.5
2.0
1.5
1.0
0.5
0
VDD=3V
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
V
OR VS– DRAIN OR SOURCE VO LTAGE (V)
D
VDD=5V
VDD=2.7V
TA=25°C
VDD=4.5V
2491-003
0.15
0.10
0.05
CURRENT (nA)
0
IS(OFF)
–0.05
0 102030405060708090
TEMPERATURE (°C)
ID,IS(ON)
VDD=5V
=4.5V/1V
V
D
V
=1V/4.5V
S
02491-006
+85°C
+25°C
–40°C
DD
D
= 3 V
(VS) Single Supplies
VDD = 3V
(VS) for
D
Figure 3. On Resistance as a Function of V
6.0
5.5
5.0
4.5
4.0
3.5
(Ω)
3.0
ON
R
2.5
2.0
1.5
1.0
0.5
0
0 0.5 1.0 1.5 2.0 2.5 3.0
OR VS – DRAIN OR SOURCE VO LTAGE (V)
V
D
+85°C
+25°C
–40°C
Figure 4. On Resistance as a Function of V
Different Temperatures V
6.0
5.5
5.0
4.5
4.0
3.5
(Ω)
3.0
ON
R
2.5
2.0
1.5
1.0
0.5
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OR VS – DRAIN OR SOURCE VOLTAGE (V)
V
D
VDD = 5V
Figure 6. Leakage Currents as a Function of Temperature
0.15
0.10
0.05
CURRENT (nA)
0
–0.05
0 102030405060708090
02491-004
IS (OFF)
TEMPERATURE ( °C)
ID, IS (ON)
VDD = 3V V
= 3V/1V
D
V
= 1V/3V
S
02491-007
Figure 7. Leakage Currents as a Function of Temperature
10
VDD = 5V
1m
100µ
10µ
(A)
SUPPLY
I
100n
10n
1n
1 10 100 1k 10k 100k 1M 10M 100M
02491-005
FREQUENCY (Hz)
2491-008
Figure 5. On Resistance as a Function of V
Different Temperatures V
DD
= 5 V
(VS) for
D
Rev. A | Page 8 of 12
Figure 8. Supply Current vs. Input Switching Frequency
ADG779
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30
VDD = 5V, 3V
–40
–50
–60
–70
–80
–90
OFF IS OLATION (dB)
–100
–110
–120
–130
10k 100k 1M 10M 100M
Figure 9. Off Isolat
30
VDD = 5V, 3V
–40
–50
–60
–70
–80
–90
CROSSTALK (d B)
–100
–110
–120
–130
10k 100k 1M 10M 100M
FREQUENCY (Hz)
ion vs. Frequency
FREQUENCY (Hz)
Figure 10. Crosstalk vs. Frequency
02491-009
02491-010
0
VDD = 5V
–2
–4
ON RESPONSE (dB)
–6
10k 100k 1M 10M 100M
FREQUENCY (Hz)
Figure 11. On Response vs. Frequency
02491-011
Rev. A | Page 9 of 12
ADG779
V
V
V
V
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TEST CIRCUITS

I
DS
(OFF)IS(OFF)
I
SD
D
A
V
D
V
S
02491-013
Figure 14. On Leakage
SD
V
S
RON=V1/I
Figure 12. On Resistance
V1
A
DS
02491-012
S
Figure 13. Off Leakage
DD
0.1µF
V
V
DD
GND
D
R
L
300
C
L
35pF
V
OUT
S
S
IN
IN
V
OUT
50% 50%
90%
t
ON
90%
t
OFF
I
(ON)
SD
D
A
V
D
02491-014
02491-015
Figure 15. Switching Times
DD
0.1µF
V
IN
V
V
S1
V
S2
S1
S2
IN
V
IN
DD
GND
D2
D
R
L2
300
C
L2
35pF
V
OUT
Figure 16. Break-Before-Make Time Delay, t
0V
V
OUT
0V
50% 50%
t
D
D
50%50%
t
D
02491-016
Rev. A | Page 10 of 12
ADG779
V
V
V
V
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0.1µF
DD
0.1µF
DD
V
DD
IN
V
IN
OFF ISOLATION = 20 log
S
D
GND
50
Figure 17. Off Isolation
NETWORK
ANALYZER
V
OUT
R
L
50
50
V
S
CHANNEL-TO -CHANNEL CROSSTALK = 20 log
Figure 18. Channel-to-Channel Crosstalk
NETWORK
ANALYZER
50
V
S
V
OUT
R
L
50
V
OUT
V
S
02491-017
IN
IN
V
DD
S
D
GND
INSERTION LOSS = 20 log
V
OUT
V
WITHOUT SWITCH
OUT
NETWORK
ANALYZER
50
R
L
50
WITH SWITCH
V
S
V
OUT
02491-019
Figure 19. Bandwidth
DD
0.1µF
V
DD
S1
S2
IN
GND
V
OUT
V
D
R 50
S
2491-018
Rev. A | Page 11 of 12
ADG779
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OUTLINE DIMENSIONS

2.20
2.00
1.80
2.40
1.35
1.25
1.15
PIN 1
1.30 BSC
1.00
0.90
0.70
0.10 MAX
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203-AB
Figure 20. 6-Lead Thin Shrink Small Outline Transistor Package [SC70]
4 5 6
2.10
3 2 1
1.80
0.65 BSC
S-6)
0.40
0.10
0.22
0.08
0.30
0.15
1.10
0.80
SEATING PLANE
(K
Dimensions shown in millimeters
0.46
0.36
0.26

ORDERING GUIDE

Package
Model Temperature Range Package Description
ADG779BKS-R2 –40°C to +85°C 6-Lead Thin Shrink Small Outline Transistor Package (SC70) KS-6 SKB ADG779BKS-REEL –40°C to +85°C 6-Lead Thin Shrink Small Outline Transistor Package (SC70) KS-6 SKB ADG779BKS-REEL7 –40°C to +85°C 6-Lead Thin Shrink Small Outline Transistor Package (SC70) KS-6 SKB ADG779BKSZ-R2 ADG779BKSZ-REEL
2
–40°C to +85°C 6-Lead Thin Shrink Small Outline Transistor Package (SC70) KS-6 S0M
2
–40°C to +85°C 6-Lead Thin Shrink Small Outline Transistor Package (SC70) KS-6 S0M
ADG779BKSZ-REEL72–40°C to +85°C 6-Lead Thin Shrink Small Outline Transistor Package (SC70) KS-6 S0M
1
Brand on these packages is limited to three characters due to space constraints.
2
Z = Pb-free part.
Op
tion Branding
1
© 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C02491–0–10/05(A)
Rev. A | Page 12 of 12
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