CMOS, Low Voltage
a
FEATURES
High Off Isolation –80 dB at 30 MHz
–3 dB Signal Bandwidth 250 MHz
+1.8 V to +5.5 V Single Supply
Low On-Resistance (15 ⍀ Typically)
Low On-Resistance Flatness
Fast Switching Times
t
Typically 8 ns
ON
t
Typically 3 ns
OFF
Typical Power Consumption < 0.01 W
TTL/CMOS Compatible
APPLICATIONS
Audio and Video Switching
RF Switching
Networking Applications
Battery Powered Systems
Communication Systems
Relay Replacement
Sample-and-Hold Systems
RF/ Video, SPDT Switch
ADG752
FUNCTIONAL BLOCK DIAGRAM
ADG752
S1
D
S2
IN
SWITCH SHOWN FOR A LOGIC "1" INPUT
GENERAL DESCRIPTION
The ADG752 is a low voltage SPDT (single pole, double throw)
switch. It is constructed using switches in a T-switch configuration, which results in excellent Off Isolation while maintaining
good frequency response in the ON condition.
High off isolation and wide signal bandwidth make this part
suitable for switching RF and video signals. Low power consumption and operating supply range of +1.8 V to +5.5 V make
it ideal for battery powered, portable instruments.
The ADG752 is designed on a submicron process that provides
low power dissipation yet gives high switching speed and low on
resistance. This part is a fully bidirectional switch and can handle
signals up to and including the supply rails. Break-before-make
switching action ensures the input signals are protected against
momentary shorting when switching between channels.
The ADG752 is available in 6-lead SOT-23 and 8-lead µSOIC
packages.
PRODUCT HIGHLIGHTS
1. High Off Isolation –80 dB at 30 MHz.
2. –3 dB Signal Bandwidth 250 MHz.
3. Low On Resistance (15 Ω).
4. Low Power Consumption, typically <0.01 µW.
5. Break-Before-Make Switching Action.
6. Tiny 6-lead SOT-23 and 8-lead µSOIC packages.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 1999
ADG752–SPECIFICATIONS
(VDD = +5 V ⴞ 10%, GND = 0 V, unless otherwise noted.)
B Version
–40ⴗC
Parameter +25ⴗC to +85ⴗC Units Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
On-Resistance (R
)15 Ω typ V
ON
DD
V
= 0 V to VDD, IDS = 10 mA;
S
18 20 Ω max Test Circuit 1
On-Resistance Match Between 0.1 Ω typ V
Channels (∆R
On-Resistance Flatness (R
) 0.6 0.6 Ω max
ON
FLAT(ON)
)2 Ω typ V
3 Ω max V
= 0 V to VDD, IDS = 10 mA
S
= 0 V to 2.5 V, IDS = 10 mA
S
= + 4.5 V
DD
LEAKAGE CURRENTS
Source OFF Leakage I
(OFF) ±0.01 nA typ V
S
= 4.5 V/1 V, VS = 1 V/4.5 V;
D
±0.25 ±3.0 nA max Test Circuit 2
Channel ON Leakage I
(ON) ±0.01 nA typ V
D
S
= VS = 1 V, or 4.5 V;
D
, I
±0.25 ±3.0 nA max Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
INL
INH
2.4 V min
0.8 V max
Input Current
I
INL
or I
INH
0.001 µA typ V
IN
= V
INL
or V
INH
±0.5 µA max
CIN, Digital Input Capacitance 2 pF typ
DYNAMIC CHARACTERISTICS
t
ON
t
OFF
Break-Before-Make Time Delay 6 ns typ R
Off Isolation –80 dB typ R
1
8 ns typ R
13 ns max V
3 ns typ R
5 ns max V
1 ns min V
= 300 Ω, C
L
= 3 V, Test Circuit 4
S
= 300 Ω, C
L
= 3 V, Test Circuit 4
S
= 300 Ω, C
L
= 3 V, Test Circuit 5
S
= 50 Ω, C
L
= 35 pF;
L
= 35 pF;
L
= 35 pF;
L
= 5 pF, f = 30 MHz;
L
Test Circuit 6
Crosstalk –80 dB typ R
= 50 Ω, C
L
= 5 pF, f = 30 MHz;
L
Test Circuit 7
–3 dB Bandwidth 250 MHz typ R
(OFF) 4 pF typ
C
S
= 50 Ω, C
L
= 5 pF, Test Circuit 8
L
CD, CS (ON) 15 pF typ
POWER REQUIREMENTS V
I
DD
0.001 µA typ Digital Inputs = 0 V or +5.5 V
= +5.5 V
DD
0.1 0.5 µA max
NOTES
1
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. 0–2–
SPECIFICATIONS
(VDD = +3 V ⴞ 10%, GND = 0 V, unless otherwise noted.)
ADG752
B Version
–40ⴗC
Parameter +25ⴗC to +85ⴗC Units Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
On-Resistance (R
)35 Ω typ V
ON
DD
V
= 0 V to VDD, IDS = 10 mA;
S
50 Ω max Test Circuit 1
On-Resistance Match Between 0.2 Ω typ V
Channels (∆R
) 2.5 2.5 Ω max
ON
LEAKAGE CURRENTS V
Source OFF Leakage I
(OFF) ±0.01 nA typ V
S
= 0 V to VDD, IDS = 10 mA
S
= +3.3 V
DD
= 3 V/1 V, VD = 1 V/3 V;
S
±0.25 ±3.0 nA max Test Circuit 2
Channel ON Leakage I
(ON) ±0.01 nA typ V
D
S
= VD = 1 V or 3 V;
S
, I
±0.25 ±3.0 nA max Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
INL
INH
2.0 V min
0.4 V max
Input Current
I
INL
or I
INH
0.001 µA typ V
IN
= V
INL
or V
INH
±0.5 µA max
CIN, Digital Input Capacitance 2 pF typ
DYNAMIC CHARACTERISTICS
t
ON
t
OFF
Break-Before-Make Time Delay 6 ns typ R
Off Isolation –80 dB typ R
1
10 ns typ R
18 ns max V
4 ns typ R
8 ns max V
1 ns min V
= 300 Ω, C
L
= 2 V, Test Circuit 4
S
= 300 Ω, C
L
= 2 V, Test Circuit 4
S
= 300 Ω, C
L
= 2 V, Test Circuit 5
S
= 50 Ω, C
L
= 35 pF;
L
= 35 pF;
L
= 35 pF;
L
= 5 pF, f = 30 MHz;
L
Test Circuit 6
Crosstalk –80 dB typ R
= 50 Ω, C
L
= 5 pF, f = 30 MHz;
L
Test Circuit 7
–3 dB Bandwidth 250 MHz typ R
(OFF) 4 pF typ
C
S
= 50 Ω, C
L
= 5 pF, Test Circuit 8
L
CD, CS (ON) 15 pF typ
POWER REQUIREMENTS V
I
DD
0.001 µA typ Digital Inputs = 0 V or +3.3 V
= +3.3 V
DD
0.1 0.5 µA max
NOTES
1
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. 0 –3–
ADG752
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
(T
= +25°C unless otherwise noted)
A
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
Analog, Digital Inputs
2
. . . . . . . . . . . . –0.3 V to VDD +0.3 V or
1
30 mA, Whichever Occurs First
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
(Pulsed at 1 ms, 10% Duty Cycle Max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . (T
Junction Temperature (T
Max) . . . . . . . . . . . . . . . . . .+150°C
J
Max–TA)/θ
J
JA
µSOIC Package
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206°C/W
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44°C/W
θ
JC
SOT-23 Package
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 229.6°C/W
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 91.99°C/W
θ
JC
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . .+215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+220°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
PIN CONFIGURATIONS
8-Lead SOIC
(RM-8)
1
NC
ADG752
2
S2
TOP VIEW
(Not to Scale)
3
GND
4
IN
NC = NO CONNECT
8
D
7
V
DD
6
S1
NC
5
6-Lead SOT-23
(RT-6)
1
D
ADG752
V
2
DD
TOP VIEW
(Not to Scale)
S1
3
6
S2
5
GND
4
IN
Table I. Truth Table
ADG752 IN Switch S1 Switch S2
0 ON OFF
1 OFF ON
TERMINOLOGY
V
DD
Most positive power supply potential.
GND Ground (0 V) reference.
S Source terminal. May be an input or output.
D Drain terminal. May be an input or output.
IN Logic control input.
R
ON
∆R
ON
R
FLAT(ON)
Ohmic resistance between D and S.
On resistance match between channels, i.e.,
max–RONmin.
R
ON
Flatness is defined as the difference between
the maximum and minimum value of on resis-
tance as measured over the specified analog
signal range.
I
(OFF) Source leakage current with the switch “OFF.”
S
I
, IS (ON) Channel leakage current with the switch “ON.”
D
V
) Analog voltage on terminals D and S.
D (VS
C
(OFF) “OFF” switch source capacitance.
S
C
, CS (ON) “ON” switch capacitance.
D
t
ON
Delay between applying the digital control
input and the output switching on. See Test
Circuit 4.
t
OFF
Delay between applying the digital control
input and the output switching off.
t
D
“OFF” time or “ON” time measured between
the 90% points of both switches, when switch-
ing from one address state to another.
Off Isolation A measure of unwanted signal coupling
through an “OFF” switch.
Crosstalk A measure of unwanted signal that is coupled
through from one channel to another as a
result of parasitic capacitance.
Bandwidth The frequency at which the output is attenu-
ated by –3 dBs.
On Response The frequency response of the “ON” switch.
Insertion Loss Loss due to the ON resistance of the switch.
V
INL
V
INH
I
INL(IINH
I
DD
) Input current of the digital input.
Maximum input voltage for Logic “0.”
Minimum input voltage for Logic “1.”
Positive supply current.
ORDERING GUIDE
Model Temperature Range Brand* Package Descriptions Package Options
ADG752BRM –40°C to +85°C SEB µSOIC RM-8
ADG752BRT –40°C to +85°C SEB SOT-23 RT-6
*Brand on these packages is limited to three characters due to space constraints.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG752 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
–4–
REV. 0
Typical Performance Characteristics–
ADG752
40
TA = +258C
35
VDD = +2.7V
30
25
– V
ON
R
20
15
10
5
01
VD OR VS DRAIN SOURCE VOLTAGE – Volts
VDD = +3.3V
VDD = +4.5V
VDD = +5.5V
23 4 5
5.5
Figure 1. On Resistance as a Function of VD (VS) Single
Supplies
40
35
30
25
– V
20
ON
R
15
10
+858C
+258C
–408C
VDD = +3V
10m
TA = +258C
1m
10m
– Amps
DD
1m
I
100n
10n
100
1k 10k
FREQUENCY – Hz
+5V
+3V
100k 100M 10M
Figure 4. Supply Current vs. Input Switching Frequency
–40
TA = +25°C
–60
–80
OFF ISOLATION – dB
–100
5
0
0 0.5
1.0 1.5 2.0 2.5
VD OR VS DRAIN SOURCE VOLTAGE – Volts
3.0
Figure 2. On Resistance as a Function of VD (VS) for
Different Temperatures V
40
35
30
25
– V
20
ON
R
15
10
5
0
01
VD OR VS DRAIN SOURCE VOLTAGE – Volts
= 3 V
DD
+858C
+258C
–408C
23
VDD = +5V
4
Figure 3. On Resistance as a Function of VD (VS) for
Different Temperatures V
DD
= 5 V
–120
0.1 100
FREQUENCY – MHz
101
Figure 5. Off Isolation vs. Frequency
0
–20
–40
–60
–80
CROSSTALK – dB
–100
–120
5
–140
0.1 1 10 100
FREQUENCY – MHz
TA = +258C
Figure 6. Crosstalk vs. Frequency
REV. 0
–5–
ADG752
D
IN
S
SERIES
SHUNT
0
–2
TA = +258C
–4
ATTENUATION – dB
–6
–8
101
FREQUENCY – MHz
100
Figure 7. On Response vs. Frequency
GENERAL DESCRIPTION
The ADG752 is an SPDT switch constructed using switches in
a T configuration to obtain high “OFF” isolation while maintaining good frequency response in the “ON” condition.
Figure 8 shows the T-switch configuration. While the switch is
in the OFF state, the shunt switch is closed and the two series
switches are open. The closed shunt switch provides a signal
path to ground for any of the unwanted signals that find their
way through the off capacitances of the series’ MOS devices.
This results in more improved isolation between the input and
output than with an ordinary series switch. When the switch is
in the ON condition, the shunt switch is open and the signal
path is through the two series switches which are now closed.
Figure 8. Basic T-Switch Configuration
LAYOUT CONSIDERATIONS
Where accurate high frequency operation is important, careful
consideration should be given to the printed circuit board layout
and to grounding. Wire wrap boards, prototype boards and
sockets are not recommended because of their high parasitic
inductance and capacitance. The part should be soldered directly to a printed circuit board. A ground plane should cover all
unused areas of the component side of the board to provide a
low impedance path to ground. Removing the ground planes
from the area around the part reduces stray capacitance.
Good decoupling is important in achieving optimum performance. V
should be decoupled with a 0.1 µF surface mount
DD
capacitor to ground mounted as close as possible to the device
itself.
V
DD
CH1
75V
CH2
75V
IN
S1
S2
D
ADG752
250V
A = 2
250V
75V
V
OUT
75V
Figure 9. Multiplexing Between Two Video Signals
–6–
REV. 0
SD
A
V
D
ID (ON)
NC
NC = NO CONNECT
Test Circuits
CHANNEL-TO-CHANNEL
CROSSTALK = 20 LOG
GND
V
DD
0.1mF
V
DD
S1
D
S2
V
S
V
OUT
NETWORK
ANALYZER
R
L
50V
IN
V
OUT
V
S
50V
V
S
V1
SD
RON = V1/I
DS
ADG752
IS (OFF)
V
I
DS
S
A
SD
V
D
Test Circuit 1. On Resistance
0.1mF
S1
S2
IN
0.1mF
S1
S2
IN
0.1mF
V
S
V
S
V
IN
V
DD
V
DD
V
GND
GND
DD
D
R
L
300V
V
DD
V
DD
Test Circuit 4. Switching Times
D
D2
R
L
300V
C
L
35pF
C
35pF
V
OUT
V
OUT
L
IN
V
OUT
GND
V
IN
0V
V
OUT
50%
0V
Test Circuit 5. Break-Before-Make Time Delay, t
Test Circuit 2. Off Leakage
50% 50%V
V
t
ON
50%
t
Test Circuit 3. On Leakage
S
90%
50%
D
D
t
50%
OFF
t
90%
D
REV. 0
IN
V
IN
V
DD
S
D
GND
50V
OFF ISOLATION = 20 LOG
Test Circuit 6. Off Isolation
V
IN
R
50V
IN
NETWORK
ANALYZER
50V
V
S
V
OUT
L
V
OUT
V
S
V
DD
0.1mF
V
DD
S
D
GND
INSERTION LOSS = 20 LOG
Test Circuit 8. Bandwidth
–7–
Test Circuit 7. Channel-to-Channel Crosstalk
NETWORK
ANALYZER
50V
V
S
V
OUT
R
L
50V
V
WITH SWITCH
OUT
V
WITHOUT SWITCH
OUT
ADG752
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead SOIC
(RM-8)
0.122 (3.10)
0.114 (2.90)
0.006 (0.15)
0.002 (0.05)
0.071 (1.80)
0.059 (1.50)
0.051 (1.30)
0.035 (0.90)
0.122 (3.10)
0.114 (2.90)
PIN 1
SEATING
PLANE
PIN 1
0.006 (0.15)
0.000 (0.00)
85
1
4
0.0256 (0.65) BSC
0.120 (3.05)
0.112 (2.84)
0.018 (0.46)
0.008 (0.20)
6-Lead SOT-23
0.122 (3.10)
0.106 (2.70)
4 5 6
1
2
3
0.075 (1.90)
BSC
0.020 (0.50)
0.010 (0.25)
0.199 (5.05)
0.187 (4.75)
0.043 (1.09)
0.037 (0.94)
0.011 (0.28)
0.003 (0.08)
(RT-6)
0.118 (3.00)
0.098 (2.50)
0.037 (0.95) BSC
0.057 (1.45)
0.035 (0.90)
SEATING
PLANE
0.120 (3.05)
0.112 (2.84)
338
278
0.009 (0.23)
0.003 (0.08)
0.028 (0.71)
0.016 (0.41)
108
08
C3568–8–4/99
0.022 (0.55)
0.014 (0.35)
–8–
PRINTED IN U.S.A.
REV. 0
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