Analog Devices ADG726 732 Datasheet

16-/32-Channel, 4
ADG732
EN
S1
S32
WR
CS
A4A3A2A1A0
D
1-OF-32
DECODER
S1A
S16A
DA
ADG726
EN
WR
A3A2A1A0
S1B
S16B
DB
1-OF-16
DECODER
CSA CSB
a

FEATURES

1.8 V to 5.5 V Single Supply 2.5 V Dual-Supply Operation 4 On Resistance
0.5 On Resistance Flatness 48-Lead TQFP or 48-Lead 7 mm 7 mm CSP Packages Rail-to-Rail Operation 30 ns Switching Times Single 32-to-1 Channel Multiplexer Dual/Differential 16-to-1 Channel Multiplexer TTL/CMOS Compatible Inputs For Functionally Equivalent Devices with Serial Interface
See ADG725/ADG731
APPLICATIONS Optical Applications Data Acquisition Systems Communication Systems Relay Replacement Audio and Video Switching Battery-Powered Systems Medical Instrumentation Automatic Test Equipment
+1.8 V to +5.5 V, 2.5 V Analog Multiplexers
ADG726/ADG732
FUNCTIONAL BLOCK DIAGRAMS

GENERAL DESCRIPTION

The ADG726/ADG732 are monolithic CMOS 32-channel/dual 16-channel analog multiplexers. The ADG732 switches one of 32 inputs (S1-S32) to a common output, D, as determined by the 5-bit binary address lines A0, A1, A2, A3, and A4. The ADG726 switches one of 16 inputs as determined by the 4-bit binary address lines A0, A1, A2, and A3.
On-chip latches facilitate microprocessor interfacing. The ADG726 device may also be configured for differential opera­tion by tying CSA and CSB together. An EN input is used to enable or disable the devices. When disabled, all channels are switched OFF.
These multiplexers are designed on an enhanced submicron process that provides low power dissipation yet gives high switching speed, very low on resistance, and leakage currents. They operate from a single supply of +1.8 V to +5.5 V and a ±2.5 V dual supply, making them ideally suited to a variety of applications. On resistance is in the region of a few ohms and is closely matched between switches and very flat over the full signal range. These parts can operate equally well as either multiplexers or demultiplexers and have an input signal range that extends to the supplies. In the OFF condition, signal levels up to the supplies are blocked. All channels exhibit break-before-make switching action, preventing momentary shorting when switching channels.
They are available in either 48-lead CSP or TQFP packages.
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

PRODUCT HIGHLIGHTS

1. +1.8 V to +5.5 V single- or ±2.5 V dual-supply operation. These parts are specified and guaranteed with +5 V ± 10%, +3 V ± 10% single-supply, and ±2.5 V ± 10% dual­supply rails.
2. On resistance of 4
3. Guaranteed break-before-make switching action
4. 7 mm × 7 mm 48-lead chip scale package (CSP) or 48-lead TQFP package
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002
ADG726/ADG732–SPECIFICATIONS
B Version
Parameter +25C to +85CUnit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V On Resistance (RON)4 Ω typ VS = 0 V to VDD, IDS = 10 mA;
5.5 6 Ω max Test Circuit 1 On Resistance Match Between 0.3 Ω typ VS = 0 V to VDD, IDS = 10 mA Channels (∆RON) 0.8 max On Resistance Flatness (R
) 0.5 typ VS = 0 V to VDD, IDS = 10 mA
FLAT(ON)
LEAKAGE CURRENTS V
Source OFF Leakage I
(OFF) ± 0.01 nA typ VD = 4.5 V/1 V, VS = 1 V/4.5 V;
S
± 0.25 ± 1 nA max Test Circuit 2
Drain OFF Leakage I
(OFF) ± 0.05 nA typ VD = 4.5 V/1 V, VS = 1 V/4.5 V;
D
ADG726 ± 0.5 ± 2.5 nA max Test Circuit 3 ADG732 ± 1 ± 5 nA max
Channel ON Leakage ID, IS (ON) ± 0.05 nA typ VD = VS = 1 V, or 4.5 V;
ADG726 ± 0.5 ± 2.5 nA max Test Circuit 4 ADG732 ± 1 ± 5 nA max
DIGITAL INPUTS
Input High Voltage, V Input Low Voltage, V
INH
INL
Input Current
I
INL
or I
INH
0.005 µA typ VIN = V
CIN, Digital Input Capacitance 5 pF typ
DYNAMIC CHARACTERISTICS
t
TRANSITION
2
23 ns typ RL = 300 , CL = 35 pF, Test Circuit 5 34 40 ns max VS1 = 3 V/0 V, V
Break-Before-Make Time Delay, t
D
18 ns typ RL = 300 , CL = 35 pF; 1 ns min VS = 3 V; Test Circuit 6
tON(CS, WR)18ns typ VS = 3 V; Test Circuit 7
25 32 ns max RL = 300 , CL = 35 pF;
t
(CS, WR)17ns typ VS = 3 V; Test Circuit 7
OFF
23 29 ns max RL = 300 , CL = 35 pF;
tON(EN)24ns typ RL = 300 , CL = 35 pF;
32 40 ns max VS = 3 V; Test Circuit 8
t
(EN)16ns typ RL = 300 , CL = 35 pF;
OFF
22 25 ns max VS = 3 V; Test Circuit 8
Charge Injection 5 pC typ VS = 2.5 V, RS = 0 , CL = 1 nF;
OFF Isolation –72 dB typ RL = 50 , CL = 5 pF, f = 1 MHz;
Channel-to-Channel Crosstalk –72 dB typ RL = 50 , CL = 5 pF, f = 1 MHz;
–3 dB Bandwidth RL = 50 , CL = 5 pF; Test Circuit 12
ADG726 34 MHz typ
ADG732 18 MHz typ CS (OFF) 13 pF typ f = 1 MHz CD (OFF)
ADG726 170 pF typ f = 1 MHz
ADG732 340 pF typ f = 1 MHz CD, CS (ON)
ADG726 175 pF typ f = 1 MHz
ADG732 350 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 5.5 V
I
DD
NOTES
1
Temperature range is as follows: B Version: –40°C to +85°C.
2
Guaranteed by design; not subject to production test.
Specifications subject to change without notice.
10 µA typ Digital Inputs = 0 V or 5.5 V
–40C
1Ω max
2.4 V min
0.8 V max
± 0.5 µA max
20 µA max
(VDD = 5 V  10%, V
V
DD
= 0 V, GND = 0 V, unless otherwise noted.)
SS
= 5.5 V
DD
or V
INL
INH
= 0 V/3 V
S32
Test Circuit 9
Test Circuit 10
Test Circuit 11
1
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ADG726/ADG732
SPECIFICATIONS
Parameter +25C to +85CUnit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V On Resistance (RON)7 Ω typ VS = 0 V to VDD, IDS = 10 mA;
On Resistance Match Between 0.35 Ω typ VS = 0 V to VDD, IDS = 10 mA Channels (∆RON)1Ω max On Resistance Flatness (R
LEAKAGE CURRENTS VDD = 3.3 V
Source OFF Leakage I
Drain OFF Leakage I
ADG726 ± 0.5 ± 2.5 nA max Test Circuit 3 ADG732 ± 1 ± 5 nA max
Channel ON Leakage I
ADG726 ± 0.5 ± 2.5 nA max Test Circuit 4 ADG732 ± 1 ± 5 nA max
DIGITAL INPUTS
Input High Voltage, V Input Low Voltage, V Input Current
I
or I
INL
INH
CIN, Digital Input Capacitance 5 pF typ
DYNAMIC CHARACTERISTICS
t
TRANSITION
Break-Before-Make Time Delay, t
tON(WR, CS)29ns typ VS = 2 V; Test Circuit 7
t
(WR, CS)26ns typ VS = 2 V; Test Circuit 7
OFF
tON(EN, WR)33ns typ RL = 300 , CL = 35 pF;
t
(EN)19ns typ RL = 300 , CL = 35 pF;
OFF
Charge Injection 1 pC typ VS = 1.5 V, RS = 0 , CL = 1 nF;
Off Isolation –72 dB typ RL = 50 , CL = 5 pF, f = 1 MHz;
Channel-to-Channel Crosstalk –72 dB typ RL = 50 , CL = 5 pF, f = 1 MHz;
–3 dB Bandwidth RL = 50 , CL = 5 pF; Test Circuit 12
ADG726 34 MHz typ
ADG732 18 MHz typ CS (OFF) 13 pF typ f = 1 MHz CD (OFF)
ADG726 170 pF typ f = 1 MHz
ADG732 340 pF typ f = 1 MHz CD, CS (ON)
ADG726 175 pF typ f = 1 MHz
ADG732 350 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 3.3 V I
DD
NOTES
1
Temperature ranges are as follows: B Version: –40°C to +85°C.
2
Guaranteed by design; not subject to production test.
Specifications subject to change without notice.
FLAT(ON)
(OFF) ± 0.01 nA typ VS = 3 V/1 V, VD = 1 V/3 V;
S
(OFF) ± 0.05 nA max VS = 1 V/3 V, VD = 3 V/1 V;
D
, IS (ON) ± 0.05 nA typ VS = VD = 1 V or 3 V;
D
INH
INL
(VDD = 3 V  10%, V
= 0 V, GND = 0 V, unless otherwise noted.)
SS
B Version
–40C
V
DD
11 12 Ω max Test Circuit 1
)3Ω typ VS = 0 V to VDD, IDS = 10 mA
± 0.25 ± 1 nA max Test Circuit 2
2.0 V min
0.7 V max
0.005 µA typ VIN = V
INL
or V
INH
± 0.5 µA max
2
34 ns typ RL = 300 , CL = 35 pF; Test Circuit 5 52 62 ns max VS1 = 2 V/0 V, V
D
26 ns typ RL = 300 , CL = 35 pF;
= 0 V/2 V
S32
1 ns min VS = 2 V; Test Circuit 6
43 52 ns max RL = 300 , CL = 35 pF;
38 42 ns max RL = 300 , CL = 35 pF;
48 55 ns max VS = 3 V; Test Circuit 8
25 28 ns max VS = 2 V; Test Circuit 8
Test Circuit 9
Test Circuit 10
Test Circuit 11
5 µA typ Digital Inputs = 0 V or 3.3 V
10 µA max
1
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–3–
ADG726/ADG732 SPECIFICATIONS
1
DUAL SUPPLY
(VDD = +2.5 V 10%, V
= –2.5 V 10%, GND = 0 V, unless otherwise noted.)
SS
B Version
–40ⴗC
Parameter +25ⴗC to +85ⴗC Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range V On Resistance (R
)4 typ VS = VSS to VDD, IDS = 10 mA;
ON
SS
to V
DD
V
5.5 6 max Test Circuit 1
On Resistance Match Between 0.3 typ V
= VSS to VDD, IDS = 10 mA
S
Channels (∆RON) 0.8 max On Resistance Flatness (R
) 0.5 typ VS = VSS to VDD, IDS = 10 mA
FLAT(ON)
1 max
LEAKAGE CURRENTS VDD = +2.75 V, VSS = –2.75 V
Source OFF Leakage IS (OFF) ±0.01 nA typ VS = +2.25 V/–1.25 V, VD = –1.25 V/+2.25 V;
± 0.25 ± 0.5 nA max Test Circuit 2
Drain OFF Leakage ID (OFF) ±0.05 nA max VS = +2.25 V/–1.25 V, VD = –1.25 V/+2.25 V;
ADG726 ± 0.5 ±2.5 nA max Test Circuit 3 ADG732 ± 1 ± 5 nA max
Channel ON Leakage ID, IS (ON) ±0.05 nA typ VS = VD = +2.25 V/–1.25 V;
ADG726 ± 0.5 ±2.5 nA max Test Circuit 4 ADG732 ± 1 ± 5 nA max
DIGITAL INPUTS
Input High Voltage, V Input Low Voltage, V
INH
INL
1.7 V min
0.7 V max
Input Current
I
INL
or I
INH
0.005 µA typ VIN = V
INL
or V
INH
± 0.5 µA max
CIN, Digital Input Capacitance 5 pF typ
DYNAMIC CHARACTERISTICS
t
TRANSITION
Break-Before-Make Time Delay, t
2
33 ns typ RL = 300 , CL = 35 pF; Test Circuit 5 45 51 ns max VS1 = 1.5 V/0 V, V
D
15 ns typ RL = 300 , CL = 35 pF;
= 0 V/1.5 V
S32
1 ns min VS = 1.5 V; Test Circuit 6
tON(CS, WR) 21 ns typ VS = 1.5 V; Test Circuit 7
30 37 ns max RL = 300 , CL = 35 pF;
t
(CS, WR) 20 ns typ VS = 1.5 V; Test Circuit 7
OFF
29 35 ns max RL = 300 , CL = 35 pF;
tON(EN, WR) 26 ns typ RL = 300 , CL = 35 pF;
37 ns max VS = 1.5 V; Test Circuit 8
t
(EN) 18 ns typ RL = 300 , CL = 35 pF;
OFF
26 29 ns max VS = 1.5 V; Test Circuit 8
Charge Injection 1 pC typ VS = 0 V, RS = 0 , CL = 1 nF;
Test Circuit 9
OFF Isolation –72 dB typ RL = 50 , CL = 5 pF, f = 1 MHz;
Test Circuit 10
Channel-to-Channel Crosstalk –72 dB typ RL = 50 , CL = 5 pF, f = 1 MHz;
Test Circuit 11
–3 dB Bandwidth RL = 50 , CL = 5 pF; Test Circuit 12
ADG726 34 MHz typ
ADG732 18 MHz typ CS (OFF) 13 pF typ CD (OFF)
ADG726 137 pF typ f = 1 MHz
ADG732 275 pF typ f = 1 MHz CD, CS (ON)
ADG726 150 pF typ f = 1 MHz
ADG732 300 pF typ f = 1 MHz
POWER REQUIREMENTS
I
DD
10 µA typ VDD = +2.75 V
20 µA max Digital Inputs = 0 V or +2.75 V
I
SS
10 µA typ VSS = –2.75 V
20 µA max Digital Inputs = 0 V or +2.75 V
NOTES
1
Temperature range is as follows: B Version: –40°C to +85°C.
2
Guaranteed by design; not subject to production test.
Specifications subject to change without notice.
–4–
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