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ADG711
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ANALOG DEVICES ADG711 Service Manual

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CMOS
IN1
IN2
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
ADG711
SWITCHES SHOWN FOR A LOGIC "1" INPUT
IN1
IN2
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
ADG712
IN1
IN2
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
ADG713
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a

FEATURES

1.8 V to 5.5 V Single Supply Low On Resistance (2.5 ⍀ Typ) Low On Resistance Flatness –3 dB Bandwidth > 200 MHz Rail-to-Rail Operation 16-Lead TSSOP and SOIC Packages Fast Switching Times
16 ns
t
ON
t
10 ns
OFF
Typical Power Consumption (< 0.01 ␮W) TTL/CMOS Compatible
APPLICATIONS USB 1.1 Signal Switching Circuits Cell Phones PDAs Battery-Powered Systems Communication Systems Sample Hold Systems Audio Signal Routing Video Switching Mechanical Reed Relay Replacement
Low Voltage 4 ⍀ Quad SPST Switches
ADG711/ADG712/ADG713

FUNCTIONAL BLOCK DIAGRAMS

GENERAL DESCRIPTION

The ADG711, ADG712, and ADG713 are monolithic CMOS devices containing four independently selectable switches. These switches are designed on an advanced submicron process that provides low power dissipation yet gives high switching speed, low on resistance, low leakage currents, and high bandwidth.
They are designed to operate from a single 1.8 V to 5.5 V supply, making them ideal for use in battery-powered instruments and with the new generation of DACs and ADCs from Analog Devices. Fast switching times and high bandwidth make the parts suitable for switching USB 1.1 data signals and video signals.
The ADG711, ADG712, and ADG713 contain four independent single-pole/single-throw (SPST) switches. The ADG711 and ADG712 differ only in that the digital control logic is inverted. The ADG711 switches are turned on with a logic low on the appropriate control input, while a logic high is required to turn on the switches of the ADG712. The ADG713 contains two switches whose digital control logic is similar to the ADG711, while the logic is inverted on the other two switches.
Each switch conducts equally well in both directions when ON. The ADG713 exhibits break-before-make switching action.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
The ADG711/ADG712/ADG713 are available in 16-lead TSSOP and 16-lead SOIC packages.

PRODUCT HIGHLIGHTS

1. 1.8 V to 5.5 V Single-Supply Operation. The ADG711, ADG712, and ADG713 offer high perfor­mance and are fully specified and guaranteed with 3 V and 5 V supply rails.
2. Very Low R supply voltage of 1.8 V, R
(4.5 W max at 5 V, 8 W max at 3 V). At
ON
is typically 35 W over the
ON
temperature range.
3. Low On Resistance Flatness.
4. –3 dB Bandwidth >200 MHz.
5. Low Power Dissipation. CMOS construction ensures low power dissipation.
6. Fast t
ON/tOFF.
7. Break-Before-Make Switching. This prevents channel shorting when the switches are con­figured as a multiplexer (ADG713 only).
8. 16-Lead TSSOP and 16-Lead SOIC Packages.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2004 Analog Devices, Inc. All rights reserved.
(VDD = +5 V 10%, GND = 0 V. All specifications
www.BDTIC.com/ADI
1
ADG711/ADG712/ADG713–SPECIFICATIONS
–40C to +85C unless otherwise noted.)
B Version
–40C to
Parameter +25C +85C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range 0 V to V
On Resistance (R
) 2.5 Ω typ VS = 0 V to VDD, IS = –10 mA;
ON
DD
V
4 4.5 Ω max Test Circuit 1
On Resistance Match Between 0.05 Ω typ V
Channels (∆R
On Resistance Flatness (R
) 0.3 Ω max
ON
FLAT(ON)
) 0.5 Ω typ VS = 0 V to VDD, IS = –10 mA
= 0 V to VDD, IS = –10 mA
S
1.0 Ω max
LEAKAGE CURRENTS V
Source OFF Leakage I
(OFF) ± 0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V;
S
= +5.5 V;
DD
± 0.1 ± 0.2 nA max Test Circuit 2
Drain OFF Leakage I
(OFF) ± 0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V;
D
± 0.1 ± 0.2 nA max Test Circuit 2
Channel ON Leakage I
, IS (ON) ± 0.01 nA typ VS = VD = 1 V, or 4.5 V;
D
± 0.1 ± 0.2 nA max Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V Input Low Voltage, V
INL
INH
2.4 V min
0.8 V max
Input Current
I
INL
or I
INH
0.005 µA typ VIN = V
INL
or V
INH
± 0.1 µA max
DYNAMIC CHARACTERISTICS
t
ON
t
OFF
Break-Before-Make Time Delay, t
(ADG713 Only) 1 ns min V
Charge Injection 3 pC typ V
2
11 ns typ RL = 300 Ω, CL = 35 pF,
16 ns max V
= 3 V; Test Circuit 4
S
6 ns typ RL = 300 Ω, CL = 35 pF,
10 ns max V
D
6 ns typ RL = 300 Ω, CL = 35 pF,
= 3 V; Test Circuit 4
S
= VS2 = 3 V; Test Circuit 5
S1
= 2 V; RS = 0 Ω, CL = 1 nF;
S
Test Circuit 6
Off Isolation –58 dB typ R
–78 dB typ R
= 50 Ω, CL = 5 pF, f = 10 MHz
L
= 50 Ω, CL = 5 pF, f = 1 MHz;
L
Test Circuit 7
Channel-to-Channel Crosstalk –90 dB typ R
= 50 Ω, CL = 5 pF, f = 10 MHz;
L
Test Circuit 8
Bandwidth –3 dB 200 MHz typ R
(OFF) 10 pF typ
C
S
C
(OFF) 10 pF typ
D
= 50 Ω, CL = 5 pF; Test Circuit 9
L
CD, CS (ON) 22 pF typ
POWER REQUIREMENTS V
I
DD
0.001 µA typ Digital Inputs = 0 V or 5 V
= +5.5 V
DD
1.0 µA max
NOTES
1
Temperature range: B Version: –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2–
REV. A
ADG711/ADG712/ADG713
www.BDTIC.com/ADI
1
SPECIFICATIONS
Parameter +25C +85C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range 0 V to V
On Resistance (R
On Resistance Match Between 0.1 Ω typ V
Channels (∆R
On Resistance Flatness (R
LEAKAGE CURRENTS V
Source OFF Leakage I
Drain OFF Leakage I
Channel ON Leakage I
DIGITAL INPUTS
Input High Voltage, V Input Low Voltage, V Input Current
or I
I
INL
INH
DYNAMIC CHARACTERISTICS
t
ON
t
OFF
Break-Before-Make Time Delay, t
(ADG713 Only) 1 ns min V
Charge Injection 3 pC typ V
Off Isolation –58 dB typ R
Channel-to-Channel Crosstalk –90 dB typ R
Bandwidth –3 dB 200 MHz typ R
(OFF) 10 pF typ
C
S
(OFF) 10 pF typ
C
D
CD, CS (ON) 22 pF typ
POWER REQUIREMENTS V
I
DD
NOTES
1
Temperature range: B Version: –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
)55.5 Ω typ VS = 0 V to VDD, IS = –10 mA;
ON
) 0.3 Ω max
ON
(OFF) ± 0.01 nA typ VS = 3 V/1 V, VD = 1 V/3 V;
S
(OFF) ± 0.01 nA typ VS = 3 V/1 V, VD = 1 V/3 V;
D
, IS (ON) ± 0.01 nA typ VS = VD = 1 V, or 3 V;
D
INH
INL
(VDD = +3 V 10%, GND = 0 V. All specifications –40C to +85C unless otherwise noted.)
B Version
–40C to
V
DD
8 Ω max Test Circuit 1
= 0 V to VDD, IS = –10 mA
S
FLAT(ON)
) 2.5 Ω typ VS = 0 V to VDD, IS = –10 mA
= +3.3 V;
DD
± 0.1 ± 0.2 nA max Test Circuit 2
± 0.1 ± 0.2 nA max Test Circuit 2
± 0.1 ± 0.2 nA max Test Circuit 3
2.0 V min
0.4 V max
0.005 µA typ VIN = V
INL
± 0.1 µA max
2
13 ns typ RL = 300 Ω, CL = 35 pF,
20 ns max V
= 2 V; Test Circuit 4
S
7 ns typ RL = 300 Ω, CL = 35 pF,
12 ns max V
D
7 ns typ RL = 300 Ω, CL = 35 pF,
= 2 V; Test Circuit 4
S
= VS2 = 2 V; Test Circuit 5
S1
= 1.5 V; RS = 0 Ω, CL = 1 nF;
S
Test Circuit 6
= 50 Ω, CL = 5 pF, f = 10 MHz
L
–78 dB typ R
= 50 Ω, CL = 5 pF, f = 1 MHz;
L
Test Circuit 7
= 50 Ω, CL = 5 pF, f = 10 MHz;
L
Test Circuit 8
= 50 Ω, CL = 5 pF; Test Circuit 9
L
= +3.3 V
DD
0.001 µA typ Digital Inputs = 0 V or 3 V
1.0 µA max
or V
INH
REV. A
–3–
ADG711/ADG712/ADG713
www.BDTIC.com/ADI

ABSOLUTE MAXIMUM RATINGS

(TA = +25°C unless otherwise noted)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +6 V
Analog, Digital Inputs
2
. . . . . . . . . . . –0.3 V to VDD +0.3 V or
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
TSSOP Package, Power Dissipation . . . . . . . . . . . . . 430 mW
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 150°C/W
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 27°C/W
θ
JC
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG711/ADG712/ADG713 feature proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
1
30 mA, Whichever Occurs First

ORDERING GUIDE

SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 520 mW
θ
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 125°C/W
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 42°C/W
θ
JC
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time.
2
Overvoltages at IN, S, or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
WARNING!
ESD SENSITIVE DEVICE
Model Temperature Range Package Description Package Option
ADG711BR –40°C to +85°C Standard Small Outline (SOIC) R-16 ADG711BR-REEL –40°C to +85°C Standard Small Outline (SOIC) R-16 ADG711BR-REEL7 –40°C to +85°C Standard Small Outline (SOIC) R-16 ADG711BRU –40°C to +85°CThin Shrink Small Outline (TSSOP) RU-16 ADG711BRU-REEL –40°C to +85°CThin Shrink Small Outline (TSSOP) RU-16 ADG711BRU-REEL7 –40°C to +85°CThin Shrink Small Outline (TSSOP) RU-16 ADG712BR –40°C to +85°C Standard Small Outline (SOIC) R-16 ADG712BR-REEL –40°C to +85°C Standard Small Outline (SOIC) R-16 ADG712BR-REEL7 –40°C to +85°C Standard Small Outline (SOIC) R-16 ADG712BRU –40°C to +85°CThin Shrink Small Outline (TSSOP) RU-16 ADG712BRU-REEL –40°C to +85°CThin Shrink Small Outline (TSSOP) RU-16 ADG712BRU-REEL7 –40°C to +85°CThin Shrink Small Outline (TSSOP) RU-16 ADG712BRUZ* –40°C to +85°CThin Shrink Small Outline (TSSOP) RU-16 ADG712BRUZ-REEL* –40°C to +85°CThin Shrink Small Outline (TSSOP) RU-16 ADG712BRUZ-REEL7* –40°C to +85°CThin Shrink Small Outline (TSSOP) RU-16 ADG713BR –40°C to +85°C Standard Small Outline (SOIC) R-16 ADG713BR-REEL –40°C to +85°C Standard Small Outline (SOIC) R-16 ADG713BR-REEL7 –40°C to +85°C Standard Small Outline (SOIC) R-16 ADG713BRU –40°C to +85°CThin Shrink Small Outline (TSSOP) RU-16 ADG713BRU-REEL –40°C to +85°CThin Shrink Small Outline (TSSOP) RU-16 ADG713BRU-REEL7 –40°C to +85°CThin Shrink Small Outline (TSSOP) RU-16
*Z = Pb-free part.
–4–
REV. A
ADG711/ADG712/ADG713
www.BDTIC.com/ADI
Table I. Truth Table (ADG711/ADG712)
ADG711 In ADG712 In Switch Condition
01ON 10OFF
Table II. Truth Table (ADG713)
Logic Switch 1, 4 Switch 2, 3
0 OFF ON 1ONOFF

TERMINOLOGY

V
DD
Most positive power supply potential.
GND Ground (0 V) reference. S Source terminal. May be an input or output. DDrain terminal. May be an input or output. IN Logic control input. R
ON
∆R
ON
R
FLAT(ON)
Ohmic resistance between D and S. On resistance match between any two chan-
nels, i.e., R
max–RONmin.
ON
Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range.
I
(OFF) Source leakage current with the switch “OFF.”
S
I
(OFF) Drain leakage current with the switch “OFF.”
D
I
, IS (ON) Channel leakage current with the switch “ON.”
D
V
)Analog voltage on terminals D, S.
D (VS
C
(OFF) “OFF” switch source capacitance.
S
C
(OFF) “OFF” switch drain capacitance.
D
C
, CS (ON) “ON” switch capacitance.
D
t
ON
Delay between applying the digital control input and the output switching on.

PIN CONFIGURATION

(TSSOP/SOIC)
16
IN2
15
D2
14
S2
13
V
DD
12
NC
11
S3
10
D3
9
IN3
t
OFF
1
IN1
2
D1
3
S1
ADG711
4
NC
ADG712 ADG713
5
GND
TOP VIEW
6
S4
(Not to Scale)
7
D4
8
IN4
NC = NO CONNECT
Delay between applying the digital control input and the output switching off.
t
D
“OFF” time or “ON” time measured between the 90% points of both switches, when switching from one address state to another. (ADG713 only).
Crosstalk A measure of unwanted signal that is coupled
through from one channel to another as a result of parasitic capacitance.
Off Isolation A measure of unwanted signal coupling
through an “OFF” switch.
Charge A measure of the glitch impulse transferred Injection from the digital input to the analog output
during switching.
Bandwidth The frequency at which the output is attenu-
ated by 3 dB. On Response The frequency response of the “ON” switch. On Loss The voltage drop across the “ON” switch,
seen on the on response vs. frequency plot as
how many dBs the signal is away from
0 dB at very low frequencies.
REV. A
–5–
ADG711/ADG712/ADG713
www.BDTIC.com/ADI
–Typical Performance Characteristics
6.0
TA = 25C
VDD = 4.5V
5.0
()
R
ON
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0 0.5
VDD = 2.7V
VDD = 3V
VDD = 5V
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
VD OR VS – DRAIN OR SOURCE VOLTAGE (V)
Figure 1. On Resistance as a Function of VD (VS)
6.0
5.5
5.0
4.5
4.0
3.5
()
3.0
ON
R
2.5
2.0
1.5
1.0
0.5
0
0
+85C
–40C
0.5 1.5 2.0 2.5
VD OR VS – DRAIN OR SOURCE VOLTAGE (V)
1.0 3.0
VDD = 3V
+25C
10m
VDD = 5V
1m
100
4 SW
1 SW
10k 100k 1M
FREQUENCY (Hz)
10
(Amps)
1
SUPPLY
I
100n
10n
1n
100 10M1k
Figure 4. Supply Current vs. Input Switching Frequency
–30
OFF ISOLATION (dB)
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
10k 100k 1M 10M 100M
VDD = 5V, 3V
FREQUENCY (Hz)
Figure 2. On Resistance as a Function of VD (VS) for Different Temperatures VDD = 3 V
()
R
ON
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
+85C
+25C
0 0.5
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VD OR VS – DRAIN OR SOURCE VOLTAGE (V)
–40C
VDD = 5V
Figure 3. On Resistance as a Function of VD (VS) for Different Temperatures VDD = 5 V
Figure 5. Off Isolation vs. Frequency
–30
–40
–50
–60
–70
–80
–90
CROSSTALK (dB)
–100
–110
–120
–130
10k 100k 1M 10M
VDD = 5V, 3V
FREQUENCY (Hz)
Figure 6. Crosstalk vs. Frequency
100M
–6–
REV. A
0
SOURCE VOLTAGE (V)
25
Q
INJ
(pC)
–10
0 0.5
–5
0
20
15
10
5
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VDD = 5V
VDD = 3V
TA = 25C
+5V
+2.5V
R3 510k
C1
V
OUT
GND
D1
S1 D1
GAIN RANGE 2 TO 16
+5V
AD820
S2
D2
S3 D3
S4
D4
(LSB) IN1
IN2
IN3
(MSB) IN4
R4
240k
R5
240k
R6
120kR7120k
R8
120k
R9
120k
R10
120k
R1
33k
R2 510k
+2.5V
www.BDTIC.com/ADI
VDD = 5V
–2
–4
ON RESPONSE (dB)
–6
10k 100k 1M 10M
FREQUENCY (Hz)
ADG711/ADG712/ADG713
100M
Figure 7. On Response vs. Frequency

APPLICATIONS

Figure 9 illustrates a photodetector circuit with programmable gain. An AD820 is used as the output operational amplifier. With the resistor values shown in the circuit, and using different combinations of the switches, gain in the range of 2 to 16 can be achieved.
Figure 8. Charge Injection vs. Source Voltage
REV. A
Figure 9. Photodetector Circuit with Programmable Gain
–7–
ADG711/ADG712/ADG713
ID (ON)
SD
A
V
D
V
S
www.BDTIC.com/ADI

Test Circuits

I
DS
V1
SD
V
S
RON = V1/ I
DS
IS (OFF)
A A
V
S
(OFF)
I
SD
D
V
D
Test Circuit 1. On Resistance
V
DD
V
DD
ADG713
GND
IN
V
S
0.1F
V
S1
V
S2
V
IN
S1 D1
S2
IN1, IN2
Test Circuit 2. Off Leakage
V
DD
0.1F
S
V
DD
GND
D
R
L
300
C
L
35pF
V
OUT
V
V
V
OUT
IN
IN
ADG711
ADG712
Test Circuit 4. Switching Times
D2
R
L2
300
C
L2
35pF
V
OUT2
R 300
L1
L1
35pF
V
OUT1
C
Test Circuit 5. Break-Before-Make Time Delay, t
50% 50%
50% 50%
V
S
t
ON
V
IN
0V
V
OUT1
0V
V
OUT2
0V
Test Circuit 3. On Leakage
90%
90%
D
90%
t
OFF
50% 50%
90%
t
D
t
90%
90%
D
V
DD
V
R
S
V
S
IN
DD
GND
D
C 1nF
V
OUT
L
S
Test Circuit 6. Charge Injection
–8–
SW ON
V
IN
V
OUT
Q
INJ
SW OFF
= CL  V
OUT
V
OUT
REV. A
ADG711/ADG712/ADG713
www.BDTIC.com/ADI
V
DD
0.1F
V
DD
SD
IN
V
V
S
IN
GND
R 50
V
OUT
L
Test Circuit 7. Off Isolation
V
DD
0.1F
V
DD
SD
V
V
S
NC
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG
IN1
S
D
GND
50
V
IN2
V
OUT
R
L
50
|
VS/V
|
OUT
Test Circuit 8. Channel-to-Channel Crosstalk
V
DD
0.1F
V
DD
SD
IN
V
V
S
IN
GND
R
L
50
V
OUT
Test Circuit 9. Bandwidth
REV. A
–9–
ADG711/ADG712/ADG713
www.BDTIC.com/ADI

OUTLINE DIMENSIONS

16-Lead Standard Small Outline Package [SOIC]
Narrow Body
(R-16)
Dimensions shown in millimeters and (inches)
10.00 (0.3937)
9.80 (0.3858)
4.00 (0.1575)
3.80 (0.1496)
16
1
9
6.20 (0.2441)
5.80 (0.2283)
8
1.27 (0.0500)
0.25 (0.0098)
0.10 (0.0039)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
BSC
COMPLIANT TO JEDEC STANDARDS MS-012AC
1.75 (0.0689)
1.35 (0.0531)
0.51 (0.0201)
0.31 (0.0122)
SEATING PLANE
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0197)
0.25 (0.0098)
8 0
1.27 (0.0500)
0.40 (0.0157)
45
16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
5.10
5.00
4.90
0.15
0.05
4.50
4.40
4.30
PIN 1
16
0.65 BSC
COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-153AB
0.10
0.30
0.19
9
81
1.20 MAX
6.40 BSC
SEATING
PLANE
0.20
0.09
0.75
8 0
0.60
0.45
–10–
REV. A
ADG711/ADG712/ADG713
www.BDTIC.com/ADI

Revision History

Location Page
3/04—Data Sheet changed from REV. 0 to REV. A.
Added APPLICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
REV. A
–11–
–11–
C00042–0–3/04(A)
www.BDTIC.com/ADI
–12–
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