1.8 V to 5.5 V Single Supply
ⴞ3 V Dual Supply
3 ⍀ On-Resistance
0.75 ⍀ On-Resistance Flatness
100 pA Leakage Currents
14 ns Switching Times
Single 8-to-1 Multiplexer ADG708
Differential 4-to-1 Multiplexer ADG709
16-Lead TSSOP Package
Low Power Consumption
TTL/CMOS-Compatible Inputs
APPLICATIONS
Data Acquisition Systems
Communication Systems
Relay Replacement
Audio and Video Switching
Battery-Powered Systems
4-/8-Channel Multiplexers
ADG708/ADG709
FUNCTIONAL BLOCK DIAGRAMS
GENERAL DESCRIPTION
The ADG708 and ADG709 are low voltage, CMOS analog
multiplexers comprising eight single channels and four differential
channels respectively. The ADG708 switches one of eight inputs
(S1–S8) to a common output, D, as determined by the 3-bit
binary address lines A0, A1, and A2. The ADG709 switches one
of four differential inputs to a common differential output as
determined by the 2-bit binary address lines A0 and A1. An EN
input on both devices is used to enable or disable the device. When
disabled, all channels are switched OFF.
PRODUCT HIGHLIGHTS
1. Single/Dual Supply Operation. The ADG708 and ADG709
are fully specified and guaranteed with 3 V and 5 V single
supply and ±3 V dual supply rails.
2. Low R
(3 Ω Typical).
ON
3. Low Power Consumption (<0.01 µW).
4. Guaranteed Break-Before-Make Switching Action.
5. Small 16-Lead TSSOP Package.
Low power consumption and operating supply range of 1.8 V to
5.5 V make the ADG708 and ADG709 ideal for battery-powered,
portable instruments. All channels exhibit break-before-make
switching action preventing momentary shorting when switching channels.
These switches are designed on an enhanced submicron process
that provides low power dissipation yet gives high switching
speed, very low on-resistance and leakage currents. On-resistance
is in the region of a few ohms and is closely matched between
switches and very flat over the full signal range. These parts can
operate equally well as either Multiplexers or Demultiplexers,
and have an input signal range that extends to the supplies.
The ADG708 and ADG709 are available in a 16-lead TSSOP
package.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG708/ADG709 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ADG708BRU–40°C to +85°C16-Lead Thin Shrink Small Outline Package (TSSOP)RU-16
ADG709BRU–40°C to +85°C16-Lead Thin Shrink Small Outline Package (TSSOP)RU-16
ADG708CRU–40°C to +85°C16-Lead Thin Shrink Small Outline Package (TSSOP)RU-16
ADG709CRU–40°C to +85°C16-Lead Thin Shrink Small Outline Package (TSSOP)RU-16
REV. 0
–5–
ADG708/ADG709
TERMINOLOGY
V
DD
V
SS
Most positive power supply potential.
Most negative power supply in a dual supply
application. In single supply applications, this
should be tied to ground at the device.
GNDGround (0 V) Reference.
SSource Terminal. May be an input or output.
DDrain Terminal. May be an input or output.
INLogic Control Input.
R
ON
R
FLAT(ON)
Ohmic resistance between D and S.
Flatness is defined as the difference between the
maximum and minimum value of on-resistance
as measured over the specified analog signal range.
I
(OFF)Source leakage current with the switch “OFF.”
S
I
(OFF)Drain leakage current with the switch “OFF.”
D
I
, IS (ON)Channel leakage current with the switch “ON.”
D
V
)Analog voltage on terminals D, S.
D (VS
C
(OFF)“OFF” switch source capacitance. Measured
S
with reference to ground.
C
(OFF)“OFF” switch drain capacitance. Measured
D
with reference to ground.
C
, CS (ON)“ON” switch capacitance. Measured with
D
reference to ground.
C
IN
t
TRANSITION
Digital Input Capacitance.
Delay time measured between the 50% and 90%
points of the digital inputs and the switch “ON”
condition when switching from one address state
to another.
tON (EN)Delay time between the 50% and 90% points
of the EN digital input and the switch “ON”
condition.
t
(EN)Delay time between the 50% and 90% points
OFF
of the EN digital input and the switch “OFF”
condition.
t
OPEN
“OFF” time measured between the 80% points
of both switches when switching from one address
state to another.
Off IsolationA measure of unwanted signal coupling through
an “OFF” switch.
CrosstalkA measure of unwanted signal which is coupled
through from one channel to another as a result
of parasitic capacitance.
ChargeA measure of the glitch impulse transferred from
Injectionthe digital input to the analog output during
switching.
BandwidthThe frequency at which the output is attenuated
by 3 dBs.
On Response The frequency response of the “ON” switch.
On LossThe loss due to the ON resistance of the switch.
V
V
I
I
I
INL
INH
INL
DD
SS
(I
INH
Maximum input voltage for Logic “0.”
Minimum input voltage for Logic “1.”
)Input current of the digital input.
Positive Supply Current.
Negative Supply Current.
–6–
REV. 0
Typical Performance Characteristics–
VD OR VS – DRAIN OR SOURCE VOLTAGE – V
00.5
7
6
5
4
3
2
1
0
ON RESISTANCE – V
VDD = 3V
V
SS
= 0V
1.01.52.02.53.0
–408C
+258C
+858C
8
ADG708/ADG709
8
7
6
5
4
3
ON RESISTANCE – V
2
1
0
0 12345
VD, VS, DRAIN OR SOURCE VOLTAGE – V
VDD = 2.7V
VDD = 3.3V
VDD = 4.5V
TA = 258C
= 0V
V
SS
VDD = 5.5V
Figure 1. On Resistance as a Function of VD (VS) for Single
Supply
8
7
6
5
4
3
ON RESISTANCE – V
2
1
0
–3.0
VDD = +3.0V
VSS = –3.0V
–2.0
–2.5
–1.5
VD OR VS – DRAIN OR SOURCE VOLTAGE – V
VDD = +2.25V
VSS = –2.25V
–1.0
–0.5
VDD = +2.75V
VSS = –2.75V
0.50
1.0
1.5
TA = 258C
2.0
2.5
3.0
Figure 2. On Resistance as a Function of VD (VS) for Dual
Supply
Figure 4. On Resistance as a Function of VD (VS) for Different Temperatures, Single Supply
8
7
6
5
4
3
ON RESISTANCE – V
2
1
0
–3.0 –2.5 –2.0
+858C
–408C
–1.5
–1.01.0 1.5 2.0 2.50.50
–0.5
VD OR VS – DRAIN OR SOURCE VOLTAGE – V
VDD = +3.0V
VSS = –3.0V
+258C
3.0
Figure 5. On Resistance as a Function of VD (VS) for Different Temperatures, Dual Supply
8
7
6
5
4
3
ON RESISTANCE – V
2
1
0
012345
VD OR VS – DRAIN OR SOURCE VOLTAGE – V
+858C
–408C
+258C
VDD = 5V
= 0V
V
SS
Figure 3. On Resistance as a Function of VD (VS) for Different Temperatures, Single Supply
REV. 0
–7–
0.12
0.08
0.04
0.00
CURRENT – nA
–0.04
–0.08
–0.12
01
ID (ON)
IS (OFF)
2345
VD (V
– Volts
S)
VDD = 5V
V
SS
T
A
ID (OFF)
= 0V
= 258C
Figure 6. Leakage Currents as a Function of VD (VS)
ADG708/ADG709
0.12
0.08
0.04
0.00
CURRENT – nA
–0.04
–0.08
–0.12
00.5
IS (OFF)
1.01.52.03.0
VD (V
– Volts
S)
VDD = 3V
V
SS
= 258C
T
A
ID (ON)
ID (OFF)
2.5
= 0V
Figure 7. Leakage Currents as a Function of VD (VS)
0.12
0.08
0.04
0.00
CURRENT – nA
–0.04
IS (OFF)
VDD = +3.0V
VSS = –3.0V
TA = 258C
ID (ON)
0.35
0.30
0.25
0.20
0.15
0.10
CURRENT – nA
0.05
0.00
–0.05
15
ID (OFF)
IS (OFF)
25354555657585
TEMPERATURE – 8C
VDD = 3V
= 0V
V
SS
ID (ON)
Figure 10. Leakage Currents as a Function of Temperature
10m
TA = 258C
1m
V
= +3.0V
100m
10m
1m
CURRENT – A
100n
DD
VSS = –3.0V
VDD = +5V
VDD = +3V
–0.08
–0.12
–3.0
–2.5 –2.0 –1.5 –1.0
0 0.5
–0.53.0
VD (V
– Volts
S)
1.0
1.5
ID (OFF)
2.0 2.5
Figure 8. Leakage Currents as a Function of VD (VS)
0.35
0.30
0.25
0.20
0.15
0.10
CURRENT – nA
0.05
0.00
–0.05
15
ID (OFF)
25354555657585
TEMPERATURE – 8C
IS (OFF)
VDD = 5V
= 0V
V
SS
AND
= +3V
V
DD
= –3V
V
SS
ID (ON)
Figure 9. Leakage Currents as a Function of Temperature
10n
1n
1001k10k100k1M10M
10
FREQUENCY – Hz
Figure 11. Supply Current vs. Input Switching Frequency
0
–20
–40
–60
–80
ATTENUATION – dB
–100
–120
100k1M10M100M
30k
FREQUENCY – Hz
VDD = 5V
= 258C
T
A
Figure 12. Off Isolation vs. Frequency
–8–
REV. 0
ADG708/ADG709
0
–20
–40
–60
–80
ATTENUATION – dB
–100
–120
100k1M10M100M
30k
FREQUENCY – Hz
Figure 13. Crosstalk vs. Frequency
– pC
–10
INJ
Q
–20
–30
VDD = 5V
= 258C
T
A
0
VDD = 5V
= 258C
T
A
–5
–10
ATTENUATION – dB
–15
–20
30k
100k1M10M100M
FREQUENCY – Hz
Figure 14. On Response vs. Frequency
20
10
0
VDD = 3V
VSS = 0V
VDD = +3V
= –3V
V
SS
TA = 258C
VDD = 5V
VSS = 0V
–40
–3–2
04
–11
VOLTAGE – Volts
2
3
Figure 15. Charge Injection vs. Source Voltage
5
REV. 0
–9–
ADG708/ADG709
V
S
A
0.8V
D
ID (OFF)
V
SS
V
DD
V
SS
V
DD
S1
S2
S8
EN
GND
V
D
A
2.4V
D
I
D
(ON)
V
SS
V
DD
V
SS
V
DD
S1
S8
EN
GND
V
D
V
S
Test Circuits
I
DS
V1
S
V
S
RON = V1/I
Test Circuit 1. On Resistance
V
DD
V
I
V
(OFF)
S
S
A
DD
S1
S2
S8
V
D
GND
Test Circuit 2. IS (OFF)
V
DD
V
DD
V
IN
50V
2.4V
A2
A1
S2 THRU S7
A0
ADG708*
EN
GND
* SIMILAR CONNECTION FOR ADG709
D
DS
V
SS
V
SS
D
0.8V
EN
V
SS
V
SS
V
S1
S1
ADDRESS
DRIVE (V
3V
)
IN
0V
V
S8
S8
D
R
L
300V
C
L
35pF
V
OUT
V
S1
V
OUT
V
S8
Test Circuit 5. Switching Time of Multiplexer, t
Test Circuit 3. ID (OFF)
Test Circuit 4. ID (ON)
50%
t
TRANSITION
TRANSITION
90%
50%
t
TRANSITION
90%
DD
DD
S2 THRU S7
ADG708*
GND
V
SS
V
SS
S1
V
S
ADDRESS
DRIVE (V
3V
)
IN
0V
S8
D
R
L
300V
C
L
35pF
V
OUT
V
OUT
80%
t
80%
OPEN
V
V
A2
V
IN
50V
2.4V
A1
A0
EN
* SIMILAR CONNECTION FOR ADG709
–10–
Test Circuit 6. Break-Before-Make Delay, t
OPEN
REV. 0
ADG708/ADG709
A2
V
OUT
V
SS
V
DD
D
A1
A0
EN
GND
ADG708
*
R
L
V
SS
V
SS
S1
V
S
S2
S8
2.4V
50V
50V
*
SIMILAR CONNECTION FOR ADG709
CHANNEL-TO-CHANNEL CROSSTALK = 20LOG
10
V
OUT
V
S
DD
DD
S2 THRU S8
ADG708*
GND
A2
A1
A0
S
EN
V
SS
V
SS
V
S1
S
D
R
300V
C
L
L
35pF
Test Circuit 7. Enable Delay, t
V
V
DD
SS
V
V
DD
SS
ADG708*
D
V
C
OUT
L
1nF
GND
V
OUT
LOGIC INPUT
(VIN)
ENABLE
DRIVE (V
OUTPUT
3V
0V
V
OUT
3V
IN
0V
V
0V
)
0
ON
(EN), t
OFF
50%
(EN)
Q
INJ
0.9V
t
ON
= CL 3DV
0
(EN)
OUT
50%
DV
OUT
t
0.9V
OFF
(EN)
0
V
V
A2
A1
A0
EN
V
IN
50V
* SIMILAR CONNECTION FOR ADG709
R
S
V
S
V
IN
*SIMILAR CONNECTION FOR ADG709
Test Circuit 8. Charge Injection
V
DD
V
DD
ADG708
S1
S8
*
D
V
SS
V
SS
10
( )
V
V
OUT
R
L
50V
V
OUT
10
V
S
V
WITH SWITCH
OUT
WITHOUT SWITCH
OUT
V
S
Test Circuit 10. Channel-to-Channel Crosstalk
A2
A1
A0
**
EN
GND
OFF ISOLATION = 20LOG
INSERTION LOSS = 20LOG
*
SIMILAR CONNECTION FOR ADG709
**
CONNECT TO 2.4V FOR BANDWIDTH MEASUREMENTS
Test Circuit 9. OFF Isolation and Bandwidth
Power-Supply Sequencing
When using CMOS devices, care must be taken to ensure correct
power-supply sequencing. Incorrect power-supply sequencing
can result in the device being subjected to stresses beyond the
maximum ratings listed in the data sheet. Digital and analog
inputs should always be applied after power supplies and ground.
For single supply operation, V
to the device as possible.
should be tied to GND as close
SS
REV. 0
–11–
ADG708/ADG709
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Lead TSSOP
(RU-16)
0.201 (5.10)
0.193 (4.90)
169
0.177 (4.50)
0.006 (0.15)
0.002 (0.05)
SEATING
PLANE
0.169 (4.30)
1
PIN 1
0.0256
(0.65)
BSC
0.0118 (0.30)
0.0075 (0.19)
8
0.256 (6.50)
0.246 (6.25)
0.0433
(1.10)
MAX
0.0079 (0.20)
0.0035 (0.090)
8°
0°
C3712–8–1/00 (rev. 0)
0.028 (0.70)
0.020 (0.50)
–12–
PRINTED IN U.S.A.
REV. 0
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