1.8 V to 5.5 V single supply
2 Ω (typical) on resistance
Low on resistance flatness
Guaranteed leakage specifications up to 85°C
–3 dB bandwidth > 200 MHz
Rail-to-rail operation
Fast switching times
18 ns
t
ON
t
12 ns
OFF
Typical power consumption < 0.01 μW
TTL/CMOS-compatible
APPLICATIONS
Battery-powered systems
Communication systems
Sample-and-hold systems
Audio signal routing
Video switching
Mechanical reed relay replacement
GENERAL DESCRIPTION
2 Ω SPST Switches
ADG701L/ADG702L
FUNCTIONAL BLOCK DIAGRAMS
ADG701L
SWITCHES SHOWN
FOR A LOGIC 1 INPUT
ADG702L
SWITCHES SHOWN
FOR A LOGIC 1 INPUT
PRODUCT HIGHLIGHTS
Figure 1.
Figure 2.
D
IN
05486-001
DS
IN
05486-020
The ADG701L/ADG702L are monolithic CMOS SPST switches.
These switches are designed using an advanced submicron
process that provides low power dissipation, yet offers high
switching speed, low on resistance, and low leakage currents.
In addition, −3 dB bandwidths of greater than 200 MHz can
be achieved.
The ADG701L/ADG702L can operate from a single 1.8 V to
5.5 V s
upply, making it ideal for use in battery-powered
instruments and with the new generation of DACs and ADCs
from Analog Devices.
Figure 1 and Figure 2 show that with a logic input of 1, the
tch of the ADG701L is closed, while that of the ADG702L
swi
is open. Each switch conducts equally well in both directions
when on.
The ADG701L/ADG702L are packaged as 5-lead SOT-23,
6-lead S
OT-23, and 8-lead MSOP.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
1. 1.8 V to 5.5 V single-supply operation. The ADG701L/
ADG702L offer high performance, including low on
resistance and fast switching times. The ADG701L/
ADG702L are fully specified and guaranteed with 3 V
and 5 V supply rails.
r y low R
2. Ve
At 1.8 V operation, R
(3 Ω maximum at 5 V, 5 Ω maximum at 3 V).
ON
is typically 40 Ω over the
ON
temperature range.
n resistance flatness R
3. O
4. −3 dB ban
5. L
ow power dissipation. CMOS construction ensures low
VDD = 5 V ± 10%, GND = 0 V. Temperature range for the B version is −40°C to +85°C, unless otherwise noted.
Table 1.
B Version
o
−40°C t
Parameter +25°C
+85°C
ANALOG SWITCH
Analog Signal Range 0 V to VDD V
On Resistance (RON) 2 Ω typ
3 4 Ω max
On Resistance Flatness (R
) 0.5 Ω typ
FLAT(ON)
1.0 Ω max
LEAKAGE CURRENTS VDD = 5.5 V
Source Off Leakage, IS (OFF) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 13
±0.25 ±0.35 nA max
Drain Off Leakage, ID (OFF) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 13
±0.25 ±0.35 nA max
Channel On Leakage, ID, IS (ON) ±0.01 nA typ VS = VD = 1 V, or 4.5 V; see Figure 14
±0.25 ±0.35 nA max
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
2.4 V min
INH
0.8 V max
INL
Input Current
I
or I
0.005 μA typ VIN = V
INL
INH
±0.1 μA max
DYNAMIC CHARACTERISTICS
1
tON 12 ns typ RL = 300 Ω, CL = 35 pF
18 ns max VS = 3 V; see Figure 15
t
8 ns typ RL = 300 Ω, CL = 35 pF
OFF
12 ns max VS = 3 V; see Figure 15
Charge Injection 5 pC typ VS = 2 V, RS = 0 Ω, CL = 1 nF; see Figure 16
Off Isolation
Bandwidth −3 dB
−55
−75
200 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 18
dB typ RL = 50 Ω, CL = 5 pF, f = 10 MHz
dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 17
CS (OFF) 17 pF typ
CD (OFF) 17 pF typ
CD, CS (ON) 38 pF typ
POWER REQUIREMENTS VDD = 5.5 V
IDD 0.001 μA typ Digital inputs = 0 V or 5 V
1.0 μA max
1
Guaranteed by design, not subject to production test.
Unit Test C
VS = 0 V to VDD, IS = −10 mA; see Figure 12
= 0 V to VDD, IS = −10 mA
V
S
onditions/Comments
or V
INH
INL
Rev. 0 | Page 3 of 12
ADG701L/ADG702L
www.BDTIC.com/ADI
VDD = 3 V ± 10%, GND = 0 V. Temperature range for the B version is −40°C to +85°C, unless otherwise noted.
Table 2.
B Version
o
−40°C t
Parameter +25°C
+85°C
ANALOG SWITCH
Analog Signal Range 0 V to VDD V
On Resistance (RON) 3.5 Ω typ
5 6 Ω max
On Resistance Flatness (R
) 1.5 Ω typ
FLAT(ON)
LEAKAGE CURRENTS VDD = 3.3 V
Source Off Leakage IS (OFF) ±0.01 nA typ VS = 3 V/1 V, VD = 1 V/3 V; see Figure 13
±0.25 ±0.35 nA max
Drain Off Leakage ID (OFF) ±0.01 nA typ VS = 3 V/1 V, VD = 1 V/3 V; see Figure 13
±0.25 ±0.35 nA max
Channel On Leakage ID, IS (ON) ±0.01 nA typ VS = VD = 1 V, or 3 V; see Figure 14
±0.25 ±0.35 nA max
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
2.0 V min
INH
0.4 V max
INL
Input Current
I
or I
0.005 μA typ VIN = V
INL
INH
±0.1 μA max
DYNAMIC CHARACTERISTICS
1
tON 14 ns typ
20 ns max VS = 2 V, see Figure 15
t
8 ns typ
OFF
13 ns max VS = 2 V, see Figure 15
Charge Injection 4 pC typ
Off Isolation
Bandwidth −3 dB
−55
−75
200 MHz typ
dB typ
dB typ
CS (OFF) 17 pF typ
CD (OFF) 17 pF typ
CD, CS (ON) 38 pF typ
POWER REQUIREMENTS VDD = 3.3 V
IDD 0.001 μA typ Digital Inputs = 0 V or 3 V
1.0 μA max
1
Guaranteed by design, not subject to production test.
Unit Test Conditions/Comments
VS = 0 V to VDD, IS = −10 mA; see Figure 12
VS = 0 V to VDD, IS = −10 mA
or V
INH
INL
RL = 300 Ω, CL = 35 pF
RL = 300 Ω, CL = 35 pF
VS = 1.5 V, RS = 0 Ω, CL = 1 nF; see Figure 16
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 17
RL = 50 Ω, CL = 5 pF; see Figure 18
Rev. 0 | Page 4 of 12
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