Analog Devices ADG623BRM, ADG621BRM Datasheet

CMOS ⴞ5 V/5 V

ADG621

IN1

D2

S2

S1

D1

IN2

ADG622

IN1

D2

S2

S1

D1

IN2

ADG623

IN1

D2

S2

S1

D1

IN2

SWITCHES SHOWN FOR A LOGIC "0" INPUT

a

FEATURES

5.5 ⍀ (Max) On Resistance

0.9 ⍀ (Max) On-Resistance Flatness

2.7 V to 5.5 V Single Supply
ⴞ2.7 V to ⴞ5.5 V Dual Supply
Rail-to-Rail Operation
10-Lead ␮SOIC Package
Typical Power Consumption (<0.01 ␮W)
TTL/CMOS Compatible Inputs

APPLICATIONS
Automatic Test Equipment
Power Routing
Communication Systems
Data Acquisition Systems
Sample and Hold Systems
Avionics
Relay Replacement
Battery-Powered Systems

4 ⍀ Dual SPST Switches

ADG621/ADG622/ADG623

FUNCTIONAL BLOCK DIAGRAM

GENERAL DESCRIPTION

The ADG621, ADG622, and the ADG623 are monolithic,
CMOS SPST (single-pole, single-throw) switches. Each switch
of the ADG621, ADG622, and ADG623 conducts equally well
in both directions when on.

The ADG621/ADG622/ADG623 contain two independent
switches. The ADG621 and ADG622 differ only in that both

PRODUCT HIGHLIGHTS

1. Low On Resistance (RON) (4 Ω typ)

2. Dual ±2.7 V to ±5.5 V or Single 2.7 V to 5.5 V

3. Low Power Dissipation. CMOS construction ensures low
power dissipation.

4. Tiny 10-Lead µSOIC Package

switches are normally open and normally closed respectively. In the
ADG623, Switch 1 is normally open and Switch 2 is normally
closed. The ADG623 exhibits break-before-make switching action.

The ADG621/ADG622/ADG623 offers low on-resistance of
4 Ω, which is matched to within 0.25 Ω between channels.
These switches also provide low power dissipation yet gives
high switching speeds. The ADG621, ADG622, and ADG623
are available in a 10-lead µSOIC package.

REV. 0

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © Analog Devices, Inc., 2001

ADG621/ADG622/ADG623–SPECIFICATIONS

1

(V

DUAL SUPPLY

= +5 V ⴞ 10%, V

DD

Parameter +25ⴗC +85ⴗC Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range VSS to V

On Resistance (R

)4 Ω typ VS = ±4.5 V, IS = –10 mA,

ON

On Resistance Match Between

Channels (∆R

On-Resistance Flatness (R

) 0.25 Ω typ VS = ±4.5 V, IS = –10 mA

ON

FLAT(ON)

) 0.9 0.9 Ω typ VS = ±3.3 V, IS = –10 mA

LEAKAGE CURRENTS V

Source OFF Leakage I

Drain OFF Leakage I

Channel ON Leakage I

(OFF) ± 0.01 nA typ VS = ±4.5 V, VD = ⫿4.5 V,

S

(OFF) ± 0.01 nA typ VS = ±4.5 V, VD = ⫿4.5 V,

D

, IS (ON) ± 0.01 nA typ VS = VD = ± 4.5 V, Test Circuit 3

D

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V

INH

INL

Input Current

or I

I

INL

INH

CIN, Digital Input Capacitance 2 pF typ

DYNAMIC CHARACTERISTICS

t

ON

t

OFF

Break-Before-Make Time Delay, t

2

BBM

(ADG623 Only) 10 ns min V
Charge Injection 110 pC typ V

Off Isolation –65 dB typ R

Channel-to-Channel Crosstalk –90 dB typ R

Bandwidth –3 dB 230 MHz typ R
C

(OFF) 20 pF typ f = 1 MHz

S

(OFF) 20 pF typ f = 1 MHz

C

D

C

(ON) 70 pF typ f = 1 MHz

D, CS

POWER REQUIREMENTS V

I

DD

I

SS

NOTES

1

Temperature ranges are as follows: B Version, –40°C to +85°C.

2

Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

= –5 V ⴞ 10%, GND = 0 V. All specifications –40ⴗC to +85ⴗC unless otherwise noted.)

SS

B Version

–40ⴗC to

DD

V

V

= +4.5 V, VSS = –4.5 V

DD

5.5 7 Ω max Test Circuit 1

0.35 0.4 Ω max

1.5 Ω max

= +5.5 V, VSS = –5.5 V

DD

± 0.25 ± 1 nA max Test Circuit 2

± 0.25 ± 1 nA max Test Circuit 2

± 0.25 ± 1 nA max

2.4 V min

0.8 V max

0.005 µA typ VIN = V

INL

or V

INH

± 0.1 µA max

75 ns typ RL = 300 Ω, CL = 35 pF
120 155 ns max V

= 3.3 V, Test Circuit 4

S

45 ns typ RL = 300 Ω, CL = 35 pF
70 85 ns max V

= 3.3 V, Test Circuit 4

S

30 ns typ RL = 300 Ω, CL = 35 pF,

= VS2 = 3.3 V, Test Circuit 5

S1

= 0 V, RS = 0 Ω, CL = 1 nF,

S

Test Circuit 7

= 50 Ω, CL = 5 pF, f = 1 MHz,

L

Test Circuit 8

= 50 Ω, CL = 5 pF, f = 1 MHz,

L

Test Circuit 10

= 50 Ω, CL = 5 pF, Test Circuit 9

L

= +5.5 V, VSS = –5.5 V

DD

0.001 µA typ Digital Inputs = 0 V or 5.5 V

1.0 µA max

0.001 µA typ Digital Inputs = 0 V or 5.5 V

1.0 µA max

–2–

REV. 0

ADG621/ADG622/ADG623

SINGLE SUPPLY

1

(VDD = +5 V ⴞ 10%, VSS = 0 V, GND = 0 V. All specifications –40ⴗC to +85ⴗC unless otherwise noted.)

B Version

–40ⴗC to

Parameter +25ⴗC +85ⴗC Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 V to V

On Resistance (R

)7 Ω typ VS = 0 V to 4.5 V, IS = –10 mA,

ON

DD

V

V

= 4.5 V, VSS = 0 V

DD

10 12.5 Ω max Test Circuit 1

On Resistance Match Between

Channels (∆R

) 0.5 Ω typ VS = 0 V to 4.5 V, IS = –10 mA

ON

0.75 1 Ω max

On-Resistance Flatness (R

FLAT(ON)

) 0.5 0.5 Ω typ VS = 1.5 V to 3.3 V, IS = –10 mA

1 Ω max

LEAKAGE CURRENTS V

Source OFF Leakage I

(OFF) ± 0.01 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V,

S

= 5.5 V

DD

± 0.25 ± 1 nA max Test Circuit 2

Drain OFF Leakage I

(OFF) ± 0.01 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V,

D

± 0.25 ± 1 nA max Test Circuit 2

Channel ON Leakage I

, IS (ON) ± 0.01 nA typ VS = VD = 1 V/4.5 V,

D

± 0.25 ± 1 nA max Test Circuit 3

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V

INL

INH

2.4 V min

0.8 V max

Input Current

I

INL

or I

INH

0.005 µA typ VIN = V

INL

or V

INH

± 0.1 µA max

CIN, Digital Input Capacitance 2 pF typ

DYNAMIC CHARACTERISTICS

t

ON

t

OFF

Break-Before-Make Time Delay, t

(ADG623 Only) 10 ns min V

Charge Injection 6 pC typ V

2

BBM

120 ns typ RL = 300 Ω, CL = 35 pF
210 260 ns max V

= 3.3 V, Test Circuit 4

S

50 ns typ RL = 300 Ω, CL = 35 pF
75 100 ns max V

= 3.3 V, Test Circuit 4

S

70 ns typ RL = 300 Ω, CL = 35 pF,

= VS2 = 3.3 V, Test Circuit 5

S1

= 0 V; RS = 0 Ω, CL = 1 nF,

S

Test Circuit 6

Off Isolation –65 dB typ R

= 50 Ω, CL = 5 pF, f = 1 MHz,

L

Test Circuit 7

Channel-to-Channel Crosstalk –90 dB typ R

= 50 Ω, CL = 5 pF, f = 1 MHz,

L

Test Circuit 9

Bandwidth –3 dB 230 MHz typ R

(OFF) 20 pF typ f = 1 MHz

C

S

C

(OFF) 20 pF typ f = 1 MHz

D

= 50 Ω, CL = 5 pF, Test Circuit 8

L

CD, CS (ON) 70 pF typ f = 1 MHz

POWER REQUIREMENTS V

I

DD

0.001 µA typ Digital Inputs = 0 V or 5.5 V

= 5.5 V

DD

1.0 µA max

NOTES

1

Temperature ranges are as follows: B Version, –40°C to +85°C.

2

Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

REV. 0

–3–

ADG621/ADG622/ADG623

WARNING!

ESD SENSITIVE DEVICE

ABSOLUTE MAXIMUM RATINGS

(TA = +25°C unless otherwise noted)

1

VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 V

V

to GND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6.5 V

DD

to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –6.5 V

V

SS

Analog Inputs
Digital Inputs

2

. . . . . . . . . . . . . . . . . VSS – 0.3 V to VDD + 0.3 V

2

. . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V or

30 mA, Whichever Occurs First

Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA

(Pulsed at 1 ms, 10% Duty Cycle max)

Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 50 mA

Operating Temperature Range

Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

µSOIC Package

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206°C/W

θ

JA

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44°C/W

θ

JC

Lead Temperature, Soldering (10 seconds) . . . . . . . . . . . 300°C

IR Reflow, Peak Temperature . . . . . . . . . . . . . . . . . . . 220°C

NOTES

1

Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi­tions for extended periods may affect device reliability. Only one absolute maximum
rating may be applied at any one time.

2

Overvoltages at IN, S, or D will be clamped by internal diodes. Current should be

limited to the maximum ratings given.

Table I. Truth Table for the ADG621/ADG622

ADG621 INx ADG622 INx Switch x Condition

0 1 OFF
10 ON

Table II. Truth Table for the ADG623

IN1 IN2 Switch S1 Switch S2

00 OFF ON
0 1 OFF OFF
10 ON ON
1 1 ON OFF

ORDERING GUIDE

Model Option Temperature Range Description Package Branding Information*

ADG621BRM –40°C to +85°C µSOIC (microSmall Outline IC) RM-10 SXB
ADG622BRM –40°C to +85°C µSOIC (microSmall Outline IC) RM-10 SYB
ADG623BRM –40°C to +85°C µSOIC (microSmall Outline IC) RM-10 SZB

*Branding on µSOIC packages is limited to three characters due to space constraints.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG621/ADG622/ADG623 features proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

–4–

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