Analog Devices ADG620BRT, ADG620BRM, ADG619BRT, ADG619BRM Datasheet

CMOS ⴞ5 V/+5 V

a

FEATURES
6 ⍀ (Max) On Resistance

0.8 ⍀ (Max) On-Resistance Flatness

2.7 V to 5.5 V Single Supply
ⴞ2.7 V to ⴞ5.5 V Dual Supply
Rail-to-Rail Operation
8-Lead SOT-23 Package, 8-Lead Micro-SOIC Package
Typical Power Consumption (<0.1 ␮W)
TTL/CMOS Compatible Inputs

APPLICATIONS
Automatic Test Equipment
Power Routing
Communication Systems
Data Acquisition Systems
Sample and Hold Systems
Avionics
Relay Replacement
Battery-Powered Systems

4 ⍀ Single SPDT Switches

ADG619/ADG620

FUNCTIONAL BLOCK DIAGRAM

ADG619/ADG620

S2

S1

IN

SWITCHES SHOWN FOR A LOGIC "1" INPUT

D

GENERAL DESCRIPTION

The ADG619 and the ADG620 are monolithic, CMOS SPDT
(single pole, double throw) switches. Each switch conducts
equally well in both directions when on.

The ADG619/ADG620 offers low On-Resistance of 4 Ω, which
is matched to within 0.7 Ω between channels. These switches also
provide low power dissipation yet give high switching speeds.The
ADG619 exhibits break-before-make switching action, thus
preventing momentary shorting when switching channels. The
ADG620 exhibits make-before-break action.

The ADG619/ADG620 are available in 8-lead SOT-23 pack­ages and 8-lead Micro-SOIC packages.

Table I. Truth Table for the ADG619/ADG620

IN Switch S1 Switch S2

0 ON OFF
1 OFF ON

PRODUCT HIGHLIGHTS

1. Low On Resistance (RON) (4 Ω typ)

2. Dual ±2.7 V to ± 5.5 V or Single 2.7 V to 5.5 V

3. Low Power Dissipation. CMOS construction ensures low
power dissipation.

4. Fast t

5.

ON/tOFF

Tiny 8-Lead SOT-23 Package and 8-Lead Micro-SOIC Package

REV. 0

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © Analog Devices, Inc., 2001

ADG619/ADG620–SPECIFICATIONS

DUAL SUPPLY

1

(V

= +5 V ⴞ 10%, V

DD

= –5 V ⴞ 10%, GND = 0 V. All specifications –40ⴗC to +85ⴗC unless otherwise noted.)

SS

B Version

–40ⴗC to

Parameter +25ⴗC +85ⴗC Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range V
On Resistance (R

)4 Ω typ VS = ± 4.5 V, IS = –10 mA,

ON

SS

to V

DD

VV

= +4.5 V, VSS = –4.5 V

DD

68 Ω max Test Circuit 1

On Resistance Match Between

Channels (∆R

) 0.7 Ω typ VS = ± 4.5 V, IS = –10 mA

ON

1.1 1.35 Ω max

On-Resistance Flatness (R

FLAT(ON)

) 0.7 0.8 Ω typ VS = ± 3.3 V, IS = –10 mA

1.2 Ω max

LEAKAGE CURRENTS V

Source OFF Leakage I

(OFF) ± 0.01 nA typ VS = ± 4.5 V, VD = ⫿4.5 V,

S

= +5.5 V, VSS = –5.5 V

DD

± 0.25 ± 1 nA max Test Circuit 2

Channel ON Leakage I

, IS (ON) ± 0.01 nA typ VS = VD = ± 4.5 V, Test Circuit 3

D

± 0.25 ± 1 nA max

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V

INL

INH

2.4 V min

0.8 V max

Input Current

I

INL

or I

INH

0.005 µA typ VIN = V

INL

or V

INH

± 0.1 µA max

CIN, Digital Input Capacitance 2 pF typ

DYNAMIC CHARACTERISTICS

2

ADG619

t

ON

t

OFF

Break-Before-Make Time Delay, t

80 ns typ RL = 300 Ω, CL = 35 pF
120 155 ns max V

= 3.3 V, Test Circuit 4

S

45 ns typ RL = 300 Ω, CL = 35 pF
75 90 ns max V
40 ns typ RL = 300 Ω, CL = 35 pF

BBM

10 ns min V

= 3.3 V, Test Circuit 4

S

= VS2 = 3.3 V, Test Circuit 5

S1

ADG620

t

ON

t

OFF

Make-Before-Break Time Delay, t

Charge Injection 110 pC typ V

40 ns typ RL = 300 Ω, CL = 35 pF
65 85 ns max V

= 3.3 V, Test Circuit 4

S

200 ns typ RL = 300 Ω, CL = 35 pF
330 400 ns max V
160 ns typ RL = 300 Ω, CL = 35 pF

MBB

10 ns min V

= 3.3 V, Test Circuit 4

S

= 0 V, Test Circuit 6

S

= 0 V, RS = 0 Ω, CL = 1 nF,

S

Test Circuit 7

Off Isolation –67 dB typ R

= 50 Ω, CL = 5 pF, f = 1 MHz,

L

Test Circuit 8

Channel-to-Channel Crosstalk –67 dB typ R

= 50 Ω, CL = 5 pF, f = 1 MHz,

L

Test Circuit 10
Bandwidth –3 dB 190 MHz typ R
C

(OFF) 25 pF typ f = 1 MHz

S

C

(ON) 95 pF typ f = 1 MHz

D, CS

POWER REQUIREMENTS V

I

DD

0.001 µA typ Digital Inputs = 0 V or 5.5 V

= 50 Ω, CL = 5 pF, Test Circuit 9

L

= +5.5 V, VSS = –5.5 V

DD

1.0 µA max

I

SS

0.001 µA typ Digital Inputs = 0 V or 5.5 V

1.0 µA max

NOTES

1

Temperature ranges are as follows: B Version, –40°C to +85°C.

2

Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

–2–

REV. 0

ADG619/ADG620

1

SINGLE SUPPLY

Parameter +25ⴗC +85ⴗC Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 V to V
On Resistance (R

On Resistance Match Between

Channels (∆R

On-Resistance Flatness (R

LEAKAGE CURRENTS V

Source OFF Leakage I

Channel ON Leakage I

DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V
Input Current

or I

I

INL

CIN, Digital Input Capacitance 2 pF typ

DYNAMIC CHARACTERISTICS

ADG619

t

ON

t

OFF

Break-Before-Make Time Delay, t

ADG620

t

ON

t

OFF

Make-Before-Break Time Delay, t

Charge Injection 6 pC typ V

Off Isolation –67 dB typ R

Channel-to-Channel Crosstalk –67 dB typ R

Bandwidth –3 dB 190 MHz typ R
C

(OFF) 25 pF typ f = 1 MHz

S

CD, CS (ON) 95 pF typ f = 1 MHz

POWER REQUIREMENTS V

I

DD

NOTES

1

Temperature ranges are as follows: B Version, –40°C to +85°C.

2

Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

ON

INH

(VDD = +5 V ⴞ 10%, VSS = 0 V, GND = 0 V. All specifications –40ⴗC to +85ⴗC unless otherwise noted.)

B Version

–40ⴗC to

VV

)7 Ω typ VS = 0 V to 4.5 V, IS = –10 mA,

ON

DD

= 4.5 V, VSS = 0 V

DD

ß10 12.5 Ω max Test Circuit 1

) 0.8 Ω typ VS = 0 V to 4.5 V, IS = –10 mA

1 1.2 Ω max

FLAT(ON)

) 0.5 0.5 Ω typ VS = 1.5 V to 3.3 V, IS = –10 mA

0.8 Ω max

= 5.5 V

(OFF) ±0.01 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V,

S

DD

± 0.25 ± 1 nA max Test Circuit 2

, IS (ON) ± 0.01 nA typ VS = VD = 1 V/4.5 V,

D

± 0.25 ± 1 nA max Test Circuit 3

INH

INL

0.005 µA typ VIN = V

2.4 V min

0.8 V max

INL

or V

INH

± 0.1 µA max

2

120 ns typ RL = 300 Ω, CL = 35 pF
220 280 ns max V

= 3.3 V, Test Circuit 4

S

50 ns typ RL = 300 Ω, CL = 35 pF

= 3.3 V, Test Circuit 4

S

= VS2 = 3.3 V, Test Circuit 5

S1

BBM

75 110 ns max V
70 ns typ RL = 300 Ω, CL = 35 pF,

10 ns min V

50 ns typ RL = 300 Ω, CL = 35 pF
85 110 ns max V

= 3.3 V, Test Circuit 4

S

210 ns typ RL = 300 Ω, CL = 35 pF

MBB

340 420 ns max V
170 ns typ RL = 300 Ω, CL = 35 pF

10 ns min V

= 3.3 V, Test Circuit 4

S

= 3.3 V, Test Circuit 6

S

= 0 V, RS = 0 Ω, CL = 1 nF,

S

Test Circuit 7

= 50 Ω, CL = 5 pF, f = 1 MHz,

L

Test Circuit 8

= 50 Ω, CL = 5 pF, f = 1 MHz,

L

Test Circuit 10

= 50 Ω, CL = 5 pF, Test Circuit 9

L

= 5.5 V

DD

0.001 µA typ Digital Inputs = 0 V or 5.5 V

1.0 µA max

REV. 0

–3–

ADG619/ADG620

WARNING!

ESD SENSITIVE DEVICE

TOP VIEW

(Not to Scale)

8

7

6

5

1

2

3

4

NC = NO CONNECT

D

S1

NC

V

DD

S2

GND

IN

V

SS

ADG619/

ADG620

TOP VIEW

(Not to Scale)

8

7

6

5

1

2

3

4

NC = NO CONNECT

D

S1

NC

V

DD

S2

GND

IN

V

SS

ADG619/

ADG620

ABSOLUTE MAXIMUM RATINGS

(TA = 25°C unless otherwise noted)

1

VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 V

V

to GND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6.5 V

DD

to GND . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –6.5 V

V

SS

Analog Inputs
Digital Inputs

2

. . . . . . . . . . . . . . . . VSS –0.3 V to VDD +0.3 V

2

. . . . . . . . . . . . . . . . . –0.3 V to VDD +0.3 V or

30 mA, Whichever Occurs First

Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA

(Pulsed at 1 ms, 10% Duty Cycle max)

Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 50 mA

Operating Temperature Range

Industrial (B Version) . . . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

Micro-SOIC Package

Thermal Impedance . . . . . . . . . . . . . . . . . . . . 206°C/W

␪

JA

␪

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 44°C/W

JC

SOT-23 Package

Thermal Impedance . . . . . . . . . . . . . . . . . . 229.6°C/W

␪

JA

␪

Thermal Impedance . . . . . . . . . . . . . . . . . . 91.99°C/W

JC

Lead Temperature, Soldering (10 seconds) . . . . . . . . . 300°C

IR Reflow, Peak Temperature . . . . . . . . . . . . . . . . . . . 220°C

NOTES

1

Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.

2

Overvoltages at IN, S or D will be clamped by internal diodes. Current should be

limited to the maximum ratings given.

PIN CONFIGURATIONS

8-Lead SOT-23

(RT-8)

8-Lead Micro-SOIC

(RM-8)

ORDERING GUIDE

Branding

Model Temperature Range Information*Package Description Package Option

ADG619BRM –40°C to +85°C SVB Micro-SOIC (microSmall Outline IC) RM-8
ADG619BRT –40°C to +85°C SVB SOT-23 (Plastic Surface Mount) RT-8
ADG620BRM –40°C to +85°C SWB Micro-SOIC (microSmall Outline IC) RM-8
ADG620BRT –40°C to +85°C SWB SOT-23 (Plastic Surface Mount) RT-8

*Branding on SOT-23 and Micro-SOIC packages is limited to three characters due to space constraints.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG619/ADG620 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.

–4–

REV. 0

ADG619/ADG620

TERMINOLOGY

Mnemonic Description

V

DD

V

SS

GND Ground (0 V) Reference
I

DD

I

SS

S Source Terminal. May be an input or output.
D Drain Terminal. May be an input or output.
IN Logic Control Input
R

ON

DR

ON

R

FLAT(ON)

(OFF) Source Leakage Current With the Switch “OFF”

I

S

I

, IS (ON) Channel Leakage Current With the Switch “ON”

D

) Analog Voltage on Terminals D, S

V

D (VS

V

INL

V

INH

I

INL(IINH

C
C
t

ON

t

OFF

t

MBB

t

BBM

) Input Current of the Digital Input

(OFF) “OFF” Switch Source Capacitance

S

, CS (ON) “ON” Switch Capacitance

D

Charge Injection A Measure of the Glitch Impulse Transfered From the Digital Input to the Analog Output During Switching
Crosstalk A Measure of Unwanted Signal that is Coupled Through From One Channel to Another as a Result of

Off Isolation A Measure of Unwanted Signal Coupling Through an “OFF” Switch
Bandwidth The Frequency Response of the “ON” Switch
Insertion Loss The Loss Due to the ON Resistance of the Switch

Most Positive Power Supply Potential
Most Negative Power Supply in a Dual Supply Application. In single supply applications, this should be
tied to ground at the device.

Positive Supply Current
Negative Supply Current

Ohmic Resistance Between D and S
On Resistance Match Between Any Two Channels, i.e., RON Max – R

ON

Min.
Flatness is Defined as the Difference Between the Maximum and Minimum Value of On Resistance as
Measured Over the Specified Analog Signal Range.

Maximum Input Voltage for Logic “0”
Minimum Input Voltage for Logic “1”

Delay Between Applying the Digital Control Input and the Output Switching On
Delay Between Applying the Digital Control Input and the Output Switching Off
“ON” Time, Measured Between the 80% Points of Both Switches, When Switching From One Address
State to Another
“OFF” Time or “ON” Time Measured Between the 90% Points of Both Switches, When Switching from
One Address State to Another

Parasitic Capacitance

Typical Performance Characteristics

18

16

14

12

10

8

6

ON RESISTANCE – ⍀

4

2

0

0

TPC 2. On Resistance vs. VD (VS) –
Single Supply

ON RESISTANCE – ⍀

8

7

6

5

4

3

2

1

0

–5

TA = 25ⴗC

VDD, VSS = ⴞ4.5V

–4

VDD, VSS = ⴞ2.5V

VDD, VSS = ⴞ3V

VDD, VSS = ⴞ3.3V

VDD, VSS = ⴞ5V

–3 513

–1

–2 2 4

0

VD, VS – V

TPC 1. On Resistance vs. VD (VS) –
Dual Supply

REV. 0

VDD = 2.7V

VDD = 3V

VDD = 3.3V

VDD = 4.5V

VDD = 5V

15

2
VD, VS – V

TA = 25ⴗC

= 0V

V

SS

34

6

5

4

3

2

ON RESISTANCE – ⍀

V

= +5V

DD

1

= –5V

V

SS

0

–35

–5

–224

–4

TPC 3. On Resistance vs. VD (VS) for

Different Temperatures – Dual Supply

–5–

TA = +85ⴗC

TA = +25ⴗC

TA = –40ⴗC

–1

0

VD, VS – V

13

ADG619/ADG620–Typical Performance Characteristics

10

9

8

7

6

5

4

3

ON RESISTANCE – ⍀

VDD = 5V

2

= 0V

V

SS

1

0

0

TA = +85ⴗC

TA = +25ⴗC

TA = –40ⴗC

2
VD, VS – V

34

15

TPC 4. On Resistance vs. VD (VS) for

Different Temperatures – Single Supply

250

TA = 25ⴗC

CHARGE INJECTION – pC

200

150

100

50

0

–5

–4

VDD ⴝ +5V

ⴝ –5V

V

SS

VDD ⴝ 5V

ⴝ 0V

V

SS

–2 –1

–35

01234

VS – V

TPC 7. Charge Injection vs. Source
Voltage

0.5
VDD = +5V

0.4

= –5V

V

SS

= ⴞ4.5V

V

D

0.3

= ⴟ4.5V

V

S

0.2

0.1

0

–0.1

–0.2

LEAKAGE CURRENTS – nA

–0.3

–0.4

–0.5

10

0

20 60 70 8050

30 40

TEMPERATURE – ⴗC

TPC 5. Leakage Currents vs.
Temperature – Dual Supply

180

160

140

120

100

80

TIME – ns

60

40

20

0
–40 –20

TPC 8. tON/t

VDD ⴝ 5V

ⴝ 0V

V

SS

t

ON

t

OFF

VDD ⴝ 5V

ⴝ 0V

V

SS

020

TEMPERATURE – C

Times vs. Temperature

OFF

IS (OFF)

40

ID, IS (ON)

VDD ⴝ +5V

ⴝ –5V

V

SS

ⴝ +5V

V

DD

ⴝ –5V

V

SS

60

0.5
VDD = 5V

0.4

= 0V

V

SS

= 4.5V/1V

V

D

0.3

= 1V/4.5V

V

S

0.2

0.1

0

–0.1

–0.2

LEAKAGE CURRENTS – nA

–0.3

–0.4

0

–0.5

10

0

20 60 70 8050

ID, IS (ON)

IS (OFF)

30 40

TEMPERATURE – ⴗC

0

TPC 6. Leakage Currents vs.
Temperature – Single Supply

–10

–20

–30

–40

–50

–60

–70

ALTERNATION – dB

–80

–90

–100

80

0.03

1 10 100

FREQUENCY – MHz

VDD = +5V

= –5V

V

SS

= 25ⴗC

T

A

TPC 9. Off Isolation vs. Frequency

–10

–20

–30

–40

–50

–60

ATTENUATION – dB

–70

–80

0.2 10010

1

FREQUENCY – MHz

VDD = +5V

= –5V

V

SS

= 25ⴗC

T

A

TPC 10. Crosstalk vs. Frequency

0

VDD = +5V

–2

= –5V

V

SS

= 25ⴗC

T

A

–4

–6

–8

ATTENUATION – dB

–10

–12

0.2 1000

10

1 100

FREQUENCY – MHz

TPC 11. On Response vs. Frequency

–6–

REV. 0

TEST CIRCUITS

ADG619/ADG620

I

DS

V1

SD

V

S

RON = V1/ I

DS

Test Circuit 1. On Resistance

0.1␮F

SD

V

S

V

S1

V

S2

V

IN

V

0.1␮F

V

S1

S2

IN

IN

V

V

DD

DD

GND

DD

DD

GND

IS (OFF) ID (OFF)

V

S

Test Circuit 2. Off Leakage

V

SS

0.1␮F

V

SS

R

L

300⍀

SD

V

OUT

C

L

35pF

V

D

NC

SD

Test Circuit 3. On Leakage

V

IN

V

OUT

50% 50%

90%

t

ON

90%

t

OFF

ID (ON)

A

V

D

Test Circuit 4. Switching Times

V

SS

0.1␮F

V

V

SS

D2

D

R

L2

300⍀

C

L2

35pF

V

OUT

IN

V

OUT

50% 50%

0V

90% 90%

0V

t

BBM

t

BBM

Test Circuit 5. Break-Before-Make Time Delay, t

V

V

DD

0.1␮F

V

D

IN

V

IN

SS

0.1␮F

V

V

DD

GND

SS

R

V

L1

S1

R

L2

300⍀

C

35pF

300⍀

L2

C

L1

35pF

V

S1

Test Circuit 6. Make-Before-Break Time Delay, t

V

V

DD

SS

V

V

DD

SS

R

S

V

S

DS

IN

C
1nF

L

GND

V

IN

V

S2

OUT

V

OUT

S1

(ADG619 Only)

BBM

V

IN

0V

V

S1

80%V

V

S2

(ADG620 Only)

MBB

Q

= CL ∆V

ⴛ

INJ

50% 50%

80%V

D

t

MBB

∆V

OUT

∆V

OUT

OUT

D

Test Circuit 7. Charge Injection

REV. 0

–7–

ADG619/ADG620

V

DD

0.1␮F

V

DD

IN

V

IN

S

GND

OFF ISOLATION = 20 LOG

Test Circuit 8. Off Isolation

V

DD

0.1␮F

V

DD

IN

V

IN

S

GND

V

SS

0.1␮F

V

SS

50⍀

D

V

OUT

V

S

NETWORK

ANALYZER

50⍀

V

S

V

OUT

R

L

50⍀

NETWORK

ANALYZER

V

OUT

CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG

R
50⍀

50⍀

V

S

V

V

DD

0.1␮F

V

IN

SS

0.1␮F

V

SS

DD

S1

S2

GND

D

R
50⍀

V

OUT

V

S

C02617–.8–10/01(0)

Test Circuit 10. Channel-to-Channel Crosstalk

V

SS

0.1␮F

V

SS

D

NETWORK

ANALYZER

50⍀

V

S

V

OUT

R

L

50⍀

INSERTION LOSS = 20 LOG

8-Lead Micro-SOIC Package

0.122 (3.10)

0.114 (2.90)

PIN 1

0.0256 (0.65) BSC

SEATING

PLANE

85

0.120 (3.05)

0.112 (2.84)

0.122 (3.10)

0.114 (2.90)

0.006 (0.15)

0.002 (0.05)

V

WITH SWITCH

OUT

WITHOUT SWITCH

V

S

Test Circuit 9. Bandwidth

(RM-8)

0.199 (5.05)

0.187 (4.75)

41

0.120 (3.05)

0.112 (2.84)

33ⴗ
27ⴗ

0.018 (0.46)

0.008 (0.20)

0.043 (1.09)

0.037 (0.94)

0.011 (0.28)

0.003 (0.08)

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

8-Lead Plastic Surface Mount Package

0.071 (1.80)

0.059 (1.50)

PIN 1

0.051 (1.30)

0.028 (0.71)

0.016 (0.41)

0.035 (0.90)

0.006 (0.15)

0.000 (0.00)

0.122 (3.10)

0.110 (2.80)

8

7

1 3

2

0.077
(1.95)

BSC

0.015 (0.38)

0.009 (0.22)

5 6

4

0.026
(0.65) BSC

(RT-8)

0.057 (1.45)

0.035 (0.90)

SEATING
PLANE

0.009 (0.23)

0.003 (0.08)

10ⴗ

PRINTED IN U.S.A.

0ⴗ

0.022 (0.55)

0.014 (0.35)

–8–

REV. 0