ANALOG DEVICES ADG619 Service Manual

CMOS, ±5 V/+5 V,

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FEATURES

6.5 Ω (maximum) on resistance

0.8 Ω (maximum) on-resistance flatness

2.7 V to 5.5 V single supply ±2.7 V to ±5.5 V dual supply Rail-to-rail operation 8-lead SOT-23, 8-lead MSOP Typical power consumption (<0.1 μW) TTL-/CMOS-compatible inputs

APPLICATIONS

Automatic test equipment Power routing Communication systems Data acquisition systems Sample-and-hold systems Avio nics Relay replacement Battery-powered systems

4 Ω, Single SPDT Switches

ADG619/ADG620

FUNCTIONAL BLOCK DIAGRAM

ADG619/ADG620

S2

S1

IN

NOTES

1. SWITCHES SHOWN FOR A LOGIC 1 INPUT.

Figure 1.

D

02617-001

GENERAL DESCRIPTION

The ADG619/ADG620 are monolithic, CMOS single-pole double-throw (SPDT) switches. Each switch conducts equally well in both directions when the device is on.

The ADG619/ADG620 offer a low on resistance of 4 Ω, which

tched to within 0.7 Ω between channels. These switches

is ma also provide low power dissipation, yet result in high switching speeds. The ADG619 exhibits break-before-make switching action, thus preventing momentary shorting when switching channels. The ADG620 exhibits make-before-break action.

The ADG619/ADG620 are available in an 8-lead SOT-23 and an

8-lead MSOP.

PRODUCT HIGHLIGHTS

1. Low on resistance (R

2. Dual ±2.7 V t

3. L

ow power dissipation.

4. Fa

st t

5. T

iny, 8-lead SOT-23 and 8-lead MSOP.

o ±5.5 V or single 2.7 V to 5.5 V supplies.

.

ON/tOFF

Table 1. Truth Table for the ADG619/ADG620

IN Switch S1 Switch S2

0 On Off

1 Off On

): 4 Ω typical.

ON

Rev. C

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

ADG619/ADG620

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REVISION HISTORY

3/07—Rev. B to Rev. C

Changes to Specifications................................................................ 3

1/06—Rev. A to Rev. B Ch

anges to R

Updated Outline Dimensions....................................................... 13

Changes to Ordering Guide.......................................................... 13

6/03—Rev. 0 to Rev. A.

E

dits to Specifications...................................................................... 2

Changes to Ordering Guide............................................................ 4

Updated Outline Dimensions......................................................... 8

Values in Table 2................................................... 2

ON

ESD Caution...................................................................................6

Pin Configurations and Function Descriptions............................7

Typical Performance Characteristics..............................................8

Terminology.................................................................................... 10

Test Circuits..................................................................................... 11

Outline Dimensions....................................................................... 13

Ordering Guide............................................................................... 14

Rev. C | Page 2 of 16

ADG619/ADG620

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SPECIFICATIONS

DUAL SUPPLY

VDD = +5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V. All specifications −40°C to +85°C, unless otherwise noted.

Table 2.

B Version

1

Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range VSS to VDD V VDD = +4.5 V, VSS = −4.5 V On Resistance (RON) 4 Ω typ VS = ±4.5 V, IDS = −10 mA; see Figure 15

6.5 8.5 Ω max RON Match Between Channels (∆RON) 0.7 Ω typ VS = ±4.5 V, IDS = −10 mA

1.1 1.35 Ω max On-Resistance Flatness (R

) 0.7 0.8 Ω typ VS = ±3.3 V, IDS = −10 mA

FLAT (ON)

1.35 1.4 Ω max

LEAKAGE CURRENTS VDD = +5.5 V, VSS = −5.5 V

Source Off Leakage, IS (Off)

±0.01

nA typ

= ±4.5 V, VD = ∓ 4.5 V; see Figure 16

V

S

±0.25 ±1 nA max Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = ±4.5 V; see Figure 17 ±0.25 ±1 nA max

DIGITAL INPUTS

Input High Voltage, V Input Low Voltage, V Input Current, I

INL

2.4 V min

INH

0.8 V max

INL

or I

0.005 µA typ VIN = V

INH

INL

or V

INH

±0.1 A max Digital Input Capacitance, CIN 2 pF typ

DYNAMIC CHARACTERISTICS

2

ADG619

tON 80 ns typ RL = 300 Ω, CL = 35 pF 120 155 ns max VS = 3.3 V; see Figure 18 t

45 ns typ RL = 300 Ω, CL = 35 pF

OFF

75 90 ns max VS = 3.3 V; see Figure 18 Break-Before-Make Time Delay, t

40 ns typ RL = 300 Ω, CL = 35 pF

BBM

10 ns min VS1 = VS2 = 3.3 V; see Figure 19 ADG620

tON 40 ns typ RL = 300 Ω, CL = 35 pF 65 85 ns max VS = 3.3 V; see Figure 18 t

200 ns typ RL = 300 Ω, CL = 35 pF

OFF

330 400 ns max VS = 3.3 V; see Figure 18

Make-Before-Break Time Delay, t

160 ns typ RL = 300 Ω, CL = 35 pF

MBB

10 ns min VS = 0 V; see Figure 20 Charge Injection 110 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 21 Off Isolation −67 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 22 Channel-to-Channel Crosstalk −67 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 23 Bandwidth −3 dB 190 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 24 CS (Off) 25 pF typ f = 1 MHz CD, CS (On) 95 pF typ f = 1 MHz

Rev. C | Page 3 of 16

ADG619/ADG620

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B Version Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments

POWER REQUIREMENTS VDD = +5.5 V, VSS = −5.5 V

IDD 0.001 A typ Digital inputs = 0 V or 5.5 V

1.0 A max ISS 0.001 A typ Digital inputs = 0 V or 5.5 V

1.0 A max

1

Temperature range for B version is −40°C to +85°C.

2

Guaranteed by design, not subject to production test.

1

Rev. C | Page 4 of 16

ADG619/ADG620

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SINGLE SUPPLY

VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V. All specifications −40°C to +85°C, unless otherwise noted.

Table 3.

B Version

1

Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 V to VDD V VDD = 4.5 V, VSS = 0 V On Resistance (RON) 7 Ω typ VS = 0 V to 4.5 V, IDS = −10 mA; see Figure 15 10 12.5 Ω max RON Match Between Channels (∆RON) 0.8 Ω typ VS = 0 V to 4.5 V, IDS = −10mA

1.1 1.3 Ω max On-Resistance Flatness (R

) 0.5 0.5 Ω typ VS = 1.5 V to 3.3 V, IDS = −10 mA

FLAT (ON)

1.2 Ω max

LEAKAGE CURRENTS VDD = 5.5 V

Source Off Leakage, IS (Off) ±0.01 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 16 ±0.25 ±1 nA max Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = 1 V/4.5 V; see Figure 17 ±0.25 ±1 nA max

DIGITAL INPUTS

Input High Voltage, V Input Low Voltage, V Input Current, I

INL

2.4 V min

INH

0.8 V max

INL

or I

0.005 µA typ VIN = V

INH

INL

or V

INH

±0.1 µA max Digital Input Capacitance, CIN 2 pF typ

DYNAMIC CHARACTERISTICS

2

ADG619

tON 120 ns typ RL = 300 Ω, CL = 35 pF 220 280 ns max VS = 3.3 V; see Figure 18 t

50 ns typ RL = 300 Ω, CL = 35 pF

OFF

75 110 ns max VS = 3.3 V; see Figure 18 Break-Before-Make Time Delay, t

70 ns typ RL = 300 Ω, CL = 35 pF

BBM

10 ns min VS1 = VS2 = 3.3 V; see Figure 19 ADG620

tON 50 ns typ RL = 300 Ω, CL = 35 pF 85 110 ns max VS = 3.3 V; see Figure 18 t

210 ns typ RL = 300 Ω, CL = 35 pF

OFF

340 420 ns max VS = 3.3 V; see Figure 18 Make-Before-Break Time Delay, t

170 ns typ RL = 300 Ω, CL = 35 pF

MBB

10 ns min VS = 3.3 V; see Figure 20 Charge Injection 6 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 21 Off Isolation −67 dB typ

= 50 Ω, CL = 5 pF, f = 1 MHz; see Figure

R

L

22

Channel-to-Channel Crosstalk −67 dB typ

= 50 Ω, CL = 5 pF, f = 1 MHz; see Figure

R

L

23 Bandwidth −3 dB 190 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 24 CS (OFF) 25 pF typ f = 1 MHz CD, CS (ON) 95 pF typ f = 1 MHz

POWER REQUIREMENTS VDD = 5.5 V

IDD 0.001 A typ Digital inputs = 0 V or 5.5 V

1.0 A max

1

Temperature range for B version is −40°C to +85°C.

2

Guaranteed by design, not subject to production test.

Rev. C | Page 5 of 16

ANALOG DEVICES ADG619 Service Manual

FEATURES

APPLICATIONS

FUNCTIONAL BLOCK DIAGRAM

GENERAL DESCRIPTION

PRODUCT HIGHLIGHTS

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

DUAL SUPPLY

SINGLE SUPPLY