1 pC Charge Injection, 100 pA Leakage,
IN1
IN2
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
ADG611
IN1
IN2
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
ADG612
IN1
IN2
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
ADG613
SWITCHES SHOWN FOR A LOGIC “1” INPUT
a
CMOS ⴞ 5 V/+5 V/+3 V Quad SPST Switches
FEATURES
1 pC Charge Injection
ⴞ 2.7 V to ⴞ 5.5 V Dual Supply
+2.7 V to +5.5 V Single Supply
Automotive Temperature Range –40ⴗ C to +125ⴗC
100 pA Max @ 25ⴗ C Leakage Currents
85 ⍀ On-Resistance
Rail-to-Rail Switching Operation
Fast Switching Times
16-Lead TSSOP Packages
Typical Power Consumption (<0.1 W)
TTL/CMOS-Compatible Inputs
APPLICATIONS
Automatic Test Equipment
Data Acquisition Systems
Battery-Powered Systems
Communication Systems
Sample and Hold Systems
Audio Signal Routing
Relay Replacement
Avionics
ADG611/ADG612/ADG613
FUNCTIONAL BLOCK DIAGRAMS
GENERAL DESCRIPTION
The ADG611, ADG612, and ADG613 are monolithic CMOS
devices containing four independently selectable switches. These
switches offer ultralow charge injection of 1 pC over full input
signal range and typical leakage currents of 10 pA at 25°C.
They are fully specified for ± 5 V, +5 V, and +3 V supplies.
They contain four independent single-pole/single-throw (SPST)
switches. The ADG611 and ADG612 differ only in that the
digital control logic is inverted. The ADG611 switches are turned
on with a logic low on the appropriate control input, while a logic
high is required to turn on the switches of the ADG612. The
ADG613 contains two switches whose digital control logic is
similar to the ADG611, while the logic is inverted on the other
two switches.
Each switch conducts equally well in both directions when ON
and has an input signal range that extends to the supplies. The
ADG613 exhibits break-before-make switching action. The
ADG611/ADG612/ADG613 are available in small 16-lead
TSSOP packages.
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Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
PRODUCT HIGHLIGHTS
1. Ultralow Charge Injection (1 pC typically)
2. Dual ± 2.7 V to ± 5.5 V or Single +2.7 V to +5.5 V
Operation.
3. Automotive Temperature Range, –40° C to +125°C
4. Small 16-lead TSSOP package.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2002
ADG611/ADG612/ADG613–SPECIFICATIONS
1
DUAL SUPPLY
Parameter 25ⴗC to +85ⴗC to +125ⴗ C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range V
On-Resistance (R
On-Resistance Match Between 2 Ω typ
Channels (∆R
On-Resistance Flatness (R
LEAKAGE CURRENTS V
Source OFF Leakage I
Drain OFF Leakage I
Channel ON Leakage I
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current
or I
I
INL
INH
CIN, Digital Input Capacitance 2 pF typ
DYNAMIC CHARACTERISTICS
t
ON
t
OFF
Break-Before-Make Time Delay, t
Charge Injection –0.5 pC typ V
Off Isolation –65 dB typ R
Channel-to-Channel Crosstalk –90 dB typ R
–3 dB Bandwidth 680 MHz typ R
C
(OFF) 5 pF typ f = 1 MHz
S
(OFF) 5 pF typ f = 1 MHz
C
D
CD, CS (ON) 5 pF typ f = 1 MHz
POWER REQUIREMENTS V
I
DD
I
SS
NOTES
1
Temperature range is as follows. Y Version: –40° C to +125° C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(VDD = +5 V ⴞ 10%, VSS = –5 V ⴞ 10%, GND = 0 V, unless otherwise noted.)
Y Version
–40ⴗ C –40ⴗC
to V
SS
)8 5 Ω typ VS = ± 3 V, IS = –1 mA
ON
DD
V
115 140 160 Ω max Test Circuit 1
) 4 5.5 6.5 Ω max VS = ± 3 V, IS = –1 mA
ON
FLAT(ON)
)2 5 Ω typ VS = ± 3 V, IS = –1 mA
40 55 60 Ω max
= +5.5 V, VSS = –5.5 V
(OFF) ± 0.01 nA typ VD = ± 4.5 V, VS = ⫿ 4.5 V;
S
DD
± 0.1 ± 0.25 ± 2 nA max Test Circuit 2
(OFF) ± 0.01 nA typ VD = ± 4.5 V, VS = ⫿ 4.5 V;
D
± 0.1 ± 0.25 ± 2 nA max Test Circuit 2
, IS (ON) ± 0.01 nA typ VD = VS = ± 4.5 V, Test Circuit 3
D
± 0.1 ± 0.25 ± 6 nA max
INH
INL
0.005 µA typ V IN = V
2.4 V min
0.8 V max
INL
or V
INH
± 0.1 µ A max
2
45 ns typ RL = 300 Ω , CL = 35 pF
65 75 90 ns max V
= 3.0 V, Test Circuit 4
S
25 ns typ RL = 300 Ω , CL = 35 pF
40 45 50 ns max V
D
15 ns typ RL = 300 Ω , CL = 35 pF
10 ns min V
= 3.0 V, Test Circuit 4
S
= VS2 = 3.0 V, Test Circuit 5
S1
= 0 V, RS = 0 Ω,
S
C
= 1 nF, Test Circuit 6
L
= 50 Ω , CL = 5 pF,
L
f = 10 MHz, Test Circuit 7
= 50 Ω , CL = 5 pF,
L
f = 10 MHz, Test Circuit 8
= 50 Ω , CL = 5 pF,
L
Test Circuit 9
= +5.5 V, VSS = –5.5 V
DD
0.001 µA typ Digital Inputs = 0 V or 5.5 V
1.0 µ A max
0.001 µA typ Digital Inputs = 0 V or 5.5 V
1.0 µ A max
–2–
REV. 0
ADG611/ADG612/ADG613
1
SINGLE SUPPLY
Parameter 25ⴗC to +85ⴗC to +125ⴗC Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
On-Resistance (R
On-Resistance Match Between 3 Ω typ V
Channels (∆R ON)1 0 1 2 1 3Ω max
LEAKAGE CURRENTS V
Source OFF Leakage I
Drain OFF Leakage I
Channel ON Leakage I
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current
or I
I
INL
INH
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS
t
ON
t
OFF
Break-Before-Make Time Delay, t
Charge Injection 1 pC typ V
Off Isolation –62 dB typ R
Channel-to-Channel Crosstalk –90 dB typ R
–3 dB Bandwidth 680 MHz typ R
C
(OFF) 5 pF typ f = 1 MHz
S
(OFF) 5 pF typ f = 1 MHz
C
D
CD, CS (ON) 5 pF typ f = 1 MHz
POWER REQUIREMENTS V
I
DD
NOTES
1
Temperature ranges are as follows. Y Version: –40° C to +125° C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(VDD = 5 V ⴞ 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.)
Y Version
ⴗ
C –40ⴗC
–40
0 V to VDDV
) 210 Ω typ VS = 3.5 V, IS = –1 mA;
ON
290 350 380 Ω max Test Circuit 1
= 3.5 V , IS = –1 mA
S
= 5.5 V
(OFF) ± 0.01 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V;
S
DD
± 0.1 ± 0.25 ± 2 nA max Test Circuit 2
(OFF) ± 0.01 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V;
D
± 0.1 ± 0.25 ± 2 nA max Test Circuit 2
, IS (ON) ± 0.01 nA typ VS = VD = 1 V or 4.5 V, Test Circuit 3
D
± 0.1 ± 0.25 ± 6 nA max
INH
INL
0.005 µ A typ VIN = V
2
2
2 pF typ
2.4 V min
0.8 V max
± 0.1 µ A max
INL
or V
INH
70 ns typ RL = 300 Ω , CL = 35 pF
100 130 150 ns max V
= 3.0 V, Test Circuit 4
S
25 ns typ RL = 300 Ω , CL = 35 pF
40 45 50 ns max V
D
25 ns typ RL = 300 Ω , CL = 35 pF
10 ns min V
= 3.0 V, Test Circuit 4
S
= VS2 = 3.0 V, Test Circuit 5
S1
= 0 V, RS = 0 Ω , CL = 1 nF;
S
Test Circuit 6
= 50 Ω , CL = 5 pF, f = 10 MHz
L
Test Circuit 7
= 50 Ω , CL = 5 pF, f = 10 MHz
L
Test Circuit 8
= 50 Ω , CL = 5 pF, Test Circuit 9
L
= 5.5 V
DD
0.001 µ A typ Digital Inputs = 0 V or 5.5 V
1.0 µ A max
REV. 0
–3–
ADG611/ADG612/ADG613–SPECIFICATIONS
1
SINGLE SUPPLY
Parameter 25ⴗC to +85ⴗC to +125ⴗC Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
On-Resistance (R
LEAKAGE CURRENTS V
Source OFF Leakage I
Drain OFF Leakage I
Channel ON Leakage I
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current
or I
I
INL
INH
CIN, Digital Input Capacitance 2 pF typ
DYNAMIC CHARACTERISTICS
t
ON
t
OFF
Break-Before-Make Time Delay, t
Charge Injection 1.5 pC typ V
Off Isolation –62 dB typ R
Channel-to-Channel Crosstalk –90 dB typ R
–3 dB Bandwidth 680 MHz typ R
C
(OFF) 5 pF typ f = 1 MHz
S
(OFF) 5 pF typ f = 1 MHz
C
D
CD, CS (ON) 5 pF typ f = 1 MHz
POWER REQUIREMENTS V
I
DD
NOTES
1
Temperature ranges are as follows. Y Version: –40° C to +125° C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(VDD = 3 V ⴞ 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.)
Y Version
–40
ⴗ
C –40ⴗC
0 V to VDDV
) 380 420 460 Ω typ VS = 1.5 V, IS = –1 mA;
ON
Test Circuit 1
= 3.3 V
(OFF) ± 0.01 nA typ VS = 1 V/3 V, VD = 3 V/1 V;
S
DD
± 0.1 ± 0.25 ± 2 nA max Test Circuit 2
(OFF) ± 0.01 nA typ VS = 1 V/3 V, VD = 3 V/1 V;
D
± 0.1 ± 0.25 ± 2 nA max Test Circuit 2
, IS (ON) ± 0.01 nA typ VS = VD = 1 V or 3 V, Test Circuit 3
D
± 0.1 ± 0.25 ± 6 nA max
INH
INL
0.005 µ A typ VIN = V
2.0 V min
0.8 V max
INL
or V
INH
± 0.1 µ A max
2
130 ns typ RL = 300 Ω , CL = 35 pF
185 230 260 ns max V
= 2 V, Test Circuit 4
S
40 ns typ RL = 300 Ω , CL = 35 pF
55 60 65 ns max V
D
50 ns typ RL = 300 Ω , CL = 35 pF
10 ns min V
= 2 V, Test Circuit 4
S
= VS2 = 2 V, Test Circuit 5
S1
= 0 V, RS = 0 Ω , CL = 1 nF;
S
Test Circuit 6
= 50 Ω , CL = 5 pF, f = 10 MHz
L
Test Circuit 7
= 50 Ω , CL = 5 pF, f = 10 MHz
L
Test Circuit 8
= 50 Ω , CL = 5 pF, Test Circuit 9
L
= 3.3 V
DD
0.001 µ A typ Digital Inputs = 0 V or 3.3 V
1.0 µ A max
–4–
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