Low on resistance, 2.5 Ω maximum
<0.65 Ω on-resistance flatness
Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V supplies
Rail-to-rail input signal range
Tiny, 6-lead SOT-23; 8-lead MSOP; and 820 μm × 2255 μm die
Low power consumption
TTL-/CMOS-compatible inputs
APPLICATIONS
Automatic test equipment
Power routing
Communication systems
Data acquisition systems
Sample-and-hold systems
Avio nics
Relay replacement
Battery-powered systems
GENERAL DESCRIPTION
The ADG601/ADG602 are monolithic, CMOS single-pole
single-throw (SPST) switches with on resistance typically less
than 2.5 Ω. The low on-resistance flatness makes the
ADG601/ADG602 ideally suited to many applications,
particularly those requiring low distortion. These switches are
ideal replacements for mechanical relays because they are more
reliable, have lower power requirements, and are available in
much smaller package sizes.
The ADG601 is a normally open (NO) switch, and the ADG602
is a n
ormally closed (NC) switch. Each switch conducts equally
SPST Switches
ADG601/ADG602
FUNCTIONAL BLOCK DIAGRAMS
DS
IN
ADG601
NOTES
1. SWIT CHES SHOWN FOR A LOG IC 0 INPUT .
Figure 1.
Table 1. Truth Table
ADG601 IN ADG602 IN Switch Condition
0 1 Off
1 0 On
well in both directions when the device is on, with the input
signal range extending to the supply rails.
The switches are available in tiny, 6-lead SOT-23; 8-lead MSOP;
a
nd 820 μm × 2255 μm die.
ADG602
PRODUCT HIGHLIGHTS
1. Low on resistance (2 Ω typical)
2. Dual ±2.7 V t
iny, 6-lead SOT-23; 8-lead MSOP; and 820 μm × 2255 μm die
3. T
4. R
ail-to-rail input signal range
o ±5.5 V or single +2.7 V to +5.5 V supplies
DS
IN
02619-001
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
VDD = 5 V ± 10%, VSS = –5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 2.
B Version
Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range VSS to VDD V VDD = +4.5 V, VSS = –4.5 V
On Resistance (RON) 2 Ω typ VS = ±4.5 V, IDS = −10 mA; see Figure 15
2.5 5.5 Ω max
On-Resistance Flatness (R
0.6 0.65 Ω max
LEAKAGE CURRENTS VDD = +5.5 V, VSS = −5.5 V
Source Off Leakage, IS (Off) ±0.01 nA typ VS = +4.5 V/−4.5 V, VD = −4.5 V/+4.5 V; see Figure 16
±0.25 ±1 nA max
Drain Off Leakage, ID (Off) ±0.01 nA typ VS = +4.5 V/−4.5 V, VD = −4.5 V/+4.5 V; see Figure 16
±0.25 ±1 nA max
Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = +4.5 V or −4.5 V; see Figure 17
±0.25 ±1 nA max
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current, I
±0.1 μA max
Digital Input Capacitance, CIN 2 pF typ
DYNAMIC CHARACTERISTICS2
tON 80 ns typ RL = 300 Ω, CL = 35 pF
120 155 ns max VS = 3.3 V; see Figure 18
t
45 ns typ RL = 300 Ω, CL = 35 pF
OFF
75 90 ns max VS = 3.3 V; see Figure 18
Charge Injection 250 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19
Off Isolation −60 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 20
Bandwidth −3 dB 180 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 21
CS (Off) 50 pF typ f = 1 MHz
CD (Off) 50 pF typ f = 1 MHz
CD, CS (On) 145 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = +5.5 V, VSS = −5.5 V
IDD 0.001 μA typ Digital inputs = 0 V or 5.5 V
1.0 μA max
ISS 0.001 μA typ Digital inputs = 0 V or 5.5 V
1.0 μA max
1
Temperature range for B version is −40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to VDD V VDD = 4.5 V
On Resistance (RON) 3.5 Ω typ VS = 0 V to 4.5 V, IDS = −10 mA; see Figure 15
5 8 Ω max
On-Resistance Flatness (R
) 0.2 0.2 Ω typ VS = 1.5 V to 3.3 V, IDS = –10 mA
FLAT (ON)
0.6 Ω max
LEAKAGE CURRENTS VDD = 5.5 V
Source Off Leakage, IS (Off) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 16
±0.25 ±1 nA max
Drain Off Leakage, ID (Off) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 16
±0.25 ±1 nA max
Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = 4.5 V or 1 V; see Figure 17
±0.25 ±1 nA max
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Current, I
INL
2.4 V min
INH
0.8 V max
INL
or I
0.005 μA typ VIN = V
INH
INL
or V
INH
±0.1 μA max
Digital Input Capacitance, CIN 2 pF typ
DYNAMIC CHARACTERISTICS2
tON 110 ns typ RL = 300 Ω, CL = 35 pF
220 280 ns max VS = 3.3 V; see Figure 18
t
50 ns typ RL = 300 Ω, CL = 35 pF
OFF
80 110 ns max VS = 3.3 V; see Figure 18
Charge Injection 20 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19
Off Isolation −60 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 20
Bandwidth –3 dB 180 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 21
CS (Off) 50 pF typ f = 1 MHz
CD (Off) 50 pF typ f = 1 MHz
CD, CS (On) 145 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 5.5 V
IDD 0.001 μA typ Digital inputs = 0 V or 5.5 V
1.0 μA max
1
Temperature range for B version is −40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Rev. C | Page 4 of 12
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