ANALOG DEVICES ADG5208 Service Manual

4-/8-Channel Multiplexers

ADG5208/ADG5209

Rev. A

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Trad emarks and registered trademarks are the property of their respective owners.

ADG5208

S1

S8

D

1-OF-8

DECODER

A0 A1 A2 EN

ADG5209

S1A

S4A

DA

S1B

S4B

DB

1-OF-4

DECODER

A0 A1

EN

09917-001

Data Sheet

FEATURES

Latch-up proof

5.5 pF off source capacitance 52 pF off drain capacitance

0.4 pC charge injection Low on resistance: 160 Ω typical ±9 V to ±22 V dual-supply operation 9 V to 40 V single-supply operation 48 V supply maximum ratings Fully specified at ±15 V, ±20 V, +12 V, and +36 V V

to VDD analog signal range

SS

Human body model (HBM) ESD rating

4 kV I/O port to supplies 1 kV I/O port to I/O port 4 kV all other pins

APPLICATIONS

Automatic test equipment Data acquisition Instrumentation Avionics Audio and video switching Communication systems

High Voltage, Latch-Up Proof,

FUNCTIONAL BLOCK DIAGRAMS

Figure 1.

GENERAL DESCRIPTION

The ADG5208/ADG5209 are monolithic CMOS analog multiplexers comprising eight single channels and four differential channels, respectively. The ADG5208 switches one of eight inputs to a common output, as determined by the 3-bit binary address lines, A0, A1, and A2. The ADG5209 switches one of four differential inputs to a common differential output, as determined by the 2-bit binary address lines, A0 and A1.

An EN input on both devices enables or disables the device. When EN is disabled, all channels switch off. The ultralow capacitance and charge injection of these switches make them ideal solutions for data acquisition and sample-and-hold applications, where low glitch and fast settling are required. Fast switching speed coupled with high signal bandwidth make these devices suitable for video signal switching.

Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the power supplies. In the off condition, signal levels up to the supplies are blocked.

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

The ADG5208/ADG5209 do not have V

pins; instead, the logic

L

power supply is generated internally by an on-chip voltage generator.

PRODUCT HIGHLIGHTS

1. Tre nch Isolation Guards Against Latch-Up.

A dielectric trench separates the P and N channel transistors to prevent latch-up even under severe overvoltage conditions.

2. 0.4 pC Charge Injection.

3. Dual-Supply Operation.

For applications where the analog signal is bipolar, the

ADG5208/ADG5209 can be operated from dual supplies

of up to ±22 V.

4. Single-Supply Operation.

For applications where the analog signal is unipolar, the

ADG5208/ADG5209 can be operated from a single rail

power supply of up to 40 V.

5. 3 V Logic-Compatible Digital Inputs.

V

= 2.0 V, V

INH

6. No V

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700

Logic Power Supply Required.

L

= 0.8 V.

INL

www.analog.com

ADG5208/ADG5209 Data Sheet

REVISION HISTORY

3/12—Rev. 0 to Rev. A

Added 16-Lead LFCSP ....................................................... Universal

Changes to Ordering Guide ........................................................... 22

7/11—Revision 0: Initial Version

Absolute Maximum Ratings ............................................................9

ESD Caution...................................................................................9

Pin Configurations and Function Descriptions ......................... 10

Typical Performance Characteristics ........................................... 12

Test Circuits ..................................................................................... 16

Terminology .................................................................................... 19

Trench Isolation .............................................................................. 20

Applications Information .............................................................. 21

Outline Dimensions ....................................................................... 22

Ordering Guide .......................................................................... 22

Rev. A | Page 2 of 24

Data Sheet ADG5208/ADG5209

200

250

280

Ω max

VDD = +13.5 V, VSS = −13.5 V

±0.1

±0.2

±0.4

nA max

±0.2

±0.5

±1.4

nA max

205

245

275

ns max

VS = 10 V; see Figure 33

tON (EN)

145

ns typ

RL = 300 Ω, CL = 35 pF

SPECIFICATIONS

±15 V DUAL SUPPLY

VDD = +15 V ± 10%, VSS = −15 V ± 10%, GND = 0 V, unless otherwise noted.

Table 1.

Parameter 25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range VDD to VSS V On Resistance, RON 160 Ω typ VS = ±10 V, IS = −1 mA; see Figure 28

On-Resistance Match Between

Channels, ∆R

ON

3.5 Ω typ V

= ±10 V, IS = −1 mA

S

8 9 10 Ω max On-Resistance Flatness, R

40 Ω typ VS = ±10 V, IS = −1 mA

FL AT (O N)

50 65 70 Ω max

LEAKAGE CURRENTS VDD = +16.5 V, VSS = −16.5 V

Source Off Leakage, IS (Off ) ±0.005 nA typ VS = ±10 V, VD = 10 V; see Figure 30

Drain Off Leakage, ID (Off ) ±0.005 nA typ VS = ±10 V, VD = 10 V; see Figure 30 ±0.1 ±0.4 ±1.4 nA max Channel On Leakage, ID (On), IS (On) ±0.01 nA typ VS = VD = ±10 V; see Figure 27

DIGITAL INPUTS

Input High Voltage, V Input Low Voltage, V Input Current, I

INL

2.0 V min

INH

0.8 V max

INL

or I

0.002 µA typ VIN = V

INH

GND

or VDD ±0.1 µA max Digital Input Capacitance, CIN 3 pF typ

DYNAMIC CHARACTERISTICS1

Transition Time, t

170 ns typ RL = 300 Ω, CL = 35 pF

TRANSITION

185 220 245 ns max VS = 10 V; see Figure 35 t

(EN) 120 ns typ RL = 300 Ω, CL = 35 pF

OFF

145 165 180 ns max VS = 10 V; see Figure 35

Break-Before-Make Time Delay, tD 65 ns typ RL = 300 Ω, CL = 35 pF

30 ns min VS1 = VS2 = 10 V; see Figure 34 Charge Injection, Q

0.4 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF;

INJ

see Figure 36

Off Isolation −90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see

Figure 31

Channel-to-Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see

Figure 29

−3 dB Bandwidth RL = 50 Ω, CL = 5 pF; see Figure 32

ADG5208 54 MHz typ ADG5209 133 MHz typ

Insertion Loss −6.4 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see

Figure 32 CS (Off ) 5.5 pF typ VS = 0 V, f = 1 MHz CD (Off )

ADG5208 52 pF typ VS = 0 V, f = 1 MHz ADG5209 26 pF typ VS = 0 V, f = 1 MHz

Rev. A | Page 3 of 24

ADG5208/ADG5209 Data Sheet

DIGITAL INPUTS

30

ns min

VS1 = VS2 = 10 V; see Figure 34

Parameter 25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments

CD (On), CS (On)

ADG5208 58 pF typ VS = 0 V, f = 1 MHz ADG5209 31 pF typ VS = 0 V, f = 1 MHz

POWER REQUIREMENTS VDD = +16.5 V, VSS = −16.5 V

IDD 45 µA typ Digital inputs = 0 V or VDD

55 70 µA max

ISS 0.001 µA typ Digital inputs = 0 V or VDD

1 µA max

VDD/VSS ±9/±22 V min/V max GND = 0 V

1

Guaranteed by design; not subject to production test.

±20 V DUAL SUPPLY

VDD = +20 V ± 10%, VSS = −20 V ± 10%, GND = 0 V, unless otherwise noted.

Table 2.

Parameter 25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range VDD to VSS V On Resistance, RON 140 Ω typ VS = ±15 V, IS = −1 mA; see Figure 28 160 200 230 Ω max VDD = +18 V, VSS = −18 V On-Resistance Match Between

Channels, ∆R

ON

8 9 10 Ω max On-Resistance Flatness, R

FL AT (O N)

45 55 60 Ω max

LEAKAGE CURRENTS VDD = +22 V, VSS = −22 V

Source Off Leakage, IS (Off ) ±0.005 nA typ VS = ±15 V, VD = 15 V; see Figure 30 ±0.1 ±0.2 ±0.4 nA max Drain Off Leakage, ID (Off ) ±0.005 nA typ VS = ±15 V, VD = 15 V; see Figure 30 ±0.1 ±0.4 ±1.4 nA max Channel On Leakage, ID (On), IS (On) ±0.01 nA typ VS = VD = ±15 V; see Figure 27 ±0.2 ±0.5 ±1.4 nA max

3.5 Ω typ V

= ±15 V, IS = −1 mA

S

34 Ω typ VS = ±15 V, IS = −1 mA

Input High Voltage, V Input Low Voltage, V Input Current, I

INL

±0.1 µA max Digital Input Capacitance, CIN 3 pF typ

DYNAMIC CHARACTERISTICS1

Transition Time, t 195 225 255 ns max VS = 10 V; see Figure 33 tON (EN) 145 ns typ RL = 300 Ω, CL = 35 pF 170 200 225 ns max VS = 10 V; see Figure 35 t

(EN) 120 ns typ RL = 300 Ω, CL = 35 pF

OFF

140 155 170 ns max VS = 10 V; see Figure 35 Break-Before-Make Time Delay, tD 55 ns typ RL = 300 Ω, CL = 35 pF

Charge Injection, Q

Off Isolation −90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see

Channel-to-Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;

2.0 V min

INH

0.8 V max

INL

or I

0.002 µA typ VIN = V

INH

160 ns typ RL = 300 Ω, CL = 35 pF

TRANSITION

0.3 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see

INJ

GND

or VDD

Figure 36

Figure 31

see Figure 29

Rev. A | Page 4 of 24

Data Sheet ADG5208/ADG5209

ADG5208

57

pF typ

VS = 0 V, f = 1 MHz

Parameter

25°C

−40°C to +85°C

−40°C to +125°C

Unit

Test Conditions/Comments

LEAKAGE CURRENTS

VDD = 13.2 V, VSS = 0 V

Parameter 25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments

−3 dB Bandwidth RL = 50 Ω, CL = 5 pF; see Figure 32

ADG5208 60 MHz typ ADG5209 130 MHz typ

Insertion Loss −5.6 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;

see Figure 32 CS (Off ) 5.5 pF typ VS = 0 V, f = 1 MHz CD (Off )

ADG5208 51 pF typ VS = 0 V, f = 1 MHz ADG5209 26 pF typ VS = 0 V, f = 1 MHz

CD (On), CS (On)

ADG5209 31 pF typ VS = 0 V, f = 1 MHz

POWER REQUIREMENTS VDD = +22 V, VSS = −22 V

IDD 50 µA typ Digital inputs = 0 V or VDD 70 110 µA max ISS 0.001 µA typ Digital inputs = 0 V or VDD 1 µA max VDD/VSS ±9/±22 V min/V max GND = 0 V

1

Guaranteed by design; not subject to production test.

12 V SINGLE SUPPLY

VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.

Table 3.

ANALOG SWITCH

Analog Signal Range 0 V to VDD V On Resistance, RON 350 Ω typ VS = 0 V to 10 V, IS = −1 mA; see

Figure 28 500 610 700 Ω max VDD = 10.8 V, VSS = 0 V On-Resistance Match Between

Channels, ∆R

ON

20 22 24 Ω max On-Resistance Flatness, R

FL AT (O N)

280 335 370 Ω max

Source Off Leakage, IS (Off ) ±0.005 nA typ VS = 1 V/10 V, VD = 10 V/1 V; see

±0.1 ±0.2 ±0.4 nA max Drain Off Leakage, ID (Off ) ±0.005 nA typ VS = 1 V/10 V, VD = 10 V/1 V; see

±0.1 ±0.4 ±1.4 nA max

Channel On Leakage, ID (On), IS (On) ±0.01 nA typ VS = VD = 1 V/10 V; see Figure 27

±0.2 ±0.5 ±1.4 nA max

DIGITAL INPUTS

Input High Voltage, V Input Low Voltage, V Input Current, I

INL

2.0 V min

INH

0.8 V max

INL

or I

0.002 µA typ VIN = V

INH

±0.1 µA max Digital Input Capacitance, CIN 3 pF typ

5 Ω typ V

= 0 V to 10 V, IS = −1 mA

S

160 Ω typ VS = 0 V to 10 V, IS = −1 mA

Figure 30

or VDD

GND

Rev. A | Page 5 of 24

ADG5208/ADG5209 Data Sheet

275

345

400

ns max

VS = 8 V; see Figure 35

50 65

µA max

On-Resistance Match Between

3.5

Ω typ

VS = 0 V to 30 V, IS = −1 mA ±0.1

±0.2

±0.4

nA max

Parameter 25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments

DYNAMIC CHARACTERISTICS1

Transition Time, t 270 330 380 ns max VS = 8 V; see Figure 33 tON (EN) 215 ns typ RL = 300 Ω, CL = 35 pF

t

(EN) 115 ns typ RL = 300 Ω, CL = 35 pF

OFF

140 160 175 ns max VS = 8 V; see Figure 35 Break-Before-Make Time Delay, tD 135 ns typ RL = 300 Ω, CL = 35 pF

70 ns min VS1 = VS2 = 8 V; see Figure 34

Charge Injection, Q

Off Isolation −90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;

Channel-to-Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;

−3 dB Bandwidth RL = 50 Ω, CL = 5 pF; see Figure 32

ADG5208 60 MHz typ ADG5209 120 MHz typ

Insertion Loss −8.8 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;

CS (Off ) 6 pF typ VS = 6 V, f = 1 MHz CD (Off )

ADG5208 56 pF typ VS = 6 V, f = 1 MHz ADG5209 28 pF typ VS = 6 V, f = 1 MHz

CD (On), CS (On)

ADG5208 63 pF typ VS = 6 V, f = 1 MHz ADG5209 35 pF typ VS = 6 V, f = 1 MHz

POWER REQUIREMENTS VDD = 13.2 V

IDD 40 µA typ Digital inputs = 0 V or VDD

210 ns typ RL = 300 Ω, CL = 35 pF

TRANSITION

0.3 pC typ VS = 6 V, RS = 0 Ω, CL = 1 nF; see

INJ

Figure 36

see Figure 31

see Figure 29

see Figure 32

VDD 9/40 V min/V max GND = 0 V, VSS = 0 V

1

Guaranteed by design; not subject to production test.

36 V SINGLE SUPPLY

VDD = 36 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.

Table 4.

Parameter 25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 V to VDD V On Resistance, RON 150 Ω typ VS = 0 V to 30 V, IS = −1 mA; see

Figure 28

170 215 245 Ω max VDD = 32.4 V, VSS = 0 V

Channels, ∆RON 8 9 10 Ω max On-Resistance Flatness, R 55 65 70 Ω max

LEAKAGE CURRENTS VDD = 39.6 V, VSS = 0 V

Source Off Leakage, IS (Off ) ±0.005 nA typ VS = 1 V/30 V, VD = 30 V/1 V; see

35 Ω typ VS = 0 V to 30 V, IS = −1 mA

FL AT (O N)

Figure 30

Rev. A | Page 6 of 24

Data Sheet ADG5208/ADG5209

Input Low Voltage, V

0.8

V max

CD (Off )

Parameter 25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments

Drain Off Leakage, ID (Off ) ±0.005 nA typ VS = 1 V/30 V, VD = 30 V/1 V; see

Figure 30

±0.1 ±0.4 ±1.4 nA max

Channel On Leakage, ID (On), IS (On) ±0.01 nA typ VS = VD = 1 V/30 V; see Figure 27

±0.2 ±0.5 ±1.4 nA max

DIGITAL INPUTS

Input High Voltage, V

Input Current, I

INL

±0.1 µA max Digital Input Capacitance, CIN 3 pF typ

DYNAMIC CHARACTERISTICS1

Transition Time, t 230 245 259 ns max VS = 18 V; see Figure 33 tON (EN) 170 ns typ RL = 300 Ω, CL = 35 pF 210 230 255 ns max VS = 18 V; see Figure 35 t

(EN) 125 ns typ RL = 300 Ω, CL = 35 pF

OFF

180 180 180 ns max VS = 18 V; see Figure 35 Break-Before-Make Time Delay, tD 70 ns typ RL = 300 Ω, CL = 35 pF

35 ns min VS1 = VS2 = 18 V; see Figure 34

Charge Injection, Q

Off Isolation −90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;

Channel-to-Channel Crosstalk −90 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;

−3 dB Bandwidth RL = 50 Ω, CL = 5 pF; see Figure 32

ADG5208 65 MHz typ ADG5209 130 MHz typ

Insertion Loss −6 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;

CS (Off ) 5.5 pF typ VS = 18 V, f = 1 MHz

2.0 V min

INH

INL

or I

0.002 µA typ VIN = V

INH

185 ns typ RL = 300 Ω, CL = 35 pF

TRANSITION

0.4 pC typ VS = 18 V, RS = 0 Ω, CL = 1 nF;

INJ

GND

or VDD

see Figure 36

see Figure 31

see Figure 29

see Figure 32

ADG5208 51 pF typ VS = 18 V, f = 1 MHz ADG5209 25 pF typ VS = 18 V, f = 1 MHz

CD (On), CS (On)

ADG5208 57 pF typ VS = 18 V, f = 1 MHz ADG5209 32 pF typ VS = 18 V, f = 1 MH z

POWER REQUIREMENTS VDD = 39.6 V

IDD 80 µA typ Digital inputs = 0 V or VDD 100 130 µA max VDD 9/40 V min/V max GND = 0 V, VSS = 0 V

1

Guaranteed by design; not subject to production test.

Rev. A | Page 7 of 24

ADG5208/ADG5209 Data Sheet

VDD = +15 V, VSS = −15 V

CONTINUOUS CURRENT PER CHANNEL, Sx, D, OR Dx

Table 5. ADG5208

Parameter 25°C 85°C 125°C Unit

CONTINUOUS CURRENT, Sx OR D

VDD = +15 V, VSS = −15 V

TSSOP (θJA = 112.6°C/W) 40 24 14.5 mA maximum LFCSP (θJA = 30.4°C/W) 69 37 18 mA maximum

VDD = +20 V, VSS = −20 V

TSSOP (θJA = 112.6°C/W) 42 26.5 14.5 mA maximum LFCSP (θJA = 30.4°C/W) 75 40 18 mA maximum

VDD = 12 V, VSS = 0 V

TSSOP (θJA = 112.6°C/W) 28 19 12 mA maximum LFCSP (θJA = 30.4°C/W) 40 25 14.5 mA maximum

VDD = 36 V, VSS = 0 V

TSSOP (θJA = 112.6°C/W) 40 26 14.5 mA maximum LFCSP (θJA = 30.4°C/W) 72 39 18 mA maximum

Table 6. ADG5209

Parameter 25°C 85°C 125°C Unit

CONTINUOUS CURRENT, Sx OR Dx

TSSOP (θJA = 112.6°C/W) 29 19 12 mA maximum LFCSP (θJA = 30.4°C/W) 51 30 16 mA maximum

VDD = +20 V, VSS = −20 V

TSSOP (θJA = 112.6°C/W) 30 20 12.5 mA maximum LFCSP (θJA = 30.4°C/W) 55 32 17 mA maximum

VDD = 12 V, VSS = 0 V

TSSOP (θJA = 112.6°C/W) 20 14 10 mA maximum LFCSP (θJA = 30.4°C/W) 29 20 12.5 mA maximum

VDD = 36 V, VSS = 0 V

TSSOP (θJA = 112.6°C/W) 30 20 12.5 mA maximum LFCSP (θJA = 30.4°C/W) 54 31 17 mA maximum

Rev. A | Page 8 of 24

ANALOG DEVICES ADG5208 Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

APPLICATIONS

FUNCTIONAL BLOCK DIAGRAMS

GENERAL DESCRIPTION

PRODUCT HIGHLIGHTS

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

±15 V DUAL SUPPLY

±20 V DUAL SUPPLY

12 V SINGLE SUPPLY

36 V SINGLE SUPPLY

CONTINUOUS CURRENT PER CHANNEL, Sx, D, OR Dx