ANALOG DEVICES ADG5204 Service Manual

High Voltage, Latch-Up Proof,

S

S3S

FEATURES

Latch-up proof 3 pF off source capacitance 26 pF off drain capacitance

−0.6 pC charge injection Low leakage: 0.4 nA maximum at 85°C ±9 V to ±22 V dual-supply operation 9 V to 40 V single-supply operation 48 V supply maximum ratings Fully specified at ±15 V, ±20 V, +12 V, and +36 V V

to VDD analog signal range

SS

APPLICATIONS

Automatic test equipment Data acquisition Instrumentation Avio nics Audio and video switching Communication systems

4-Channel Multiplexer

ADG5204

FUNCTIONAL BLOCK DIAGRAM

ADG5204

1

2

4

A0 A1 EN

1 OF 4

DECODERS

Figure 1.

D

09768-001

GENERAL DESCRIPTION

The ADG5204 is a complementary metal oxide semiconductor (CMOS) analog multiplexer, comprising four single channels.

The ultralow capacitance and charge injection of these switches make them ideal solutions for data acquisition and sample-andhold applications, where low glitch and fast settling are required. Fast switching speed together with high signal bandwidth make the ADG5204 suitable for video signal switching.

The ADG5204 is designed on a trench process, which guards against latch-up. A dielectric trench separates the P and N channel transistors, thereby preventing latch-up even under severe overvoltage conditions.

The ADG5204 switches one of four inputs to a common output, D, as determined by the 3-bit binary address lines, A0, A1, and EN. Logic 0 on the EN pin disables the device. Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching action.

PRODUCT HIGHLIGHTS

1. Trench Isolation Guards Against Latch-Up.

A dielectric trench separates the P and N channel transistors, thereby preventing latch-up even under severe overvoltage conditions.

2. Ultralow Capacitance and <1 pC Charge Injection.

3. Dual-Supply Operation.

For applications where the analog signal is bipolar, the ADG5204 can be operated from dual supplies up to ±22 V.

4. Single-Supply Operation.

For applications where the analog signal is unipolar, the ADG5204 can be operated from a single rail power supply up to 40 V.

5. 3 V Logic-Compatible Digital Inputs.

V

INH

6. No V

= 2.0 V, V

Logic Power Supply Required.

L

= 0.8 V.

INL

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

ADG5204

REVISION HISTORY

5/11—Revision 0: Initial Version

Absolute Maximum Ratings ............................................................8

ESD Caution...................................................................................8

Pin Configurations and Function Descriptions............................9

Truth Table .....................................................................................9

Typical Performance Characteristics........................................... 10

Test Circuits..................................................................................... 14

Terminology.................................................................................... 16

Trench Isolation.............................................................................. 17

Applications Information.............................................................. 18

Outline Dimensions....................................................................... 19

Ordering Guide .......................................................................... 19

Rev. 0 | Page 2 of 20

ADG5204

SPECIFICATIONS

±15 V DUAL SUPPLY

VDD = 15 V ± 10%, VSS = −15 V ± 10%, GND = 0 V, unless otherwise noted.

Table 1.

Parameter 25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range VDD to VSS V max On Resistance, RON 160 Ω typ VS = ±10 V, IS = −1 mA, see Figure 24 200 250 280 Ω max VDD = +13.5 V, VSS = −13.5 V On-Resistance Match

Between Channels, ∆R

ON

8 9 10 Ω max On-Resistance Flatness, R

FLAT(ON)

50 65 70 Ω max LEAKAGE CURRENTS VDD = +16.5 V, VSS = −16.5 V

Source Off Leakage, IS (Off) 0.01 nA typ

0.1 0.2 0.4 nA max Drain Off Leakage, ID (Off) 0.01 nA typ

0.1 0.4 1.2 nA max Channel On Leakage, ID, IS (On) 0.02 nA typ VS = VD = ±10 V, see Figure 26

0.2 0.5 1.2 nA max DIGITAL INPUTS

Input High Voltage, V Input Low Voltage, V Input Current, I

2.0 V min

INH

0.8 V max

INL

or I

0.002 μA typ VIN = V

INL

INH

±0.1 μA max Digital Input Capacitance, CIN 3 pF typ

DYNAMIC CHARACTERISTICS1

Transition Time, t

175 ns typ RL = 300 Ω, CL = 35 pF

TRANSITION

230 285 320 ns max VS = 10 V, see Figure 29 tON (EN) 155 ns typ RL = 300 Ω, CL = 35 pF 205 255 285 ns max VS = 10 V, see Figure 31 t

(EN) 150 ns typ RL = 300 Ω, CL = 35 pF

OFF

175 200 215 ns max VS = 10 V, see Figure 31 Break-Before-Make Time Delay, tD 80 ns typ RL = 300 Ω, CL = 35 pF

30 ns min VS1 = VS2 = 10 V, see Figure 30

Charge Injection, Q

−0.6 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF, see Figure 32

INJ

Off Isolation −80 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz, see Figure 25 Channel-to-Channel Crosstalk −80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 28

−3 dB Bandwidth 136 MHz typ RL = 50 Ω, CL = 5 pF, see Figure 27 Insertion Loss −6.8 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 27 CS (Off) 3 pF typ VS = 0 V, f = 1 MHz CD (Off) 26 pF typ VS = 0 V, f = 1 MHz CD, CS (On) 30 pF typ VS = 0 V, f = 1 MHz

POWER REQUIREMENTS VDD = +16.5 V, VSS = −16.5 V

IDD 45 μA typ Digital inputs = 0 V or VDD 55 70 μA max ISS 0.001 μA typ Digital inputs = 0 V or VDD 1 μA max VDD/VSS ±9/±22 V min/max GND = 0 V

1

Guaranteed by design; not subject to production test.

4.5 Ω typ V

= ±10 V, IS = −1 mA

S

38 Ω typ VS = ±10 V, IS = −1 mA

V

= VS = ±10 V, VD = ∓10 V, see Figure 23

S

V

= VS = ±10 V, VD = ∓10 V, see Figure 23

S

or VDD

GND

Rev. 0 | Page 3 of 20

ADG5204

±20 V DUAL SUPPLY

VDD = +20 V ± 10%, VSS = −20 V ± 10%, GND = 0 V, unless otherwise noted.

Table 2.

Parameter 25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range VDD to VSS V max On Resistance, RON 140 Ω typ VS = ±15 V, IS = −1 mA, see Figure 24 160 200 230 Ω max VDD = +18 V, VSS = −18 V On-Resistance Match

Between Channels, ∆R

ON

8 9 10 Ω max On-Resistance Flatness, R

FLAT(ON)

45 55 60 Ω max LEAKAGE CURRENTS VDD = +22 V, VSS = −22 V

Source Off Leakage, IS (Off) 0.01 nA typ

0.1 0.2 0.4 nA max Drain Off Leakage, ID (Off) 0.01 nA typ

0.1 0.4 1.2 nA max Channel On Leakage, ID, IS (On) 0.02 nA typ VS = VD = ±15 V, see Figure 26

0.2 0.5 1.2 nA max

DIGITAL INPUTS

Input High Voltage, V Input Low Voltage, V Input Current, I

INL

2.0 V min

INH

0.8 V max

INL

or I

0.002 μA typ VIN = V

INH

±0.1 μA max Digital Input Capacitance, CIN 3 pF typ

DYNAMIC CHARACTERISTICS1

Transition Time, t

160 ns typ RL = 300 Ω, CL = 35 pF

TRANSITION

215 260 290 ns max VS = 10 V, see Figure 29 tON (EN) 150 ns typ RL = 300 Ω, CL = 35 pF 185 225 255 ns max VS = 10 V, see Figure 31 t

(EN) 150 ns typ RL = 300 Ω, CL = 35 pF

OFF

175 195 210 ns max VS = 10 V, see Figure 31 Break-Before-Make Time Delay, tD 75 ns typ RL = 300 Ω, CL = 35 pF

30 ns min VS1 = VS2 = 10 V, see Figure 30

Charge Injection, Q

−0.6 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF, see Figure 32

INJ

Off Isolation −80 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz,

Channel-to-Channel Crosstalk −80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 28

−3 dB Bandwidth 150 MHz typ RL = 50 Ω, CL = 5 pF, see Figure 27 Insertion Loss −6 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 27 CS (Off) 3 pF typ VS = 0 V, f = 1 MHz CD (Off) 26 pF typ VS = 0 V, f = 1 MHz CD, CS (On) 30 pF typ VS = 0 V, f = 1 MHz

POWER REQUIREMENTS VDD = +22 V, VSS = −22 V

IDD 50 μA typ Digital inputs = 0 V or VDD 70 110 μA max ISS 0.001 μA typ Digital inputs = 0 V or VDD 1 μA max VDD/VSS ±9/±22 V min/max GND = 0 V

1

Guaranteed by design; not subject to production test.

4.5 Ω typ V

= ±15 V, IS = −1 mA

S

33 Ω typ VS = ±15 V, IS = −1 mA

V

= ±15 V, VD = ∓15 V, see Figure 23

S

V

= ±15 V, VD = ∓15 V, see Figure 23

S

or VDD

GND

see Figure 25

Rev. 0 | Page 4 of 20

ADG5204

12 V SINGLE SUPPLY

VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.

Table 3.

Parameter 25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 V to VDD V max On Resistance, RON 340 Ω typ VS = 0 V to 10 V, IS = −1 mA, see Figure 24 500 610 700 Ω max VDD = 10.8 V, VSS = 0 V On-Resistance Match

Between Channels, ∆R

ON

20 21 22 Ω max On-Resistance Flatness, R

FLAT(ON)

280 335 370 Ω max LEAKAGE CURRENTS VDD = 13.2 V, VSS = 0 V

Source Off Leakage, IS (Off) 0.01 nA typ VS = 1 V/10 V, VD = 10 V/1 V, see Figure 23

0.1 0.2 0.4 nA max Drain Off Leakage, ID (Off) 0.01 nA typ VS = 1 V/10 V, VD = 10 V/1 V, see Figure 23

0.1 0.4 1.2 nA max Channel On Leakage, ID, IS (On) 0.02 nA typ VS = VD = 1 V/10 V, see Figure 26

0.2 0.5 1.2 nA max DIGITAL INPUTS

Input High Voltage, V Input Low Voltage, V Input Current, I

2.0 V min

INH

0.8 V max

INL

or I

0.002 μA typ VIN = V

INL

INH

±0.1 μA max Digital Input Capacitance, CIN 3 pF typ

DYNAMIC CHARACTERISTICS1

Transition Time, t

240 ns typ RL = 300 Ω, CL = 35 pF

TRANSITION

350 445 515 ns max VS = 8 V, see Figure 29 tON (EN) 250 ns typ RL = 300 Ω, CL = 35 pF 335 420 485 ns max VS = 8 V, see Figure 31 t

(EN) 160 ns typ RL = 300 Ω, CL = 35 pF

OFF

195 220 240 ns max VS = 8 V, see Figure 31 Break-Before-Make Time Delay, tD 140 ns typ RL = 300 Ω, CL = 35 pF

60 ns min VS1 = VS2 = 8 V, see Figure 30

Charge Injection, Q

−1.2 pC typ VS = 6 V, RS = 0 Ω, CL = 1 nF, see Figure 32

INJ

Off Isolation −80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 25 Channel-to-Channel Crosstalk −80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 28

−3 dB Bandwidth 106 MHz typ RL = 50 Ω, CL = 5 pF, see Figure 27 Insertion Loss −11 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 27 CS (Off) 3.5 pF typ VS = 6 V, f = 1 MHz CD (Off) 29 pF typ VS = 6 V, f = 1 MHz CD, CS (On) 33 pF typ VS = 6 V, f = 1 MHz

POWER REQUIREMENTS VDD = 13.2 V

IDD 40 μA typ Digital inputs = 0 V or VDD 65 μA max VDD 9/40 V min/max GND = 0 V, VSS = 0 V

1

Guaranteed by design; not subject to production test.

5 Ω typ V

= 0 V to 10 V, IS = −1 mA

S

145 Ω typ VS = 0 V to 10 V, IS = −1 mA

or VDD

GND

Rev. 0 | Page 5 of 20

ADG5204

36 V SINGLE SUPPLY

VDD = 36 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.

Table 4.

Parameter 25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range 0 V to VDD V max On Resistance, RON 150 Ω typ VS = 0 V to 30 V, IS = −1 mA, see Figure 24 170 215 245 Ω max VDD = 32.4 V, VSS = 0 V On-Resistance Match

Between Channels, ∆R

ON

8 9 10 Ω max On-Resistance Flatness, R

FLAT(ON)

50 60 65 Ω max LEAKAGE CURRENTS VDD = 39.6 V, VSS = 0 V

Source Off Leakage, IS (Off) 0.01 nA typ VS = 1 V/30 V, VD = 30 V/1 V, see Figure 23

0.1 0.2 0.4 nA max Drain Off Leakage, ID (Off) 0.01 nA typ VS = 1 V/30 V, VD = 30 V/1 V, see Figure 23

0.1 0.4 1.2 nA max Channel On Leakage, ID, IS (On) 0.02 nA typ VS = VD = 1 V/30 V, see Figure 26

0.2 0.5 1.2 nA max DIGITAL INPUTS

Input High Voltage, V Input Low Voltage, V Input Current, I

2.0 V min

INH

0.8 V max

INL

or I

0.002 μA typ VIN = V

INL

INH

±0.1 μA max Digital Input Capacitance, CIN 3 pF typ

DYNAMIC CHARACTERISTICS1

Transition Time, t

180 ns typ RL = 300 Ω, CL = 35 pF

TRANSITION

250 275 305 ns max VS = 18 V, see Figure 29 tON (EN) 170 ns typ RL = 300 Ω, CL = 35 pF 220 251 285 ns max VS = 18 V, see Figure 31 t

(EN) 170 ns typ RL = 300 Ω, CL = 35 pF

OFF

210 215 220 ns max VS = 18 V, see Figure 31 Break-Before-Make Time Delay, tD 80 ns typ RL = 300 Ω, CL = 35 pF

30 ns min VS1 = VS2 = 18 V, see Figure 30

Charge Injection, Q

−0.6 pC typ VS = 18 V, RS = 0 Ω, CL = 1 nF, see Figure 32

INJ

Off Isolation −80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 25 Channel-to-Channel Crosstalk −80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 28

−3 dB Bandwidth 136 MHz typ RL = 50 Ω, CL = 5 pF, see Figure 27 Insertion Loss −6.7 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz, see Figure 27 CS (Off) 3 pF typ VS = 18 V, f = 1 MHz CD (Off) 26 pF typ VS = 18 V, f = 1 MHz CD, CS (On) 30 pF typ VS = 18 V, f = 1 MHz

POWER REQUIREMENTS VDD = 39.6 V

IDD 85 μA typ Digital inputs = 0 V or VDD 100 130 μA max VDD 9/40 V min/max GND = 0 V, VSS = 0 V

1

Guaranteed by design; not subject to production test.

4.5 Ω typ V

= 0 V to 30 V, IS = −1 mA

S

35 Ω typ VS = 0 V to 30 V, IS = −1 mA

or VDD

GND

Rev. 0 | Page 6 of 20

ANALOG DEVICES ADG5204 Service Manual

FEATURES

APPLICATIONS

FUNCTIONAL BLOCK DIAGRAM

GENERAL DESCRIPTION

PRODUCT HIGHLIGHTS

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

±15 V DUAL SUPPLY

±20 V DUAL SUPPLY

12 V SINGLE SUPPLY

36 V SINGLE SUPPLY