ANALOG DEVICES ADG508F Service Manual

8-Channel/4-Channel

Fault-Protected Analog Multiplexers

FEATURES

All switches off with power supply off
Analog output of on channel clamped within power

supplies if an overvoltage occurs
Latch-up proof construction
Low on resistance (270 Ω typical)
Fast switching times

t

: 230 ns maximum

ON

t

: 130 ns maximum

OFF

Low power dissipation (3.3 mW maximum)
Fault and overvoltage protection (−40 V to +55 V)
Break-before-make construction
TTL and CMOS compatible inputs

APPLICATIONS

Existing multiplexer applications (both fault-protected and

nonfault-protected)
New designs requiring multiplexer functions

GENERAL DESCRIPTION

The ADG508F and ADG509F are CMOS analog multi­plexers, with the ADG508F comprising eight single channels
and the ADG509F comprising four differential channels. These
multiplexers provide fault protection. Using a series n-channel,
p-channel, n-channel MOSFET structure, both device and signal
source protection is provided in the event of an overvoltage or
power loss. The multiplexer can withstand continuous overvolt­age inputs from −40 V to +55 V. During fault conditions with
power supplies off, the multiplexer input (or output) appears as
an open circuit and only a few nanoamperes of leakage current
will flow. This protects not only the multiplexer and the circuitry
driven by the multiplexer, but also protects the sensors or signal
sources that drive the multiplexer.

The ADG508F switches one of eight inputs to a common output
as determined by the 3-bit binary address lines A0, A1, and A2.
The ADG509F switches one of four differential inputs to a
common differential output as determined by the 2-bit binary
address lines A0 and A1. An EN input on each device is used
to enable or disable the device. When disabled, all channels are
switched off.

Rev. F

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

ADG508F/ADG509F

FUNCTIONAL BLOCK DIAGRAMS

ADG508F

S1

D

S8

1 OF 8

DECODER

A0

A1 A2 EN

Figure 1.

ADG509F

S1A

S4A

S1B

S4B

1 OF 4

DECODER

A1

A0

EN

Figure 2.

PRODUCT HIGHLIGHTS

1. Fault protection. The ADG508F/ADG509F can withstand

continuous voltage inputs from −40 V to +55 V. When a
fault occurs due to the power supplies being turned off, all
the channels are turned off and only a leakage current of a
few nanoamperes flows.

2. On channel saturates while fault exists.

3. Low R

4. Fast switching times.

5. Break-before-make switching. Switches are guaranteed

break-before-make so that input signals are protected
against momentary shorting.

6. Trench isolation eliminates latch-up. A dielectric trench

separates the p and n-channel MOSFETs thereby
preventing latch-up.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2001–2011 Analog Devices, Inc. All rights reserved.

ON

.

DA

DB

00035-001

00035-101

ADG508F/ADG509F

TABLE OF CONTENTS

Features.............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagrams............................................................. 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Dual Supply................................................................................... 3

Truth Tables................................................................................... 4

REVISION HISTORY

7/11—Rev. E to Rev. F

Deleted ADG528F ..............................................................Universal

Changes to Features Section and General Description Section . 1

Changes to Specifications Section.................................................. 3

Deleted Timing Diagrams Section................................................. 4

Changes to Table 4............................................................................ 5

Added Table 5.................................................................................... 6

Added Table 6.................................................................................... 7

Replaced Typical Performance Characteristics Section .............. 8

Changes to Terminology Section.................................................. 10

Changes to Figure 27 and Figure 28............................................. 13

Changes to Figure 31...................................................................... 14

Changes to Theory of Operation Section.................................... 11

Updated Outline Dimensions....................................................... 15

Changes to Ordering Guide.......................................................... 17

7/09—Rev. D: Rev. E

Updated Format..................................................................Universal

Added TSSOP .....................................................................Universal

Updated Outline Dimensions....................................................... 15

Changes to Ordering Guide.......................................................... 18

4/01—Data Sheet Changed from Rev. C to Rev. D.

Changes to Ordering Guide............................................................ 1

Changes to Specifications Table...................................................... 2

Max Ratings Changed...................................................................... 4

Deleted 16-Lead Cerdip from Outline Dimensions ..................11

Deleted 18-Lead Cerdip from Outline Dimensions ..................12

Absolute Maximum Ratings ............................................................5

ESD Caution...................................................................................5

Pin Configuration and Function Descriptions..............................6

Typical Performance Characteristics..............................................8

Terminology.................................................................................... 10

Theory of Operation ...................................................................... 11

Test Circuits..................................................................................... 12

Outline Dimensions....................................................................... 15

Ordering Guide .......................................................................... 17

Rev. F | Page 2 of 20

ADG508F/ADG509F

SPECIFICATIONS

DUAL SUPPLY

VDD = +15 V ± 10%, VSS = −15 V ± 10%, GND = 0 V, unless otherwise noted.

Table 1.

B Version
Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range VSS + 1.4 V typ Output open circuit

V

V

V

RON 270 350 Ω typ −10 V ≤ VS ≤ +10 V, IS = 1 mA;

390 Ω max

RON Drift 0.6 %/°C typ VS = 0 V, IS = 1 mA

On-Resistance Match Between

Channels, R

ON

LEAKAGE CURRENTS

Source Off Leakage IS (Off) ±0.02 nA typ

±1 ±50 nA max See Figure 22

Drain Off Leakage ID (Off)

ADG508F ±1 ±60 nA max See Figure 23
ADG509F ±1 ±30 nA max

Channel On Leakage ID, IS (On) ±0.04 nA typ VS = VD = ± 10 V;

ADG508F ±1 ±60 nA max See Figure 24
ADG509F ±1 ±30 nA max

FAU LT

Source Leakage Current IS (Fault) ±0.02 nA typ VS = +55 V or −40 V, VD = 0 V, see Figure 25

(With Overvoltage) ±2 ±2 A max

Drain Leakage Current ID (Fault)

(With Overvoltage) ±2 A max

Source Leakage Current IS (Fault)

(Power Supplies Off)
±2 A max See Figure 26
DIGITAL INPUTS

Input High Voltage, V
Input Low Voltage, V
Input Current, I

INL

2.4 V min

INH

0.8 V max

INL

or I

±1 A max VIN = 0 or VDD

INH

CIN, Digital Input Capacitance 5 pF typ

DYNAMIC CHARACTERISTICS1

t

175 ns typ RL = 1 MΩ, CL = 35 pF;

TRANSITION

t

90 ns typ RL = 1 kΩ, CL = 35 pF;

OPEN

60 40 ns min VS = 5 V; see Figure 28
tON (EN) 180 ns typ RL = 1 kΩ, CL = 35 pF;
230 300 ns max VS = 5 V; see Figure 29
t

(EN) 100 ns typ RL = 1 kΩ, CL = 35 pF

OFF

130 150
t

, Settling Time ns max VS = 5 V; see Figure 29

SETT

0.1% 1 s typ RL = 1 kΩ, CL = 35 pF;

0.01% 2.5 s typ VS = 5 V

− 1.4 V typ

DD

+ 2.2 V typ Output loaded, 1 mA

SS

– 2.2 V typ

DD

= +15 V ± 10%, VSS = −15 V ± 10%

V

DD

See Figure 21

3 % max V

±0.04 nA typ

±5 nA typ

±1 nA typ V

220 300 ns max

= ±10 V, IS = −1 mA

S

= ±10 V, VS = +10 V;

V

D

V

= ±10 V, VS = +10 V;

D

V

= ±25 V, VD = +10 V, see Figure 23

S

= ±25 V, VD = VEN = A0, A1, A2 = 0 V

S

V

= ±10 V, VS8 = +10 V; see Figure 27

S1

Rev. F | Page 3 of 20

ADG508F/ADG509F

B Version
Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments

Charge Injection 15 pC typ VS = 0 V, RS = 0 Ω, CL= 1 nF; see Figure 30
Off Isolation 93 dB typ

CS (Off) 3 pF typ
CD (Off)

ADG508F 22 pF typ
ADG509F 12 pF typ

POWER REQUIREMENTS

IDD 0.05 0.2 mA max VIN = 0 V or 5 V
ISS 0.1 1 µA max

1

Guaranteed by design, not subject to production test.

TRUTH TABLES

Table 2. ADG508F Truth Table1

A2 A1 A0 EN On Switch

X X X 0 None
0 0 0 1 1
0 0 1 1 2
0 1 0 1 3
0 1 1 1 4
1 0 0 1 5
1 0 1 1 6
1 1 0 1 7
1 1 1 1 8

1

X = don’t care.

= 1 kΩ, CL = 15 pF, f = 100 kHz; VS = 7 V rms;

R

L

see Figure 31

Table 3. ADG509F Truth Table1

A1 A0 EN On Switch Pair

X X 0 None
0 0 1 1
0 1 1 2
1 0 1 3
1 1 1 4

1

X = don’t care.

Rev. F | Page 4 of 20

ADG508F/ADG509F

ABSOLUTE MAXIMUM RATINGS

TA = 25°C unless otherwise noted.

Table 4.

Parameter Rating

VDD to VSS 48 V
VDD to GND −0.3 V to +48 V
VSS to GND +0.3 V to −48 V
Digital Input, EN, Ax −0.3 V to VDD + 0.3 V or

VS, Analog Input Overvoltage with

Power On (V

VS, Analog Input Overvoltage with

Power Off (V
Continuous Current, S or D 20 mA
Peak Current, S or D

(Pulsed at 1 ms, 10% Duty Cycle Max) 40 mA
Operating Temperature Range

Industrial (B Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
TSSOP

θJA, Thermal Impedance 112°C/W
Plastic DIP Package

θJA, Thermal Impedance

16-Lead 117°C/W

SOIC Package

θJA, Thermal Impedance

Narrow Body 77°C/W
Wide Body 75°C/W

= +15 V, VSS = −15 V)

DD

= 0 V, VSS = 0 V)

DD

20 mA, whichever occurs first
V

− 25 V to VDD + 40 V

SS

−40 V to +55 V

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

ESD CAUTION

Rev. F | Page 5 of 20

ADG508F/ADG509F

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

1

A0

2

EN

V

3

SS

ADG508F

TOP VIEW

S1

4

(Not to Scale)

S2

5

S3

6

7

S4

8

D

Figure 3. ADG508F Pin Configuration

Table 5. ADG508F Pin Function Descriptions

Pin No. Mnemonic Description

1 A0 Logic Control Input.
2 EN

Active High Digital Input. When low, the device is disabled and all switches are off. When high,
Ax logic inputs determine on switches.

3 VSS

Most Negative Power Supply Potential. In single-supply applications, this pin can be connected

to ground.
4 S1 Source Terminal 1. This pin can be an input or an output.
5 S2 Source Terminal 2. This pin can be an input or an output.
6 S3 Source Terminal 3. This pin can be an input or an output.
7 S4 Source Terminal 4. This pin can be an input or an output.
8 D Drain Terminal. This pin can be an input or an output.
9 S8 Source Terminal 8. This pin can be an input or an output.
10 S7 Source Terminal 7. This pin can be an input or an output.
11 S6 Source Terminal 6. This pin can be an input or an output.
12 S5 Source Terminal 5. This pin can be an input or an output.
13 VDD Most Positive Power Supply Potential.
14 GND Ground (0 V) Reference.
15 A2 Logic Control Input.
16 A1 Logic Control Input.

A1

16

A2

15

GND

14

13

V

DD

12

S5

11

S6

S7

10

S8

9

00035-004

Rev. F | Page 6 of 20