Datasheet ADG507ATE, ADG507AKR, ADG507AKP, ADG507AKN, ADG507ABQ Datasheet (Analog Devices)

CMOS

a

FEATURES
44 V Supply Maximum Rating

to VDD Analog Signal Range

V

SS

Single/Dual Supply Specifications
Wide Supply Ranges (10.8 V to 16.5 V)
Extended Plastic Temperature Range

(–40ⴗC to +85ⴗC)
Low Power Dissipation (28 mW max)
Low Leakage (20 pA typ)
Available in 28-Lead DIP, SOIC, PLCC, TSSOP and LCCC

Packages
Superior Alternative to:

DG506A, Hl-506

DG507A, Hl-507

GENERAL DESCRIPTION

The ADG506A and ADG507A are CMOS monolithic analog
multiplexers with 16 channels and dual 8 channels, respectively.
The ADG506A switches one of 16 inputs to a common output,
depending on the state of four binary addresses and an enable
input. The ADG507A switches one of eight differential inputs to
a common differential output, depending on the state of three
binary addresses and an enable input. Both devices have TTL
and 5 V CMOS logic compatible digital inputs.

The ADG506A and ADG507A are designed on an enhanced

2

LC

MOS process, which gives an increased signal capability of

to VDD and enables operation over a wide range of supply

V

SS

voltages. The devices can operate comfortably anywhere in the

10.8 V to 16.5 V single or dual supply range. These multiplexers
also feature high switching speeds and low R

PRODUCT HIGHLIGHTS

1. Single/Dual Supply Specifications with a Wide Tolerance
The devices are specified in the 10.8 V to 16.5 V range for
both single and dual supplies.

2. Extended Signal Range
The enhanced LC
down and an increased analog signal range of V

3. Break-Before-Make Switching
Switches are guaranteed break-before-make so input signals
are protected against momentary shorting.

4. Low Leakage
Leakage currents in the range of 20 pA make these multiplexers
suitable for high precision circuits.

2

MOS processing results in a high break-

ON

.

to VDD.

SS

8-/16-Channel Analog Multiplexers

ADG506A/ADG507A

FUNCTIONAL BLOCK DIAGRAM

ORDERING GUIDE

1

Model

ADG506AKN –40°C to +85°C N-28
ADG506AKR –40°C to +85°C R-28
ADG506AKP –40°C to +85°C P-28A
ADG506ABQ –40°C to +85°C Q-28
ADG506ATQ –55°C to +125°C Q-28
ADG506ATE –55°C to +125°C E-28A

ADG507AKN –40°C to +85°C N-28
ADG507AKR –40°C to +85°C R-28
ADG507AKP –40°C to +85°C P-28A
ADG507AKRU –40°C to +85°C RU-28
ADG507ABQ –40°C to +85°C Q-28
ADG507ATQ –55°C to +125°C Q-28
ADG507ATE –55°C to +125°C E-28A

NOTES

1

To order MIL-STD-883, Class B processed parts, add /883B to part number.
See Analog Devices’ Military/Aerospace Reference Manual (1994) for military
data sheet.

2

E = Leadless Ceramic Chip Carrier (LCCC); N = Plastic DIP; P = Plastic
Leaded Chip Carrier (PLCC); Q = Cerdip; R = 0.3" Small Outline IC (SOIC);
RU = Thin Shrink Small Outline Package (TSSOP).

Temperature Package
Range Option

2

REV. C

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 1998

ADG506A/ADG507A–SPECIFICATIONS

Dual Supply

(VDD = +10.8 V to +16.5 V, VSS = –10.8 V to –16.5 V unless otherwise noted)

ADG506A ADG506A ADG506A
ADG507A ADG507A ADG507A
K Version B Version T Version

–40ⴗC to –40ⴗC to –55ⴗC to

Parameter +25ⴗC +85ⴗC +25ⴗC +85ⴗC +25ⴗC +125ⴗC Units Comments

ANALOG SWITCH

Analog Signal Range V

R

ON

V

SS

DD

SS

V

DD

V

280 280 280 Ω typ –10 V ≤ VS ≤ +10 V, I

V
V

SS

DD

V

SS

V

DD

V

SS

V

DDVDD

V

SS

V min
V max

450 600 450 600 450 600 Ω max

= 1 mA; Test Circuit 1

DS

300 400 300 400 Ω max VDD = 15 V (±10%), VSS = –15 V (±10%)

300 400 Ω max VDD = 15 V (±5%), VSS = –15 V (±5%)

R

Drift 0.6 0.6 0.6 %/°C typ –10 V ≤ VS ≤ +10 V, I

ON

R

Match 5 5 5 % typ –10 V ≤ VS ≤ +10 V, I

ON

I

(OFF), Off Input Leakage 0.02 0.02 0.02 nA typ V1 = ±10 V, V2 = ⫿10 V; Test Circuit 2

S

I

(OFF), Off Output Leakage 0.04 0.04 0.04 nA typ V1 = ±10 V, V2 = ⫿10 V; Test Circuit 3

D

ADG506A 1 200 1 200 1 200 nA max

1 50 1 50 1 50 nA max

= 1 mA

DS

= 1 mA

DS

ADG507A 1 100 1 100 1 100 nA max

I

(ON), On Channel Leakage 0.04 0.04 0.04 nA typ V1 = ±10 V, V2 = ⫿10 V; Test Circuit 4

D

ADG506A 1 200 1 200 1 200 nA max
ADG507A 1 100 1 100 1 100 nA max

I

, Differential Off Output

DIFF

Leakage (ADG507A Only) 25 25 25 nA max V1 = ±10 V, V2 = ⫿10 V; Test Circuit 5

DIGITAL CONTROL

V

, Input High Voltage 2.4 2.4 2.4 V min

INH

V

, Input Low Voltage 0.8 0.8 0.8 V max

INL

I

or I

INL

INH

CIN Digital Input Capacitance 8 8 8 pF max

DYNAMIC CHARACTERISTICS

t

TRANSITION

t

OPEN

tON (EN)

t

OFF

1

(EN)

1

1

1

OFF Isolation 68 68 68 dB typ VEN = 0.8 V, R

111µA max V

= 0 to V

IN

DD

200 200 200 ns typ V1 = ±10 V, V2 = +10 V; Test Circuit 6

300 400 300 400 300 400 ns max
50 50 50 ns typ Test Circuit 7
25 10 25 10 25 10 ns min
200 200 200 ns typ Test Circuit 8
300 400 300 400 300 400 ns max
200 200 200 ns typ Test Circuit 8
300 400 300 400 300 400 ns max

= 1 kΩ, C

50 50 50 dB min VS = 7 V rms, f = 100 kHz

L

= 15 pF,

L

CS (OFF) 5 5 5 pF typ VEN = 0.8 V
CD (OFF)

ADG506A 44 44 44 pF typ VEN = 0.8 V
ADG507A 22 22 22 pF typ

Q

, Charge Injection 4 4 4 pC typ R

INJ

= 0 Ω, V

S

= 0 V; Test Circuit 9

S

POWER SUPPLY

I

DD

I

SS

0.6 0.6 0.6 mA typ VIN = V

1.5 1.5 1.5 mA max

20 20 20 µA typ V

0.2 0.2 0.2 mA max

= VIN or V

IN

INL

or V

lNH

INH

Power Dissipation 10 10 10 mW typ

28 28 28 mW max

NOTES

1

Sample tested at +25°C to ensure compliance.

Specifications subject to change without notice.

–2–

REV. C

ADG506A/ADG507A

Single Supply

Parameter +25ⴗC +85ⴗC +25ⴗC +85ⴗC +25ⴗC +125ⴗC Units Comments

ANALOG SWITCH

Analog Signal Range V

R

ON

R

Drift 0.6 0.6 0.6 %/°C typ 0 V ≤ VS ≤ +10 V, I

ON

R

Match 5 5 5 % typ 0 V ≤ VS ≤ +10 V, I

ON

IS (OFF), Off Input Leakage 0.02 0.02 0.02 nA typ V1 = +10 V/0 V, V2 = 0 V/ +10 V;

ID (OFF), Off Output Leakage 0.04 0.04 0.04 nA typ V1 = +10 V/0 V, V2 = 0 V/ +10 V;

ADG506A 1 200 1 200 1 200 nA max Test Circuit 3
ADG507A 1 100 1 100 1 100 nA max

ID (ON), On Channel Leakage 0.04 0.04 0.04 nA typ V1 = +10 V/0 V, V2 = 0 V/ +10 V;

ADG506A 1 200 1 200 1 200 nA max Test Circuit 4
ADG507A 1 100 1 100 1 100 nA max

I

, Differential Off Output V1 = +10 V/0 V, V2 = 0 V/ +10 V;

DIFF

Leakage (ADG507A Only) 25 25 25 nA max Test Circuit 5

DIGITAL CONTROL

V

, Input High Voltage 2.4 2.4 2.4 V min

INH

V

, Input Low Voltage 0.8 0.8 0.8 V max

INL

I

or I

INL

INH

CIN Digital Input Capacitance 8 8 8 pF max

DYNAMIC CHARACTERISTICS

t

TRANSITION

t

OPEN

tON (EN)

t

OFF

OFF Isolation 68 68 68 dB typ VEN = 0.8 V, R

CS (OFF) 5 5 5 pF typ VEN = 0.8 V
CD (OFF)

Q

INJ

POWER SUPPLY

I

DD

Power Dissipation 10 10 10 mW typ

NOTES

1

Sample tested at +25°C to ensure compliance.

Specifications subject to change without notice.

1

1

1

1

(EN)

ADG506A 44 44 44 pF typ VEN = 0.8 V
ADG507A 22 22 22 pF typ

, Charge Injection 4 4 4 pC typ R

(VDD = +10.8 V to +16.5 V, VSS = GND = 0 V unless otherwise noted)

ADG506A ADG506A ADG506A
ADG507A ADG507A ADG507A
K Version B Version T Version

–40ⴗC to –40ⴗC to –55ⴗC to

V

SS

DD

SS

V

DD

V

500 500 500 Ω typ 0 V ≤ VS ≤ +10 V, I

V
V

SS

DD

V

SS

V

DD

V

SS

V

DDVDD

V

SS

700 1000 700 1000 700 1000 Ω max

1 50 1 50 1 50 nA max Test Circuit 2

111µA max V

300 300 300 ns typ V1 = +10 V/0 V, V2 = +10 V; Test Circuit 6
450 600 450 600 450 600 ns max
50 50 50 ns typ Test Circuit 7
25 10 25 10 25 10 ns min
250 250 250 ns typ Test Circuit 8
450 600 450 600 450 600 ns max
250 250 250 ns typ Test Circuit 8
450 600 450 600 450 600 ns max

50 50 50 dB min VS = 3.5 V rms, f = 100 kHz

0.6 0.6 0.6 mA typ VIN = V

1.5 1.5 1.5 mA max

25 25 25 mW max

Truth Table (ADG506A)

A3 A2 A1 A0 EN On Switch

XXXX0 NONE
000011
000112
001013
001114
010015
010116
011017
011118
100019
1001110
1010111
1011112
1100113
1101114
1110115

1111116

V min
V max

X = Don’t Care

= 0.5 mA; Test Circuit 1

DS

= 0.5 mA

DS

= 0.5 mA

DS

= 0 to V

IN

= 0 Ω, V

S

DD

= 1 kΩ, C

L

= 0 V; Test Circuit 9

S

or V

INL

lNH

= 15 pF,

L

Truth Table (ADG507A)

A2 A1 A0 EN On Switch Pair

XXX0 NONE
00011
00112
01013
01114
10015
10116
11017
11118

REV. C

–3–

ADG506A/ADG507A

ABSOLUTE MAXIMUM RATINGS

(T

= 25°C unless otherwise noted)

A

1

VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 V

V

to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V

DD

to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –25 V

V

SS

Analog Inputs

2

Voltage at S, D . . . . . . . . . . . . . . . . . . . . . . . VSS – 2 V to V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . + 2 V or

. . . . . . . . . . . . . . . . . . . . . . 20 mA, Whichever Occurs First

Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 20 mA

Pulsed Current S or D

1 ms Duration, 10% Duty Cycle . . . . . . . . . . . . . . . . 40 mA

Digital Inputs

2

Voltage at A, EN . . . . . . . . . . . . . . . . . . . . . . . . . . VSS – 4 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . to V

+ 4 V or

DD

. . . . . . . . . . . . . . . . . . . . . . 20 mA, Whichever Occurs First

Power Dissipation (Any Package)

Up to +75°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 mW

Derates above +75°C by . . . . . . . . . . . . . . . . . . 6 mW/°C

Operating Temperature

Commercial (K Version) . . . . . . . . . . . . . . –40°C to +85°C

Industrial (B Version) . . . . . . . . . . . . . . . . – 40°C to +85°C

DD

Extended (T Version) . . . . . . . . . . . . . . . –55°C to +125°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . . +300°C

NOTES

1

Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.

2

Overvoltage at A, EN, S or D will be clamped by diodes. Current should be limited

to the Maximum Rating above.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG506A/ADG507A feature proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.

PIN CONFIGURATIONS

DIP, SOIC

WARNING!

ESD SENSITIVE DEVICE

V

1

DD

NC

2

NC

3

S16

4

S15

5

S14

6

(Not to Scale)

S13

7
8

S12

9

S11
S10

10
11

S9

GND

12

NC

13

A3

14

NC = NO CONNECT

ADG506A

TOP VIEW

28
27
26
25
24
23
22
21
20
19
18
17
16
15

DIP, SOIC, TSSOP

1

V

DD

DB

2

NC

3

S8B

4

S7B

5

S6B

6

(Not to Scale)

S5B

7
8

S4B

9

S3B
S2B

10
11

S1B

GND

12

NC

13

NC

14

NC = NO CONNECT

ADG507A

TOP VIEW

28
27
26
25
24
23
22
21
20
19
18
17
16
15

D
V
S8
S7
S6
S5
S4
S3
S2
S1
EN
A0
A1
A2

DA
V
S8A
S7A
S6A
S5A
S4A
S3A
S2A
S1A
EN
A0
A1
A2

LCCC

SS

S15
S14
S13
S12
S11
S10

S9

S16

5
6
7
8

9
10
11

12

GND

DD

SS

D

S8

NCNCV

3426

2

ADG506A

TOP VIEW

(Not to Scale)

13 14 15 16 17 18

NC

NC = NO CONNECT

V

28 271

25

S7

24

S6

23

S5

22

S4

21

S3

20

S2

19

S1

A0

A1

A2

A3

EN

S15
S14
S13
S12
S11
S10

5
6
7
8
9

10

S9

11

LCCC

SS

S7B
S6B
S5B
S4B
S3B
S2B
S1B

S8B

5
6
7
8

9
10
11

12

GND

DD

SS

DA

S8A

NC

V

28 271

25

S7A

24

S6A

23

S5A

22

S4A

21

S3A

20

S2A

19

S1A

A0

A1

A2

EN

NCDBV

3426

2

ADG507A

TOP VIEW

(Not to Scale)

13 14 15 16 17 18

NC

NC = NO CONNECT

S7B
S6B
S5B
S4B
S3B
S2B
S1B

5
6
7
8

9
10
11

–4–

PLCC

DD

V

NC

NC

V

D

28 27 261234

PIN 1
IDENTIFIER

S16

ADG506A

TOP VIEW

(Not to Scale)

121314 15 16 17 18

NC = NO CONNECT

A1

A3

A2

NC

GND

A0

PLCC

SS

DD

V

S8B

121314 15 16 17 18

NC = NO CONNECT

GND

V

DB

NC

28 27 261234

PIN 1
IDENTIFIER

ADG507A

TOP VIEW

(Not to Scale)

A2

NC

NC

DA

A1

A0

SS

S8

25
24
23
22
21
20
19

EN

S8A

25
24
23
22
21
20
19

EN

REV. C

S7
S6
S5
S4
S3
S2
S1

S7A
S6A
S5A
S4A
S3A
S2A
S1A

Typical Performance Characteristics–

ADG506A/ADG507A

The multiplexers are guaranteed functional with reduced single or dual supplies down to 4.5 V.

Figure 1. RON as a Function of VD (VS): Dual Supply
Voltage, T

= +25°C

A

Figure 2. Leakage Current as a Function of Temperature
(Note: Leakage Currents Reduce as the Supply Voltages
Reduce)

Figure 4. RON as a Function of VD (VS) Single Supply
Voltage, T

= +25°C

A

Figure 5. Trigger Levels vs. Power Supply Voltage, Dual
or Single Supply, T

= +25°C

A

Figure 3. t
Supplies, T
V

, V2 = VSS/VDD. See Test Circuit 6)

DD/VSS

REV. C

TRANSITION

A

vs. Supply Voltage: Dual and Single

= + 25°C (Note: For VDD and /VSS/ < 10 V; V1 =

Figure 6. IDD vs. Supply Voltage: Dual or Single Supply,

= +25°C

T

A

–5–

ADG506A/ADG507A

–Test Circuits

Note: All Digital Input Signal Rise and Fall Times Measured from 10% to 90% of 3 V. t

Test Circuit 1. R

ON

Test Circuit 2. IS (OFF)

= tF = 20 ns.

R

Test Circuit 3. ID (OFF)

Test Circuit 4. ID (ON)

Test Circuit 6. Switching Time of Multiplexer, t

Test Circuit 5. I

TRANSITION

DIFF

Test Circuit 7. Break-Before-Make Delay, t

–6–

OPEN

REV. C

ADG506A/ADG507A

Test Circuit 8. Enable Delay, tON (EN), t

Test Circuit 9. Charge Injection

SINGLE SUPPLY AUTOMOTIVE APPLICATION

The excellent performance of the multiplexers under single
supply conditions makes the ADG506A/ADG507A suitable in
applications such as automotive and disc drives where only
positive power supply voltages are normally available. The fol­lowing application circuit shows the ADG507A connected as an
8-channel differential multiplexer in an automotive, data acqui­sition application circuit.

(EN)

OFF

The AD7580 is a 10-bit successive approximation ADC, which
has an on-chip sample-hold amplifier and provides a conversion

result in 20 µs. The ADC has differential analog inputs and is

configured in the application circuit for a span of 2.5 V over a
common-mode range 0 V to + 5 V. Wider common-mode ranges
can be accommodated. See the AD7579/AD7580 data sheet for
more details. The complete system operates from +12 V (+10%)
and +5 V supplies. The analog input signals to the ADG507A
contain information such as temperature, pressure, speed etc.

REV. C

Figure 7. ADG507A in a Single Supply Automotive Data Acquisition Application

–7–

ADG506A/ADG507A

TERMINOLOGY

R

ON

R

Match Difference between the RON of any two channels

ON

Drift Change in RON versus temperature

R

ON

I

(OFF) Source terminal leakage current when the switch

S

Ohmic resistance between terminals D and S

is off

(OFF) Drain terminal leakage current when the switch

I

D

is off

I

(ON) Leakage current that flows from the closed switch

D

into the body

(VD) Analog voltage on terminal S or D

V

S

C

(OFF) Channel input capacitance for “OFF” condition

S

(OFF) Channel output capacitance for “OFF” condition

C

D

C

IN

t

(EN) Delay time between the 50% and 90% points of

ON

Digital input capacitance

the digital input and switch “ON” condition

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

28-Lead Plastic DIP (Suffix N)

0.550 (13.97)

0.53 (13.47)

1.45(36.83)

1.44 (36.58)

0.2

(5.08)

MAX

0.065 (1.66)

0.045 (1.15)

LEADS ARE SOLDER OR TIN PLATED KOVAR OR ALLOY 42

0.020 (0.508)

0.015 (0.381)

LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH

0.105 (2.67)

0.095 (2.42)

0.175 (4.45)

0.12 (3.05)

0.606 (15.4)

0.594 (15.09)

0.012 (0.305)

0.008 (0.203)

0.16 (4.07)

0.14 (3.56)

15ⴗ

0

(EN) Delay time between the 50% and 10% points of

t

OFF

the digital input and switch “OFF” condition

t

TRANSITION

Delay time between the 50% and 90% points of
the digital inputs and switch “ON” condition
when switching from one address state to
another

t

OPEN

“OFF” time measured between 50% points of
both switches when switching from one address

state to another
V
V
I
V
V
I
I

INL

INH

INL

DD

SS

DD

SS

(I

INH

Maximum input voltage for Logic “0”

Minimum input voltage for Logic “1”

) Input current of the digital input

Most positive voltage supply

Most negative voltage supply

Positive supply current

Negative supply current

28-Lead Cerdip (Suffix Q)

1.490 (37.84) MAX

0.525 (13.33)

0.515 (13.08)

0.22 (5.59)

GLASS

MAX

SEALANT

0.11 (2.79)

0.099 (2.28)
LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH

LEADS ARE SOLDER OR TIN PLATED KOVAR OR ALLOY 42

0.06 (1.52)

0.05 (1.27)

0.02 (0.5)

0.016 (0.406)

0.125

(3.175)

MIN

15

°

0

°

0.62 (15.74)

0.59 (14.93)

0.18(4.57)

0.012 (0.305)

0.008 (0.203)

C1150c–0–6/98

MAX

28-Lead SOIC (Suffix R)

0.7125 (18.10)

0.6969 (17.70)

28 15

0.2992 (7.60)

0.2914 (7.40)

0.0118 (0.30)

0.0040 (0.10)

PIN 1

0.0500
(1.27)

BSC

0.0192 (0.49)

0.0138 (0.35)

141

0.1043 (2.65)

0.0926 (2.35)

SEATING

PLANE

0.4193 (10.65)

0.0125 (0.32)

0.0091 (0.23)

0.3937 (10.00)

0.0291 (0.74)

0.0098 (0.25)

0.0500 (1.27)

8°
0°

0.0157 (0.40)

28-Terminal Plastic Leaded Chip Carrier (Suffix P)

4

5

IDENTIFIER

TOP VIEW

(PINS DOWN)

11

12

0.456 (11.582)

0.450 (11.430)

0.498 (12.57)

0.485 (12.32)

PIN 1

SQ

SQ

26

25

19

18

0.180 (4.51)

0.165 (4.20)

0.050 ⴞ0.005

01.27 ⴞ0.13

0.021 (0.533)

0.013 (0.331)

0.032 (0.812)

0.026 (0.661)

0.120 (3.04)

0.090 (2.29)

0.430 (10.5)

0.390 (9.9)

x 45°

28-Lead TSSOP (Suffix RU)

0.386 (9.80)

0.378 (9.60)

28 15

0.177 (4.50)

0.169 (4.30)

1

0.006 (0.15)

0.002 (0.05)

SEATING

PLANE

PIN 1

0.0256 (0.65)
BSC

0.0118 (0.30)

0.0075 (0.19)

14

0.256 (6.50)

0.246 (6.25)

0.0433
(1.10)

MAX

0.0079 (0.20)

0.0035 (0.090)

8°
0°

0.028 (0.70)

0.020 (0.50)

28-Terminal Leadless Ceramic Chip Carrier (Suffix E)

0.300 (7.62)
BSC

R TYP

0.075
(1.91)

REF

0.075
(1.91)

REF

26

18

0.055 (1.40)

0.045 (1.14)

2
5

19

0.150
(3.51)

28

1

BOTTOM

VIEW

BSC

0.200
(5.08)
BSC

5

12

11

4

45° TYP

0.015 (0.38)
MIN

0.028 (0.71)

0.022 (0.56)

0.050
(1.27)
BSC

0.458 (11.63)

0.442 (11.23)
SQ

0.100 (2.54)

0.064 (1.63)

0.458

(11.63)

MAX

SQ

0.088 (2.24)

0.054 (1.37)

0.095 (2.41)

0.075 (1.90)

0.011 (0.28)

0.007 (0.18)

PRINTED IN U.S.A.

–8–

REV. C