ANALOG DEVICES ADG438F Service Manual
High Performance, 4-/8-Channel,
Fault-Protected Analog Multiplexers
FEATURES
All switches off with power supply off
Analog output of on channel clamped within power supplies
if an overvoltage occurs
Latch-up proof construction
Fast switching times
t
250 ns maximum
ON
t
150 ns maximum
OFF
Fault and overvoltage protection: −40 V to +55 V
Break-before-make construction
TTL- and CMOS-compatible inputs
APPLICATIONS
Data acquisition systems
Industrial and process control systems
Avionics test equipment
Signal routing between systems
High reliability control systems
ADG438F/ADG439F
FUNCTIONAL BLOCK DIAGRAM
ADG438F
S1
D
S8
1 OF 8
DECODER
A0
A1 A2 EN
Figure 1.
ADG439F
S1A
S4A
DA
00468-001
GENERAL DESCRIPTION
The ADG438F and ADG439F are CMOS analog multiplexers, with
the ADG438F comprising eight single channels and the ADG439F
comprising four differential channels. These multiplexers provide
fault protection. Using a series n-channel, p-channel, and
n-channel MOSFET structure, both device and signal source
protection is provided in the event of an overvoltage or power
loss. The multiplexer can withstand continuous overvoltage
inputs from −40 V to +55 V. During fault conditions with power
supplies off, the multiplexer input (or output) appears as an open
circuit and only a few nanoamperes of leakage current flows. This
protects not only the multiplexer and the circuitry driven by the
multiplexer, but also protects the sensors or signal sources which
drive the multiplexer.
The ADG438F switches one of eight inputs to a common output
as determined by the 3-bit binary address lines, A0, A1, and A2.
The ADG439F switches one of four differential inputs to a
common differential output as determined by the 2-bit binary
address lines, A0 and A1. An EN input on each device is used
to enable or disable the device. When disabled, all channels are
switched off.
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
S1B
EN
DB
00468-101
S4B
1 OF 4
DECODER
A1
A0
Figure 2.
PRODUCT HIGHLIGHTS
1. Fault Protection. The ADG438F and ADG439F can with-
stand continuous voltage inputs up to −40 V or +55 V.
When a fault occurs due to the power supplies being
turned off, all the channels are turned off and only a
leakage current of a few nanoamperes flows.
2. On channel saturates while fault exists.
3. Low R
4. Fast Switching Times.
5. Break-Before-Make Switching. Switches are guaranteed
break-before-make so that input signals are protected
against momentary shorting.
6. Trench Isolation Eliminates Latch-Up. A dielectric trench
separates the p-channel and n-channel MOSFETs thereby
preventing latch-up.
7. Improved Off Isolation. Trench isolation enhances the
channel-to-channel isolation of the ADG438F/ADG439F.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2011 Analog Devices, Inc. All rights reserved.
ON
.
ADG438F/ADG439F
TABLE OF CONTENTS
Features.............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Dual Supply................................................................................... 3
Absolute Maximum Ratings............................................................ 5
REVISION HISTORY
7/11—Rev. D to Rev. E
Updated Format..................................................................Universal
Changes to Product Highlights Section and General
Description ........................................................................................ 1
Changes to Specification Section and Table 1 .............................. 3
Changes to Table 2............................................................................ 5
Added Table 3 and Table 4; Renumbered Sequentially ............... 6
Changes to Figure 5 to Figure 10.................................................... 7
Changes to Figure 11 to Figure 13.................................................. 8
Added Figure 14 to Figure 16.......................................................... 8
Changes to Figure 18 to Figure 20, Figure 23, and Figure 24 ..... 9
Changes to Terminology Section.................................................. 12
Changes to Theory of Operation Section, Figure 29, and
Figure 30 ..........................................................................................13
Updated Outline Dimensions....................................................... 14
Changes to Ordering Guide.......................................................... 15
2/00—Rev. C to Rev. D
ESD Caution...................................................................................5
Pin Configuration and Function Descriptions..............................6
Typical Performance Characteristics..............................................7
Test Circuits........................................................................................9
Terminology.................................................................................... 12
Theory of Operation ...................................................................... 13
Outline Dimensions....................................................................... 14
Ordering Guide .......................................................................... 15
Rev. E | Page 2 of 16
ADG438F/ADG439F
SPECIFICATIONS
DUAL SUPPLY
VDD = +15 V ± 10%, VSS = −15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
B Version
−40°C to
Parameter +25°C
+85°C
ANALOG SWITCH
Analog Signal Range VSS + 1.4 V typ Output open circuit
V
V
V
− 1.4 V typ
DD
+ 2.2 V typ Output loaded, 1 mA
SS
– 2.2 V typ
DD
RON 270 Ω typ −10 V ≤ VS ≤ +10 V, IS = 1 mA
390 420 450 Ω max See Figure 17
On-Resistance Flatness, R
9 % typ −10 V ≤ VS ≤ +10 V, IS = 1 mA
FLAT (ON)
10 10 10 10 % max
RON Drift 0.6 %/°C typ VS = 0 V, IS = 1 mA
On-Resistance Match Between
Channels, ΔR
ON
3 3 3 3 % max VS = ±10 V, IS = 1 mA
LEAKAGE CURRENTS
Source Off Leakage, IS (Off ) ±0.01 nA typ
±0.5 ±1.5 ±1.5 ±4 nA max See Figure 18
Drain Off Leakage, ID (Off ) ±0.01 nA typ
ADG438F ADG439F ±0.5 ±5 ±5 ±20 nA max See Figure 19
Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = ± 10 V
ADG438F/ADG439F ±0.5 ±5 ±5 ±20 nA max See Figure 20
FAULT
Source Leakage Current, IS (Fault) ±0.02 nA typ
(With Overvoltage) ±0.05 ±0.1 ±0.2 ±0.2 μA max
Drain Leakage Current, ID (Fault) ±0.05 nA typ
(With Overvoltage) ±0.05 ±0.1 ±0.2 ±0.2 μA max
Source Leakage Current, IS (Fault)
±30 nA typ V
(Power Supplies Off)
±0.1 ±0.2 ±0.3 1 μA max See Figure 22
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
2.4 2.4 2.4 V min
INH
0.8 0.8 0.8 V max
INL
Input Current
I
or I
INL
±1 ±1 ±1 μA max VIN = 0 V or VDD
INH
Digital Input Capacitance, CIN 5 pF typ
DYNAMIC CHARACTERISTICS1
t
175 ns typ RL = 1 MΩ, CL = 35 pF
TRANSITION
220 300 300 330 ns max
t
90
OPEN
60 40 40 40 ns min
tON (EN) 180 ns typ RL = 1 kΩ, CL = 35 pF
230 300 300 345 ns max VS = 5 V; see Figure 27
t
(EN) 100 ns typ RL = 1 kΩ, CL = 35 pF
OFF
130 150 150 173 ns max VS = 5 V; see Figure 27
−40°C to
+105°C
−40°C to
+125°C Unit Test Conditions/Comments
V
= ±10 V, VS = 10 V
D
V
= ±10 V, VS = 10 V
D
= +55 V or −40 V, VD = 0 V;
V
S
m
m
see Figure 21
V
= ±25 V, VD = 10 V; see mFigure 19
S
= ±25 V, VD = VEN, A0, A1, A2 = 0 V
S
V
= ±10 V, VS8 = m10 V; see Figure 25
S1
= 1 kΩ, CL = 35 pF, VS = 5 V;
R
L
see Figure 26
Rev. E | Page 3 of 16
ADG438F/ADG439F
B Version
−40°C to
Parameter +25°C
Settling Time, t
SETT
+85°C
0.1% 1 1 1 μs typ RL = 1 kΩ, CL = 35 pF
0.01% 2.5 2.5 2.5 μs typ VS = 5 V
Charge Injection 15 pC typ
Off Isolation 93 dB typ
Channel-to-Channel Crosstalk 93 dB typ
CS (Off ) 3 pF typ
CD (Off )
ADG438F 22 pF typ
ADG439F 12 pF typ
POWER REQUIREMENTS
IDD 0.05 mA typ VIN = 0 V or 5 V
0.1 0.2 0.2 0.2 mA max
ISS 0.1 μA typ
1 1 1 μA max
1
Guaranteed by design, not subject to production test.
−40°C to
+105°C
−40°C to
+125°C
Unit Test Conditions/Comments
= 0 V, RS = 0 Ω, CL = 1 nF;
V
S
see Figure 28
= 1 kΩ, CL = 15 pF, f = 100 kHz,
R
L
= 7 V rms; see Figure 23
V
S
= 1 kΩ, CL = 15 pF, f = 100 kHz,
R
L
V
= 7 rms; see Figure 24
S
Rev. E | Page 4 of 16
ADG438F/ADG439F
ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise noted.
Table 2.
Parameter Rating
VDD to VSS 48 V
VDD to GND −0.3 V to +48 V
VSS to GND +0.3 V to −48 V
Digital Input, EN, Ax −0.3 V to VDD + 0.3 V or 20 mA,
VS, Analog Input Overvoltage with
Power On (V
VS, Analog Input Overvoltage with
Power Off (V
Continuous Current, S or D 20 mA
Peak Current, S or D (Pulsed at 1 ms,
10% Duty Cycle Maximum)
Operating Temperature Range
Industrial (B Version) −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
Plastic DIP Package
θJA, Thermal Impedance 117°C/W
SOIC Package
θJA, Thermal Impedance
Narrow Body 125°C/W
Wide Body 90°C/W
= +15 V, VSS = −15 V)
DD
= 0 V, VSS = 0 V)
DD
whichever occurs first
V
− 25 V to VDD + 40 V
SS
−40 V to +55 V
40 mA
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. E | Page 5 of 16
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